VCD with timestamps and value changes on the same line fails with "ValueError: invalid literal for int() with base 10: '0 0! 0"'"

[brainstorm]

Given:

$date Wed Jan 27 21:33:50 2021 $end
$version libsigrok 0.6.0-git-2297a26 $end
$comment
  Acquisition with 2/8 channels at 100 kHz
$end
$timescale 10 us $end
$scope module libsigrok $end
$var wire 1 ! D1 $end
$var wire 1 " D2 $end
$upscope $end
$enddefinitions $end

#0  0! 0"
#96462  1"
#96472  0"
#96482  1"
#96514  0"
#96534 
#96535  1"
#96566  0"
#96576  1"
#96587  0"
#96597  1"
#96607  0"
#96628  1"
#96649  0"
#96659 
#96660  1"
#96680  0"
#96712  1"
#96722  0"
#96732  1"
#96743  0"
(...)

And the following two lines of code code:

from vcdvcd import VCDVCD
VCDVCD('scorbot_motors.vcd')

I'm getting the following backtrace, I guess you've not encountered this VCD corner case before? (from Sigrok):

-------------------------------------------------------
ValueError            Traceback (most recent call last)
<ipython-input-12-62b67f313668> in <module>
----> 1 VCDVCD('scorbot_motors.vcd')

~/.miniconda3/envs/reveng/lib/python3.7/site-packages/vcdvcd/vcdvcd.py in __init__(self, vcd_path, only_sigs, signals, store_tvs, callbacks)
    130                 elif line0 == '#':
    131                     callbacks.time(self, time, cur_sig_vals)
--> 132                     time = int(line[1:])
    133                     if first_time:
    134                         self.begintime = time

ValueError: invalid literal for int() with base 10: '0  0! 0"'

[cirosantilli]

OK, so the problem is that the time is on the same line as the signal changes is that right?

Feel free to send a PR with a test under https://github.com/cirosantilli/vcdvcd/blob/master/test.py I'll merge it :-)

[brainstorm]

OK, so the problem is that the time is on the same line as the signal changes is that right?

I have no idea, it's the first time I'm in contact with this format and its libsigrok implementation :-S... GTKWave seems to load it fine.

[cirosantilli]

OK, going to assume it is the case then :-) PR offer still open to anyone :confetti_ball:

If you see the existing tests like https://github.com/cirosantilli/vcdvcd/blob/c52a0730c6a0025928986a877a27bb86aeab95c7/counter_tb.vcd#L31 the timestamps are always on seaprate lines.

I'm not super expert in VCD, but it seems that is not required then. Would be good to check standard, but I'd merge even if as an extension.