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cirosantilli / vcdvcd

Python Verilog value change dump (VCD) parser library + the nifty vcdcat VCD command line pretty printer.
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Add robustness regarding VCD syntax #32

Closed flaviens closed 2 years ago

flaviens commented 2 years ago

Hi,

We noticed that some tools may produce malformed VCD files. This patch adds robustness so that vcdvcd works with more tools.

Kind regards, Flavien

cirosantilli commented 2 years ago

Hi, could you add a test for it at: https://github.com/cirosantilli/vcdvcd/blob/963e1c882705f8bd35224a20eed62951f6f18c13/test.py#L176 ? Curious to see what the tool outputs. I'm definitely in favor of being compatible with more syntaxes beyond what the standard specifies.

flaviens commented 2 years ago

Done :+1:

cirosantilli commented 2 years ago

Thanks :+1:

Do you understand why the tool emits the b1 line? What is is supposed to mean, or what triggers it? Since it is not assigning to anything.

flaviens commented 2 years ago

No, I do not know unfortunately. We ran a bunch of tests with an older version of Verilator and we encountered a few lines like this.

On Tue, May 31, 2022 at 5:14 PM cirosantilli @.***> wrote:

Thanks 👍

Do you understand why the tool emits the b1 line? What is is supposed to mean, or what triggers it? Since it is not assigning to anything.

— Reply to this email directly, view it on GitHub https://github.com/cirosantilli/vcdvcd/pull/32#issuecomment-1142267244, or unsubscribe https://github.com/notifications/unsubscribe-auth/AG4RJLDE3226JZUOKEIGSQLVMYUG5ANCNFSM5XNPDMMQ . You are receiving this because you authored the thread.Message ID: @.***>

cirosantilli commented 2 years ago

Merged at a6f1bc70a9e58a69a172c9749125841232a75e5b and made a relase :+1:

cirosantilli commented 2 years ago

I changed the print to a list to not pollute tests for example.