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Hardware Performance Counters HPCs in Gem5 (for aarch64) #12
Regarding the question asked here under title "Using perf_event with the ARM PMU inside gem5"
I apologize, but I get confused about PMC (or hardware performance counters HPCs) under gem5.
I have worked for a long time on Intel processors architecture (x86). Currently I am focusing on ARM processors. After I examined a large number of researches, I concluded that I can use Gem5 to perform profiling for applications running on ARM system using HPCs. There are many works that used HPCs in ARM under gem5 (for profiling, accuracy comparision, power estimation, etc.). What I understand from the discussion present in the provided link (above) is the recent Gem5 version doesn't support HPCs? or we have to patch that?
I built the gem5 for arm architecture using full-sys mod. after that I installed the PAPI (widely API used to access hardware performance counters) on the gem5-linux simulated. However, all the results were zero (no HPCs).
This issue might be that PAPI is developed only for real-hardware not for simulated ones (In fact I do't know). Or, I should perform additional work to allow papi access HPCs, but I afraid these counters are not exist, or need additional works to access them.
In real hardware (assume x86) using perf or PAPI, I can count many events from HPCs, for example total number of retired instructions (PAPI_TOT_INS in PAPI's alias ). I wonder if this event is exist in Gem5 for aarch64. I have checked the file ARMpmu.py, but I cannot find such event.
let me conclude my inquiries.
In Gem5, could we able to access HPCs (either through perf_evet or might be PAPI)?
If yse but additional works should be done, what exactly these works are? patching the Gem5?
Regarding the question asked here under title "Using perf_event with the ARM PMU inside gem5"
I apologize, but I get confused about PMC (or hardware performance counters HPCs) under gem5.
I have worked for a long time on Intel processors architecture (x86). Currently I am focusing on ARM processors. After I examined a large number of researches, I concluded that I can use Gem5 to perform profiling for applications running on ARM system using HPCs. There are many works that used HPCs in ARM under gem5 (for profiling, accuracy comparision, power estimation, etc.). What I understand from the discussion present in the provided link (above) is the recent Gem5 version doesn't support HPCs? or we have to patch that?
I built the gem5 for arm architecture using full-sys mod. after that I installed the PAPI (widely API used to access hardware performance counters) on the gem5-linux simulated. However, all the results were zero (no HPCs).
This issue might be that PAPI is developed only for real-hardware not for simulated ones (In fact I do't know). Or, I should perform additional work to allow papi access HPCs, but I afraid these counters are not exist, or need additional works to access them.
In real hardware (assume x86) using perf or PAPI, I can count many events from HPCs, for example total number of retired instructions (PAPI_TOT_INS in PAPI's alias ). I wonder if this event is exist in Gem5 for aarch64. I have checked the file ARMpmu.py, but I cannot find such event.
let me conclude my inquiries.
In Gem5, could we able to access HPCs (either through perf_evet or might be PAPI)? If yse but additional works should be done, what exactly these works are? patching the Gem5?
very appreciate your help