If convertReset is used to convert a synchronous reset into an asynchronous reset, a flip-flop in the source domain is inserted to filter glitches from the source reset.
A synchronous reset can safely be driven from combinatorial logic: the logic might glitch while the signals propagate, but timing analysis verified that the signals have fully propagated by the time the clock edge comes.
Asynchronous resets generally need to come from a glitch free source because glitches have a high chance of accidentally resetting logic.
Still TODO:
[x] Write a changelog entry (see changelog/README.md)
[x] Check copyright notices are up to date in edited files
If
convertResetis used to convert a synchronous reset into an asynchronous reset, a flip-flop in the source domain is inserted to filter glitches from the source reset.A synchronous reset can safely be driven from combinatorial logic: the logic might glitch while the signals propagate, but timing analysis verified that the signals have fully propagated by the time the clock edge comes.
Asynchronous resets generally need to come from a glitch free source because glitches have a high chance of accidentally resetting logic.
Still TODO: