Add `Clash.Cores.Xilinx.Unisim.DnaPortE2`

clash-lang / clash-compiler

Haskell to VHDL/Verilog/SystemVerilog compiler

https://clash-lang.org/

Other

1.4k stars 147 forks source link

Add `Clash.Cores.Xilinx.Unisim.DnaPortE2` #2703

Closed martijnbastiaan closed 2 months ago

martijnbastiaan commented 2 months ago

Still TODO:

[X] ~~Write a changelog entry (see changelog/README.md)~~
[X] Check copyright notices are up to date in edited files. Note: upstreamed from Bittide project, so license change.

martijnbastiaan commented 2 months ago

I did not read the relevant datasheet, but LGTM!

Great! We do use it "in production" already. Given the simulation test, and the simplicity of the inst implementation, I feel pretty confident this is okay! :)