Fix out-of-bounds natural generation of `genBitVector` (copy #2704)

clash-lang / clash-compiler

Haskell to VHDL/Verilog/SystemVerilog compiler

https://clash-lang.org/

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Closed mergify[bot] closed 2 months ago

mergify[bot] commented 2 months ago

genBitVector currently generates Natural numbers outside of the BitVector's range.

[x] Write a changelog entry (see changelog/README.md)
[x] Check copyright notices are up to date in edited files
This is an automatic copy of pull request #2704 done by Mergify.