DigitalBrains1
commented
1 month ago Doesn't this mean we break the contract that if Haskell simulation produces a defined value, HDL simulation should as well? I think HDL simulation will always produce high-impedance, and if we look here for VHDL for instance, you'll see the boolean operations returning X for Z inputs. So we see both Zs and Xs in HDL simulation, whereas Clash simulation, if I understand it correctly, will produce defined values.
No logic is added here, it only represents the state of the wire when no-one is driving it.