cliffordwolf / SimpleVOut

A Simple FPGA Core for Creating VGA/DVI/HDMI/OpenLDI Signals
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icoBoard support #2

Closed peepo closed 8 years ago

peepo commented 8 years ago

Clifford,

is this project ported to icoBoard? ie the HDMI out aspect!

I guess I'll be having a hack, but any further hints... ~:"

ed is sending me Numato 2x "PMOD" HDMI http://numato.com/hdmi-transmitter-expansion-module/ which is physically different to icoBoard, but...

I would have commented on reddit: HDMI output using FPGA but that post is archived.

cliffordwolf commented 8 years ago

SimpleVOut is portable Verilog code. The included examples use Xilinx primitives (such as hardware serdes), but the SVO cores are simple portable Verilog code. No need to "port" anything to icoBoard.

However, even for 640x480@60 (the lowest standard VESA resolution for HDMI), the HDMI per-lane bit rate is 235 MBit/s. In principle it is possible to built a serdes using the iCE40 architecture for this bit rate (using the DRR registers in SB_IO cells and one of the PLLs), but this would require support for multiple clock domains in timing analysis and probably also support for timing driven place&route in arachne-pnr, both of which is currently not available in the icestorm flow (but are on the todo list).

peepo commented 8 years ago

okay, tx! ~:"