NetFPGA make cores fail

[eselahe]

I used Fedora19 and Xilinx_Ise 14.6 for NetFPGA 1G-CML. When I source the environment and run make cores it shows like below:

for lib in axi_uartlite_v1_01_a axi_emc_v1_01_a bram_block_v1_00_a proc_common_v3_00_a clock_generator_v4_01_a diff_input_buf_v1_00_a lmb_bram_if_cntlr_v2_10_b axi_gpio_v1_01_a proc_sys_reset_v3_00_a lmb_v10_v1_00_a axi_interconnect_v1_02_a microblaze_v8_00_b axi_timebase_wdt_v1_01_a ; do \ if test -f lib/hw/xilinx/pcores/$lib/Makefile; \ then make -C lib/hw/xilinx/pcores/$lib; \ fi; \ done; /bin/sh: -c: line 0: syntax error near unexpected token (' /bin/sh: -c: line 0:basename /home/karin/NetFPGA-10G-live-master(1)/NetFPGA-10G-live-master/lib/hw/xilinx/pcores/axi_uartlite_v1_01_a' make[1]: Entering directory /home/karin/NetFPGA-10G-live-master(1)/NetFPGA-10G-live-master/lib/hw/xilinx/pcores/axi_uartlite_v1_01_a' false | cp -ri /opt/Xilinx/14.6/ISE_DS/EDK/hw/XilinxProcessorIPLib/pcores//* . > /dev/null 2>&1 make[1]: Leaving directory/home/karin/NetFPGA-10G-live-master(1)/NetFPGA-10G-live-master/lib/hw/xilinx/pcores/axi_uartlite_v1_01_a' /bin/sh: -c: line 0: syntax error near unexpected token (' /bin/sh: -c: line 0:basename /home/karin/NetFPGA-10G-live-master(1)/NetFPGA-10G-live-master/lib/hw/xilinx/pcores/axi_emc_v1_01_a' make[1]: Entering directory /home/karin/NetFPGA-10G-live-master(1)/NetFPGA-10G-live-master/lib/hw/xilinx/pcores/axi_emc_v1_01_a' false | cp -ri /opt/Xilinx/14.6/ISE_DS/EDK/hw/XilinxProcessorIPLib/pcores//* . > /dev/null 2>&1 make[1]: Leaving directory/home/karin/NetFPGA-10G-live-master(1)/NetFPGA-10G-live-master/lib/hw/xilinx/pcores/axi_emc_v1_01_a' /bin/sh: -c: line 0: syntax error near unexpected token (' /bin/sh: -c: line 0:basename /home/karin/NetFPGA-10G-live-master(1)/NetFPGA-10G-live-master/lib/hw/xilinx/pcores/bram_block_v1_00_a' make[1]: Entering directory /home/karin/NetFPGA-10G-live-master(1)/NetFPGA-10G-live-master/lib/hw/xilinx/pcores/bram_block_v1_00_a' false | cp -ri /opt/Xilinx/14.6/ISE_DS/EDK/hw/XilinxProcessorIPLib/pcores//* . > /dev/null 2>&1 make[1]: Leaving directory/home/karin/NetFPGA-10G-live-master(1)/NetFPGA-10G-live-master/lib/hw/xilinx/pcores/bram_block_v1_00_a' /bin/sh: -c: line 0: syntax error near unexpected token (' /bin/sh: -c: line 0:basename /home/karin/NetFPGA-10G-live-master(1)/NetFPGA-10G-live-master/lib/hw/xilinx/pcores/proc_common_v3_00_a' make[1]: Entering directory /home/karin/NetFPGA-10G-live-master(1)/NetFPGA-10G-live-master/lib/hw/xilinx/pcores/proc_common_v3_00_a' false | cp -ri /opt/Xilinx/14.6/ISE_DS/EDK/hw/XilinxProcessorIPLib/pcores//* . > /dev/null 2>&1 make[1]: Leaving directory/home/karin/NetFPGA-10G-live-master(1)/NetFPGA-10G-live-master/lib/hw/xilinx/pcores/proc_common_v3_00_a' /bin/sh: -c: line 0: syntax error near unexpected token (' /bin/sh: -c: line 0:basename /home/karin/NetFPGA-10G-live-master(1)/NetFPGA-10G-live-master/lib/hw/xilinx/pcores/clock_generator_v4_01_a' make[1]: Entering directory `/home/karin/NetFPGA-10G-live-master(1)/NetFPGA-10G-live-master/lib/hw/xilinx/pcores/clock_generator_v4_01_a' false | cp -ri /opt/Xilinx/14.6/ISE_DS/EDK/hw/XilinxProcessorIPLib/pcores//* . > /dev/null 2>&1 ^Cmake[1]: * [install] Error 130 make: * [xilinx] Interrupt

How to solve it?

[davidva-cml]

Hello,

We just pushed an update to the devel branch of our github repository to provide a make rule to only build the cores needed for the NetFPGA-1G-CML projects, which will prevent these errors. The new rule is "make cml_cores," and should be used in place of "make cores" for the NetFPGA-1G-CML projects.

David A. Van Arnem Development Engineer Computer Measurement Laboratory

On 04/20/2014 01:58 AM, eselahe wrote:

I used Fedora19 and Xilinx_Ise 14.6 for NetFPGA 1G-CML. When I source the environment and run make cores it shows like below:

for lib in axi_uartlite_v1_01_a axi_emc_v1_01_a bram_block_v1_00_a proc_common_v3_00_a clock_generator_v4_01_a diff_input_buf_v1_00_a lmb_bram_if_cntlr_v2_10_b axi_gpio_v1_01_a proc_sys_reset_v3_00_a lmb_v10_v1_00_a axi_interconnect_v1_02_a microblaze_v8_00_b axi_timebase_wdt_v1_01_a ; do \ if test -f lib/hw/xilinx/pcores/$lib/Makefile; \ then make -C lib/hw/xilinx/pcores/$lib; \ fi; \ done; /bin/sh: -c: line 0: syntax error near unexpected token |(' /bin/sh: -c: line 0:|basename /home/karin/NetFPGA-10G-live-master(1)/NetFPGA-10G-live-master/lib/hw/xilinx/pcores/axi_uartlite_v1_01_a' make[1]: Entering directory |/home/karin/NetFPGA-10G-live-master(1)/NetFPGA-10G-live-master/lib/hw/xilinx/pcores/axi_uartlite_v1_01_a' false | cp -ri /opt/Xilinx/14.6/ISE_DS/EDK/hw/XilinxProcessorIPLib/pcores//* . > /dev/null 2>&1 make[1]: Leaving directory|/home/karin/NetFPGA-10G-live-master(1)/NetFPGA-10G-live-master/lib/hw/xilinx/pcores/axi_uartlite_v1_01_a' /bin/sh: -c: line 0: syntax error near unexpected token |(' /bin/sh: -c: line 0:|basename /home/karin/NetFPGA-10G-live-master(1)/NetFPGA-10G-live-master/lib/hw/xilinx/pcores/axi_emc_v1_01_a' make[1]: Entering directory |/home/karin/NetFPGA-10G-live-master(1)/NetFPGA-10G-live-master/lib/hw/xilinx/pcores/axi_emc_v1_01_a' false | cp -ri /opt/Xilinx/14.6/ISE_DS/EDK/hw/XilinxProcessorIPLib/pcores//* . > /dev/null 2>&1 make[1]: Leaving directory|/home/karin/NetFPGA-10G-live-master(1)/NetFPGA-10G-live-master/lib/hw/xilinx/pcores/axi_emc_v1_01_a' /bin/sh: -c: line 0: syntax error near unexpected token |(' /bin/sh: -c: line 0:|basename /home/karin/NetFPGA-10G-live-master(1)/NetFPGA-10G-live-master/lib/hw/xilinx/pcores/bram_block_v1_00_a' make[1]: Entering directory |/home/karin/NetFPGA-10G-live-master(1)/NetFPGA-10G-live-master/lib/hw/xilinx/pcores/bram_block_v1_00_a' false | cp -ri /opt/Xilinx/14.6/ISE_DS/EDK/hw/XilinxProcessorIPLib/pcores//* . > /dev/null 2>&1 make[1]: Leaving directory|/home/karin/NetFPGA-10G-live-master(1)/NetFPGA-10G-live-master/lib/hw/xilinx/pcores/bram_block_v1_00_a' /bin/sh: -c: line 0: syntax error near unexpected token |(' /bin/sh: -c: line 0:|basename /home/karin/NetFPGA-10G-live-master(1)/NetFPGA-10G-live-master/lib/hw/xilinx/pcores/proc_common_v3_00_a' make[1]: Entering directory |/home/karin/NetFPGA-10G-live-master(1)/NetFPGA-10G-live-master/lib/hw/xilinx/pcores/proc_common_v3_00_a' false | cp -ri /opt/Xilinx/14.6/ISE_DS/EDK/hw/XilinxProcessorIPLib/pcores//* . > /dev/null 2>&1 make[1]: Leaving directory|/home/karin/NetFPGA-10G-live-master(1)/NetFPGA-10G-live-master/lib/hw/xilinx/pcores/proc_common_v3_00_a' /bin/sh: -c: line 0: syntax error near unexpected token |(' /bin/sh: -c: line 0:|basename /home/karin/NetFPGA-10G-live-master(1)/NetFPGA-10G-live-master/lib/hw/xilinx/pcores/clock_generator_v4_01_a' make[1]: Entering directory `/home/karin/NetFPGA-10G-live-master(1)/NetFPGA-10G-live-master/lib/hw/xilinx/pcores/clock_generator_v4_01_a' false | cp -ri /opt/Xilinx/14.6/ISE_DS/EDK/hw/XilinxProcessorIPLib/pcores//* . > /dev/null 2>&1 ^Cmake[1]: * [install] Error 130 make: * [xilinx] Interrupt

How to solve it?

— Reply to this email directly or view it on GitHub https://github.com/cmlab/NetFPGA-1G-CML/issues/1.

[eselahe]

Hello, I downloaded NetFPGA-10G-live-devel package and I compile it shows like below:

[root@localhost NetFPGA-10G-live-devel]# make cml_cores make -C tools/scripts make[1]: Entering directory /home/karin/NetFPGA-10G-live-devel/NetFPGA-10G-live-devel/tools/scripts' ./link-py-interpreter.sh make[1]: execvp: ./link-py-interpreter.sh: Permission denied make[1]: *** [link] Error 127 make[1]: Leaving directory /home/karin/NetFPGA-10G-live-devel/NetFPGA-10G-live-devel/tools/scripts' make: *\ [scripts] Error 2 [root@localhost NetFPGA-10G-live-devel]#

I get above errors. How to solve this problem?

Thanks.

On Mon, Apr 21, 2014 at 9:12 PM, david00 notifications@github.com wrote:

Hello,

We just pushed an update to the devel branch of our github repository to provide a make rule to only build the cores needed for the NetFPGA-1G-CML projects, which will prevent these errors. The new rule is "make cml_cores," and should be used in place of "make cores" for the NetFPGA-1G-CML projects.

David A. Van Arnem Development Engineer Computer Measurement Laboratory

On 04/20/2014 01:58 AM, eselahe wrote:

I used Fedora19 and Xilinx_Ise 14.6 for NetFPGA 1G-CML. When I source the environment and run make cores it shows like below:

for lib in axi_uartlite_v1_01_a axi_emc_v1_01_a bram_block_v1_00_a proc_common_v3_00_a clock_generator_v4_01_a diff_input_buf_v1_00_a lmb_bram_if_cntlr_v2_10_b axi_gpio_v1_01_a proc_sys_reset_v3_00_a lmb_v10_v1_00_a axi_interconnect_v1_02_a microblaze_v8_00_b axi_timebase_wdt_v1_01_a ; do \ if test -f lib/hw/xilinx/pcores/$lib/Makefile; \ then make -C lib/hw/xilinx/pcores/$lib; \ fi; \ done; /bin/sh: -c: line 0: syntax error near unexpected token |(' /bin/sh: -c: line 0:|basename

/home/karin/NetFPGA-10G-live-master(1)/NetFPGA-10G-live-master/lib/hw/xilinx/pcores/axi_uartlite_v1_01_a'

make[1]: Entering directory

|/home/karin/NetFPGA-10G-live-master(1)/NetFPGA-10G-live-master/lib/hw/xilinx/pcores/axi_uartlite_v1_01_a'

false | cp -ri /opt/Xilinx/14.6/ISE_DS/EDK/hw/XilinxProcessorIPLib/pcores//* . > /dev/null 2>&1 make[1]: Leaving

directory|/home/karin/NetFPGA-10G-live-master(1)/NetFPGA-10G-live-master/lib/hw/xilinx/pcores/axi_uartlite_v1_01_a'

/bin/sh: -c: line 0: syntax error near unexpected token |(' /bin/sh: -c: line 0:|basename

/home/karin/NetFPGA-10G-live-master(1)/NetFPGA-10G-live-master/lib/hw/xilinx/pcores/axi_emc_v1_01_a'

make[1]: Entering directory

|/home/karin/NetFPGA-10G-live-master(1)/NetFPGA-10G-live-master/lib/hw/xilinx/pcores/axi_emc_v1_01_a'

false | cp -ri /opt/Xilinx/14.6/ISE_DS/EDK/hw/XilinxProcessorIPLib/pcores//* . > /dev/null 2>&1 make[1]: Leaving

directory|/home/karin/NetFPGA-10G-live-master(1)/NetFPGA-10G-live-master/lib/hw/xilinx/pcores/axi_emc_v1_01_a'

/bin/sh: -c: line 0: syntax error near unexpected token |(' /bin/sh: -c: line 0:|basename

/home/karin/NetFPGA-10G-live-master(1)/NetFPGA-10G-live-master/lib/hw/xilinx/pcores/bram_block_v1_00_a'

make[1]: Entering directory

|/home/karin/NetFPGA-10G-live-master(1)/NetFPGA-10G-live-master/lib/hw/xilinx/pcores/bram_block_v1_00_a'

false | cp -ri /opt/Xilinx/14.6/ISE_DS/EDK/hw/XilinxProcessorIPLib/pcores//* . > /dev/null 2>&1 make[1]: Leaving

directory|/home/karin/NetFPGA-10G-live-master(1)/NetFPGA-10G-live-master/lib/hw/xilinx/pcores/bram_block_v1_00_a'

/bin/sh: -c: line 0: syntax error near unexpected token |(' /bin/sh: -c: line 0:|basename

/home/karin/NetFPGA-10G-live-master(1)/NetFPGA-10G-live-master/lib/hw/xilinx/pcores/proc_common_v3_00_a'

make[1]: Entering directory

|/home/karin/NetFPGA-10G-live-master(1)/NetFPGA-10G-live-master/lib/hw/xilinx/pcores/proc_common_v3_00_a'

false | cp -ri /opt/Xilinx/14.6/ISE_DS/EDK/hw/XilinxProcessorIPLib/pcores//* . > /dev/null 2>&1 make[1]: Leaving

directory|/home/karin/NetFPGA-10G-live-master(1)/NetFPGA-10G-live-master/lib/hw/xilinx/pcores/proc_common_v3_00_a'

/bin/sh: -c: line 0: syntax error near unexpected token |(' /bin/sh: -c: line 0:|basename

/home/karin/NetFPGA-10G-live-master(1)/NetFPGA-10G-live-master/lib/hw/xilinx/pcores/clock_generator_v4_01_a'

make[1]: Entering directory

`/home/karin/NetFPGA-10G-live-master(1)/NetFPGA-10G-live-master/lib/hw/xilinx/pcores/clock_generator_v4_01_a'

false | cp -ri /opt/Xilinx/14.6/ISE_DS/EDK/hw/XilinxProcessorIPLib/pcores//* . > /dev/null 2>&1 ^Cmake[1]: * [install] Error 130 make: * [xilinx] Interrupt

How to solve it?

— Reply to this email directly or view it on GitHub https://github.com/cmlab/NetFPGA-1G-CML/issues/1.

— Reply to this email directly or view it on GitHubhttps://github.com/cmlab/NetFPGA-1G-CML/issues/1#issuecomment-40950494 .

[davidva-cml]

Hello,

We are unable to replicate your issue so it is hard for us to determine the cause. We have a couple suggestions: First, can you try running "make cml_cores" as a normal user instead of root? Second, we've encountered permissions problems when SELinux is enabled, can you try disabling it and run "make cml_cores", again as a normal user?

David A. Van Arnem Development Engineer Computer Measurement Laboratory

On 04/22/2014 04:07 AM, eselahe wrote:

Hello, I downloaded NetFPGA-10G-live-devel package and I compile it shows like below:

[root@localhost NetFPGA-10G-live-devel]# make cml_cores make -C tools/scripts make[1]: Entering directory /home/karin/NetFPGA-10G-live-devel/NetFPGA-10G-live-devel/tools/scripts' ./link-py-interpreter.sh make[1]: execvp: ./link-py-interpreter.sh: Permission denied make[1]: *** [link] Error 127 make[1]: Leaving directory /home/karin/NetFPGA-10G-live-devel/NetFPGA-10G-live-devel/tools/scripts' make: *\ [scripts] Error 2 [root@localhost NetFPGA-10G-live-devel]#

I get above errors. How to solve this problem?

Thanks.

On Mon, Apr 21, 2014 at 9:12 PM, david00 notifications@github.com wrote:

Hello,

We just pushed an update to the devel branch of our github repository to provide a make rule to only build the cores needed for the NetFPGA-1G-CML projects, which will prevent these errors. The new rule is "make cml_cores," and should be used in place of "make cores" for the NetFPGA-1G-CML projects.

David A. Van Arnem Development Engineer Computer Measurement Laboratory

On 04/20/2014 01:58 AM, eselahe wrote:

I used Fedora19 and Xilinx_Ise 14.6 for NetFPGA 1G-CML. When I source the environment and run make cores it shows like below:

for lib in axi_uartlite_v1_01_a axi_emc_v1_01_a bram_block_v1_00_a proc_common_v3_00_a clock_generator_v4_01_a diff_input_buf_v1_00_a lmb_bram_if_cntlr_v2_10_b axi_gpio_v1_01_a proc_sys_reset_v3_00_a lmb_v10_v1_00_a axi_interconnect_v1_02_a microblaze_v8_00_b axi_timebase_wdt_v1_01_a ; do \ if test -f lib/hw/xilinx/pcores/$lib/Makefile; \ then make -C lib/hw/xilinx/pcores/$lib; \ fi; \ done; /bin/sh: -c: line 0: syntax error near unexpected token |(' /bin/sh: -c: line 0:|basename

/home/karin/NetFPGA-10G-live-master(1)/NetFPGA-10G-live-master/lib/hw/xilinx/pcores/axi_uartlite_v1_01_a'

make[1]: Entering directory

|/home/karin/NetFPGA-10G-live-master(1)/NetFPGA-10G-live-master/lib/hw/xilinx/pcores/axi_uartlite_v1_01_a'

false | cp -ri /opt/Xilinx/14.6/ISE_DS/EDK/hw/XilinxProcessorIPLib/pcores//* . > /dev/null 2>&1 make[1]: Leaving

directory|/home/karin/NetFPGA-10G-live-master(1)/NetFPGA-10G-live-master/lib/hw/xilinx/pcores/axi_uartlite_v1_01_a'

/bin/sh: -c: line 0: syntax error near unexpected token |(' /bin/sh: -c: line 0:|basename

/home/karin/NetFPGA-10G-live-master(1)/NetFPGA-10G-live-master/lib/hw/xilinx/pcores/axi_emc_v1_01_a'

make[1]: Entering directory

|/home/karin/NetFPGA-10G-live-master(1)/NetFPGA-10G-live-master/lib/hw/xilinx/pcores/axi_emc_v1_01_a'

false | cp -ri /opt/Xilinx/14.6/ISE_DS/EDK/hw/XilinxProcessorIPLib/pcores//* . > /dev/null 2>&1 make[1]: Leaving

directory|/home/karin/NetFPGA-10G-live-master(1)/NetFPGA-10G-live-master/lib/hw/xilinx/pcores/axi_emc_v1_01_a'

/bin/sh: -c: line 0: syntax error near unexpected token |(' /bin/sh: -c: line 0:|basename

/home/karin/NetFPGA-10G-live-master(1)/NetFPGA-10G-live-master/lib/hw/xilinx/pcores/bram_block_v1_00_a'

make[1]: Entering directory

|/home/karin/NetFPGA-10G-live-master(1)/NetFPGA-10G-live-master/lib/hw/xilinx/pcores/bram_block_v1_00_a'

false | cp -ri /opt/Xilinx/14.6/ISE_DS/EDK/hw/XilinxProcessorIPLib/pcores//* . > /dev/null 2>&1 make[1]: Leaving

directory|/home/karin/NetFPGA-10G-live-master(1)/NetFPGA-10G-live-master/lib/hw/xilinx/pcores/bram_block_v1_00_a'

/bin/sh: -c: line 0: syntax error near unexpected token |(' /bin/sh: -c: line 0:|basename

/home/karin/NetFPGA-10G-live-master(1)/NetFPGA-10G-live-master/lib/hw/xilinx/pcores/proc_common_v3_00_a'

make[1]: Entering directory

|/home/karin/NetFPGA-10G-live-master(1)/NetFPGA-10G-live-master/lib/hw/xilinx/pcores/proc_common_v3_00_a'

false | cp -ri /opt/Xilinx/14.6/ISE_DS/EDK/hw/XilinxProcessorIPLib/pcores//* . > /dev/null 2>&1 make[1]: Leaving

directory|/home/karin/NetFPGA-10G-live-master(1)/NetFPGA-10G-live-master/lib/hw/xilinx/pcores/proc_common_v3_00_a'

/bin/sh: -c: line 0: syntax error near unexpected token |(' /bin/sh: -c: line 0:|basename

/home/karin/NetFPGA-10G-live-master(1)/NetFPGA-10G-live-master/lib/hw/xilinx/pcores/clock_generator_v4_01_a'

make[1]: Entering directory

`/home/karin/NetFPGA-10G-live-master(1)/NetFPGA-10G-live-master/lib/hw/xilinx/pcores/clock_generator_v4_01_a'

false | cp -ri /opt/Xilinx/14.6/ISE_DS/EDK/hw/XilinxProcessorIPLib/pcores//* . > /dev/null 2>&1 ^Cmake[1]: * [install] Error 130 make: * [xilinx] Interrupt

How to solve it?

— Reply to this email directly or view it on GitHub https://github.com/cmlab/NetFPGA-1G-CML/issues/1.

— Reply to this email directly or view it on GitHubhttps://github.com/cmlab/NetFPGA-1G-CML/issues/1#issuecomment-40950494 .

— Reply to this email directly or view it on GitHub https://github.com/cmlab/NetFPGA-1G-CML/issues/1#issuecomment-41023147.

[eselahe]

First I compile package as a normal user, I have same problem. Then, I disable SElinux by setting the value of SELINUX to disabled in selinux file at this path: /etc/sysconfig/selinux and then reboot. when I compile NetFPGA-10G-live-devel package I get below massage: Makefile:202: *\ XILINX_EDK is undefined. Stop. I defined XILINX_EDK like below:

export XILINX_EDK=/opt/Xilinx/14.6/ISE_DS/EDK/

and then recompile the package by "make cml_cores" as root and as a normal user, in two states I received same errors :-(

[root@localhost NetFPGA-10G-live-devel]# make cml_cores make -C tools/scripts make[1]: Entering directory /home/karin/NetFPGA-10G-live-devel/NetFPGA-10G-live-devel/tools/scripts' ./link-py-interpreter.sh make[1]: execvp: ./link-py-interpreter.sh: Permission denied make[1]: *** [link] Error 127 make[1]: Leaving directory /home/karin/NetFPGA-10G-live-devel/NetFPGA-10G-live-devel/tools/scripts' make: *\ [scripts] Error 2

Please help me.

Best regards

On 4/22/14, david00 notifications@github.com wrote:

Hello,

We are unable to replicate your issue so it is hard for us to determine the cause. We have a couple suggestions: First, can you try running "make cml_cores" as a normal user instead of root? Second, we've encountered permissions problems when SELinux is enabled, can you try disabling it and run "make cml_cores", again as a normal user?

David A. Van Arnem Development Engineer Computer Measurement Laboratory

On 04/22/2014 04:07 AM, eselahe wrote:

Hello, I downloaded NetFPGA-10G-live-devel package and I compile it shows like below:

[root@localhost NetFPGA-10G-live-devel]# make cml_cores make -C tools/scripts make[1]: Entering directory /home/karin/NetFPGA-10G-live-devel/NetFPGA-10G-live-devel/tools/scripts' ./link-py-interpreter.sh make[1]: execvp: ./link-py-interpreter.sh: Permission denied make[1]: *** [link] Error 127 make[1]: Leaving directory /home/karin/NetFPGA-10G-live-devel/NetFPGA-10G-live-devel/tools/scripts' make: *\ [scripts] Error 2 [root@localhost NetFPGA-10G-live-devel]#

I get above errors. How to solve this problem?

Thanks.

On Mon, Apr 21, 2014 at 9:12 PM, david00 notifications@github.com wrote:

Hello,

We just pushed an update to the devel branch of our github repository to provide a make rule to only build the cores needed for the NetFPGA-1G-CML projects, which will prevent these errors. The new rule is "make cml_cores," and should be used in place of "make cores" for the NetFPGA-1G-CML projects.

David A. Van Arnem Development Engineer Computer Measurement Laboratory

On 04/20/2014 01:58 AM, eselahe wrote:

I used Fedora19 and Xilinx_Ise 14.6 for NetFPGA 1G-CML. When I source the environment and run make cores it shows like below:

for lib in axi_uartlite_v1_01_a axi_emc_v1_01_a bram_block_v1_00_a proc_common_v3_00_a clock_generator_v4_01_a diff_input_buf_v1_00_a lmb_bram_if_cntlr_v2_10_b axi_gpio_v1_01_a proc_sys_reset_v3_00_a lmb_v10_v1_00_a axi_interconnect_v1_02_a microblaze_v8_00_b axi_timebase_wdt_v1_01_a ; do \ if test -f lib/hw/xilinx/pcores/$lib/Makefile; \ then make -C lib/hw/xilinx/pcores/$lib; \ fi; \ done; /bin/sh: -c: line 0: syntax error near unexpected token |(' /bin/sh: -c: line 0:|basename

/home/karin/NetFPGA-10G-live-master(1)/NetFPGA-10G-live-master/lib/hw/xilinx/pcores/axi_uartlite_v1_01_a'

make[1]: Entering directory

|/home/karin/NetFPGA-10G-live-master(1)/NetFPGA-10G-live-master/lib/hw/xilinx/pcores/axi_uartlite_v1_01_a'

false | cp -ri /opt/Xilinx/14.6/ISE_DS/EDK/hw/XilinxProcessorIPLib/pcores//* . > /dev/null 2>&1 make[1]: Leaving

directory|/home/karin/NetFPGA-10G-live-master(1)/NetFPGA-10G-live-master/lib/hw/xilinx/pcores/axi_uartlite_v1_01_a'

/bin/sh: -c: line 0: syntax error near unexpected token |(' /bin/sh: -c: line 0:|basename

/home/karin/NetFPGA-10G-live-master(1)/NetFPGA-10G-live-master/lib/hw/xilinx/pcores/axi_emc_v1_01_a'

make[1]: Entering directory

|/home/karin/NetFPGA-10G-live-master(1)/NetFPGA-10G-live-master/lib/hw/xilinx/pcores/axi_emc_v1_01_a'

false | cp -ri /opt/Xilinx/14.6/ISE_DS/EDK/hw/XilinxProcessorIPLib/pcores//* . > /dev/null 2>&1 make[1]: Leaving

directory|/home/karin/NetFPGA-10G-live-master(1)/NetFPGA-10G-live-master/lib/hw/xilinx/pcores/axi_emc_v1_01_a'

/bin/sh: -c: line 0: syntax error near unexpected token |(' /bin/sh: -c: line 0:|basename

/home/karin/NetFPGA-10G-live-master(1)/NetFPGA-10G-live-master/lib/hw/xilinx/pcores/bram_block_v1_00_a'

make[1]: Entering directory

|/home/karin/NetFPGA-10G-live-master(1)/NetFPGA-10G-live-master/lib/hw/xilinx/pcores/bram_block_v1_00_a'

false | cp -ri /opt/Xilinx/14.6/ISE_DS/EDK/hw/XilinxProcessorIPLib/pcores//* . > /dev/null 2>&1 make[1]: Leaving

directory|/home/karin/NetFPGA-10G-live-master(1)/NetFPGA-10G-live-master/lib/hw/xilinx/pcores/bram_block_v1_00_a'

/bin/sh: -c: line 0: syntax error near unexpected token |(' /bin/sh: -c: line 0:|basename

/home/karin/NetFPGA-10G-live-master(1)/NetFPGA-10G-live-master/lib/hw/xilinx/pcores/proc_common_v3_00_a'

make[1]: Entering directory

|/home/karin/NetFPGA-10G-live-master(1)/NetFPGA-10G-live-master/lib/hw/xilinx/pcores/proc_common_v3_00_a'

false | cp -ri /opt/Xilinx/14.6/ISE_DS/EDK/hw/XilinxProcessorIPLib/pcores//* . > /dev/null 2>&1 make[1]: Leaving

directory|/home/karin/NetFPGA-10G-live-master(1)/NetFPGA-10G-live-master/lib/hw/xilinx/pcores/proc_common_v3_00_a'

/bin/sh: -c: line 0: syntax error near unexpected token |(' /bin/sh: -c: line 0:|basename

/home/karin/NetFPGA-10G-live-master(1)/NetFPGA-10G-live-master/lib/hw/xilinx/pcores/clock_generator_v4_01_a'

make[1]: Entering directory

`/home/karin/NetFPGA-10G-live-master(1)/NetFPGA-10G-live-master/lib/hw/xilinx/pcores/clock_generator_v4_01_a'

false | cp -ri /opt/Xilinx/14.6/ISE_DS/EDK/hw/XilinxProcessorIPLib/pcores//* . > /dev/null 2>&1 ^Cmake[1]: * [install] Error 130 make: * [xilinx] Interrupt

How to solve it?

— Reply to this email directly or view it on GitHub https://github.com/cmlab/NetFPGA-1G-CML/issues/1.

— Reply to this email directly or view it on GitHubhttps://github.com/cmlab/NetFPGA-1G-CML/issues/1#issuecomment-40950494 .

— Reply to this email directly or view it on GitHub https://github.com/cmlab/NetFPGA-1G-CML/issues/1#issuecomment-41023147.

---

Reply to this email directly or view it on GitHub: https://github.com/cmlab/NetFPGA-1G-CML/issues/1#issuecomment-41065485

[jhirata]

Hi, Can you do a ls -al tools/scripts/link-py-interpreter.sh from your repository root to see what the file permissions are for the link-py-interpreter.sh file?

Thanks, Jay

[eselahe]

Hi Jay,

Thanks for this comment, because I understood the permission of all files have changed but I can't understand why this has occurred. I downloaded NetFPGA-10G-live-devel package, again, checked the file permissions and compiled it. This time I received below messages:

[root@localhost NetFPGA-10G-live-devel]# make cml_cores make -C tools/scripts make[1]: Entering directory /home/karin/NetFPGA-10G-live-devel/tools/scripts' ./link-py-interpreter.sh Found python interpreter: /usr/bin/python2.7 ln -s /usr/bin/python2.7 ./python-nf make[1]: Leaving directory /home/karin/NetFPGA-10G-live-devel/tools/scripts' if test -f lib/hw/contrib/pcores/mdio_ctrl_v1_00_a/Makefile; \ then make -C lib/hw/contrib/pcores/mdio_ctrl_v1_00_a; \ fi; \ if test -f lib/hw/contrib/pcores/nf1_cml_interface_v1_00_a/Makefile; \ then make -C lib/hw/contrib/pcores/nf1_cml_interface_v1_00_a; \ fi; \ if test -f lib/hw/contrib/pcores/nf10_endianess_manager_v1_00_a/Makefile; \ then make -C lib/hw/contrib/pcores/nf10_endianess_manager_v1_00_a; \ fi; \ if test -f lib/hw/contrib/pcores/version_id_v1_00_a/Makefile; \ then make -C lib/hw/contrib/pcores/version_id_v1_00_a; \ fi; \ if test -f lib/hw/std/pcores/dma_v1_20_a/Makefile; \ then make -C lib/hw/std/pcores/dma_v1_20_a; \ fi; \ if test -f lib/hw/std/pcores/nf10_axis_gen_check_v1_00_a/Makefile; \ then make -C lib/hw/std/pcores/nf10_axis_gen_check_v1_00_a; \ fi; \ if test -f lib/hw/std/pcores/nf10_bram_output_queues_v1_00_a/Makefile; \ then make -C lib/hw/std/pcores/nf10_bram_output_queues_v1_00_a; \ fi; \ if test -f lib/hw/std/pcores/nf10_input_arbiter_v1_00_a/Makefile; \ then make -C lib/hw/std/pcores/nf10_input_arbiter_v1_00_a; \ fi; \ if test -f lib/hw/std/pcores/nf10_nic_output_port_lookup_v1_00_a/Makefile; \ then make -C lib/hw/std/pcores/nf10_nic_output_port_lookup_v1_00_a; \ fi; \ if test -f lib/hw/std/pcores/nf10_router_output_port_lookup_v1_00_a/Makefile; \ then make -C lib/hw/std/pcores/nf10_router_output_port_lookup_v1_00_a; \ fi; \ if test -f lib/hw/std/pcores/nf10_switch_output_port_lookup_v1_00_a/Makefile; \ then make -C lib/hw/std/pcores/nf10_switch_output_port_lookup_v1_00_a; \ fi; \ if test -f lib/hw/std/pcores/nf10_switch_output_prot_lookup_v1_10_a/Makefile; \ then make -C lib/hw/std/pcores/nf10_switch_output_prot_lookup_v1_10_a; \ fi; make[1]: Entering directory /home/karin/NetFPGA-10G-live-devel/lib/hw/contrib/pcores/mdio_ctrl_v1_00_a' make[1]: Nothing to be done forinstall'. make[1]: Leaving directory /home/karin/NetFPGA-10G-live-devel/lib/hw/contrib/pcores/mdio_ctrl_v1_00_a' make[1]: Entering directory /home/karin/NetFPGA-10G-live-devel/lib/hw/contrib/pcores/nf1_cml_interface_v1_00_a' /bin/sh: coregen: command not found make[1]: * [trimac] Error 127 make[1]: Leaving directory /home/karin/NetFPGA-10G-live-devel/lib/hw/contrib/pcores/nf1_cml_interface_v1_00_a' make[1]: Entering directory /home/karin/NetFPGA-10G-live-devel/lib/hw/std/pcores/dma_v1_20_a' /bin/sh: coregen: command not found make[1]: * [hdl/verilog/xilinx/pcie_7x_v1_7.v] Error 127 make[1]: Leaving directory /home/karin/NetFPGA-10G-live-devel/lib/hw/std/pcores/dma_v1_20_a' make[1]: Entering directory /home/karin/NetFPGA-10G-live-devel/lib/hw/std/pcores/nf10_axis_gen_check_v1_00_a' make[1]: Nothing to be done for install'. make[1]: Leaving directory /home/karin/NetFPGA-10G-live-devel/lib/hw/std/pcores/nf10_axis_gen_check_v1_00_a' make[1]: Entering directory /home/karin/NetFPGA-10G-live-devel/lib/hw/std/pcores/nf10_bram_output_queues_v1_00_a' make[1]: Nothing to be done forinstall'. make[1]: Leaving directory /home/karin/NetFPGA-10G-live-devel/lib/hw/std/pcores/nf10_bram_output_queues_v1_00_a' make[1]: Entering directory /home/karin/NetFPGA-10G-live-devel/lib/hw/std/pcores/nf10_input_arbiter_v1_00_a' make[1]: Nothing to be done for install'. make[1]: Leaving directory /home/karin/NetFPGA-10G-live-devel/lib/hw/std/pcores/nf10_input_arbiter_v1_00_a' make[1]: Entering directory /home/karin/NetFPGA-10G-live-devel/lib/hw/std/pcores/nf10_nic_output_port_lookup_v1_00_a' make[1]: Nothing to be done forinstall'. make[1]: Leaving directory `/home/karin/NetFPGA-10G-live-devel/lib/hw/std/pcores/nf10_nic_output_port_lookup_v1_00_a'

The following error occurred:

make[1]: Entering directory /home/karin/NetFPGA-10G-live-devel/lib/hw/contrib/pcores/nf1_cml_interface_v1_00_a' /bin/sh: coregen: command not found make[1]: *** [trimac] Error 127 make[1]: Leaving directory/home/karin/NetFPGA-10G-live-devel/lib/hw/contrib/pcores/nf1_cml_interface_v1_00_a' make[1]: Entering directory `/home/karin/NetFPGA-10G-live-devel/lib/hw/std/pcores/dma_v1_20_a' /bin/sh: coregen: command not found make[1]: *\ [hdl/verilog/xilinx/pcie_7x_v1_7.v] Error 127

What's the problem? and after compiling, what's the specific command to install this package?

Thanks.

On Wed, Apr 23, 2014 at 8:00 PM, jhirata notifications@github.com wrote:

Hi, Can you do a ls -al tools/scripts/link-py-interpreter.sh from your repository root to see what the file permissions are for the link-py-interpreter.sh file?

Thanks, Jay

— Reply to this email directly or view it on GitHubhttps://github.com/cmlab/NetFPGA-1G-CML/issues/1#issuecomment-41175446 .

[jhirata]

You mentioned in a previous email that you were defining the XILINX_EDK environment variable. There are a bunch of paths that need to be set up as well. Under /opt/Xilinx/14.6/ISE_DS/ you should find the files settings32.sh, settings64.sh, settings32.csh, and settings64.csh. You'll want to source one of those files from your shell. For example, I'm using the bash shell on a 64bit linux. So, I run the command source /opt/Xilinx/14.6/ISE_DS/settings64.sh. This sets up XILINX_EDK, other environment variables, and your path. This is how Xilinx recommends setting up your environment for when you run their tools. After sourcing the settings file, try running the make command again.

Jay

On 04/24/2014 01:31 AM, eselahe wrote:

Hi Jay,

Thanks for this comment, because I understood the permission of all files have changed but I can't understand why this occurs. I downloaded NetFPGA-10G-live-devel package, again, checked the file permissions and compiled it. This time I received below messages:

[root@localhost NetFPGA-10G-live-devel]# make cml_cores make -C tools/scripts make[1]: Entering directory /home/karin/NetFPGA-10G-live-devel/tools/scripts' ./link-py-interpreter.sh Found python interpreter: /usr/bin/python2.7 ln -s /usr/bin/python2.7 ./python-nf make[1]: Leaving directory /home/karin/NetFPGA-10G-live-devel/tools/scripts' if test -f lib/hw/contrib/pcores/mdio_ctrl_v1_00_a/Makefile; \ then make -C lib/hw/contrib/pcores/mdio_ctrl_v1_00_a; \ fi; \ if test -f lib/hw/contrib/pcores/nf1_cml_interface_v1_00_a/Makefile; \ then make -C lib/hw/contrib/pcores/nf1_cml_interface_v1_00_a; \ fi; \ if test -f lib/hw/contrib/pcores/nf10_endianess_manager_v1_00_a/Makefile; \ then make -C lib/hw/contrib/pcores/nf10_endianess_manager_v1_00_a; \ fi; \ if test -f lib/hw/contrib/pcores/version_id_v1_00_a/Makefile; \ then make -C lib/hw/contrib/pcores/version_id_v1_00_a; \ fi; \ if test -f lib/hw/std/pcores/dma_v1_20_a/Makefile; \ then make -C lib/hw/std/pcores/dma_v1_20_a; \ fi; \ if test -f lib/hw/std/pcores/nf10_axis_gen_check_v1_00_a/Makefile; \ then make -C lib/hw/std/pcores/nf10_axis_gen_check_v1_00_a; \ fi; \ if test -f lib/hw/std/pcores/nf10_bram_output_queues_v1_00_a/Makefile; \ then make -C lib/hw/std/pcores/nf10_bram_output_queues_v1_00_a; \ fi; \ if test -f lib/hw/std/pcores/nf10_input_arbiter_v1_00_a/Makefile; \ then make -C lib/hw/std/pcores/nf10_input_arbiter_v1_00_a; \ fi; \ if test -f lib/hw/std/pcores/nf10_nic_output_port_lookup_v1_00_a/Makefile; \ then make -C lib/hw/std/pcores/nf10_nic_output_port_lookup_v1_00_a; \ fi; \ if test -f lib/hw/std/pcores/nf10_router_output_port_lookup_v1_00_a/Makefile; \ then make -C lib/hw/std/pcores/nf10_router_output_port_lookup_v1_00_a; \ fi; \ if test -f lib/hw/std/pcores/nf10_switch_output_port_lookup_v1_00_a/Makefile; \ then make -C lib/hw/std/pcores/nf10_switch_output_port_lookup_v1_00_a; \ fi; \ if test -f lib/hw/std/pcores/nf10_switch_output_prot_lookup_v1_10_a/Makefile; \ then make -C lib/hw/std/pcores/nf10_switch_output_prot_lookup_v1_10_a; \ fi; make[1]: Entering directory `/home/karin/NetFPGA-10G-live-devel/lib/hw/contrib/pcores/mdio_ctrl_v1_00_a'

make[1]: Nothing to be done for install'. make[1]: Leaving directory /home/karin/NetFPGA-10G-live-devel/lib/hw/contrib/pcores/mdio_ctrl_v1_00_a'

make[1]: Entering directory `/home/karin/NetFPGA-10G-live-devel/lib/hw/contrib/pcores/nf1_cml_interface_v1_00_a'

/bin/sh: coregen: command not found make[1]: *\ [trimac] Error 127 make[1]: Leaving directory `/home/karin/NetFPGA-10G-live-devel/lib/hw/contrib/pcores/nf1_cml_interface_v1_00_a'

make[1]: Entering directory /home/karin/NetFPGA-10G-live-devel/lib/hw/std/pcores/dma_v1_20_a' /bin/sh: coregen: command not found make[1]: *** [hdl/verilog/xilinx/pcie_7x_v1_7.v] Error 127 make[1]: Leaving directory /home/karin/NetFPGA-10G-live-devel/lib/hw/std/pcores/dma_v1_20_a' make[1]: Entering directory `/home/karin/NetFPGA-10G-live-devel/lib/hw/std/pcores/nf10_axis_gen_check_v1_00_a'

make[1]: Nothing to be done for install'. make[1]: Leaving directory /home/karin/NetFPGA-10G-live-devel/lib/hw/std/pcores/nf10_axis_gen_check_v1_00_a'

make[1]: Entering directory `/home/karin/NetFPGA-10G-live-devel/lib/hw/std/pcores/nf10_bram_output_queues_v1_00_a'

make[1]: Nothing to be done for install'. make[1]: Leaving directory /home/karin/NetFPGA-10G-live-devel/lib/hw/std/pcores/nf10_bram_output_queues_v1_00_a'

make[1]: Entering directory `/home/karin/NetFPGA-10G-live-devel/lib/hw/std/pcores/nf10_input_arbiter_v1_00_a'

make[1]: Nothing to be done for install'. make[1]: Leaving directory /home/karin/NetFPGA-10G-live-devel/lib/hw/std/pcores/nf10_input_arbiter_v1_00_a'

make[1]: Entering directory `/home/karin/NetFPGA-10G-live-devel/lib/hw/std/pcores/nf10_nic_output_port_lookup_v1_00_a'

make[1]: Nothing to be done for install'. make[1]: Leaving directory /home/karin/NetFPGA-10G-live-devel/lib/hw/std/pcores/nf10_nic_output_port_lookup_v1_00_a'

The following error occurred:

make[1]: Entering directory `/home/karin/NetFPGA-10G-live-devel/lib/hw/std/pcores/dma_v1_20_a' /bin/sh: coregen: command not found make[1]: *\ [hdl/verilog/xilinx/pcie_7x_v1_7.v] Error 127

What's the problem? and after compiling, what's the specific command to install this package?

Thanks.

On Wed, Apr 23, 2014 at 8:00 PM, jhirata notifications@github.com wrote:

Hi, Can you do a ls -al tools/scripts/link-py-interpreter.sh from your repository root to see what the file permissions are for the link-py-interpreter.sh file?

Thanks, Jay

— Reply to this email directly or view it on GitHubhttps://github.com/cmlab/NetFPGA-1G-CML/issues/1#issuecomment-41175446 .

— Reply to this email directly or view it on GitHub https://github.com/cmlab/NetFPGA-1G-CML/issues/1#issuecomment-41251328.

[eselahe]

My problem solved. Thank you very much.

Best regards eselahe

On 4/24/14, jhirata notifications@github.com wrote:

You mentioned in a previous email that you were defining the XILINX_EDK environment variable. There are a bunch of paths that need to be set up as well. Under /opt/Xilinx/14.6/ISE_DS/ you should find the files settings32.sh, settings64.sh, settings32.csh, and settings64.csh. You'll want to source one of those files from your shell. For example, I'm using the bash shell on a 64bit linux. So, I run the command source /opt/Xilinx/14.6/ISE_DS/settings64.sh. This sets up XILINX_EDK, other environment variables, and your path. This is how Xilinx recommends setting up your environment for when you run their tools. After sourcing the settings file, try running the make command again.

Jay

On 04/24/2014 01:31 AM, eselahe wrote:

Hi Jay,

Thanks for this comment, because I understood the permission of all files have changed but I can't understand why this occurs. I downloaded NetFPGA-10G-live-devel package, again, checked the file permissions and compiled it. This time I received below messages:

[root@localhost NetFPGA-10G-live-devel]# make cml_cores make -C tools/scripts make[1]: Entering directory /home/karin/NetFPGA-10G-live-devel/tools/scripts' ./link-py-interpreter.sh Found python interpreter: /usr/bin/python2.7 ln -s /usr/bin/python2.7 ./python-nf make[1]: Leaving directory /home/karin/NetFPGA-10G-live-devel/tools/scripts' if test -f lib/hw/contrib/pcores/mdio_ctrl_v1_00_a/Makefile; \ then make -C lib/hw/contrib/pcores/mdio_ctrl_v1_00_a; \ fi; \ if test -f lib/hw/contrib/pcores/nf1_cml_interface_v1_00_a/Makefile; \ then make -C lib/hw/contrib/pcores/nf1_cml_interface_v1_00_a; \ fi; \ if test -f lib/hw/contrib/pcores/nf10_endianess_manager_v1_00_a/Makefile; \ then make -C lib/hw/contrib/pcores/nf10_endianess_manager_v1_00_a; \ fi; \ if test -f lib/hw/contrib/pcores/version_id_v1_00_a/Makefile; \ then make -C lib/hw/contrib/pcores/version_id_v1_00_a; \ fi; \ if test -f lib/hw/std/pcores/dma_v1_20_a/Makefile; \ then make -C lib/hw/std/pcores/dma_v1_20_a; \ fi; \ if test -f lib/hw/std/pcores/nf10_axis_gen_check_v1_00_a/Makefile; \ then make -C lib/hw/std/pcores/nf10_axis_gen_check_v1_00_a; \ fi; \ if test -f lib/hw/std/pcores/nf10_bram_output_queues_v1_00_a/Makefile; \ then make -C lib/hw/std/pcores/nf10_bram_output_queues_v1_00_a; \ fi; \ if test -f lib/hw/std/pcores/nf10_input_arbiter_v1_00_a/Makefile; \ then make -C lib/hw/std/pcores/nf10_input_arbiter_v1_00_a; \ fi; \ if test -f lib/hw/std/pcores/nf10_nic_output_port_lookup_v1_00_a/Makefile; \ then make -C lib/hw/std/pcores/nf10_nic_output_port_lookup_v1_00_a; \ fi; \ if test -f lib/hw/std/pcores/nf10_router_output_port_lookup_v1_00_a/Makefile; \ then make -C lib/hw/std/pcores/nf10_router_output_port_lookup_v1_00_a; \ fi; \ if test -f lib/hw/std/pcores/nf10_switch_output_port_lookup_v1_00_a/Makefile; \ then make -C lib/hw/std/pcores/nf10_switch_output_port_lookup_v1_00_a; \ fi; \ if test -f lib/hw/std/pcores/nf10_switch_output_prot_lookup_v1_10_a/Makefile; \ then make -C lib/hw/std/pcores/nf10_switch_output_prot_lookup_v1_10_a; \ fi; make[1]: Entering directory `/home/karin/NetFPGA-10G-live-devel/lib/hw/contrib/pcores/mdio_ctrl_v1_00_a'

make[1]: Nothing to be done for install'. make[1]: Leaving directory /home/karin/NetFPGA-10G-live-devel/lib/hw/contrib/pcores/mdio_ctrl_v1_00_a'

make[1]: Entering directory `/home/karin/NetFPGA-10G-live-devel/lib/hw/contrib/pcores/nf1_cml_interface_v1_00_a'

/bin/sh: coregen: command not found make[1]: *\ [trimac] Error 127 make[1]: Leaving directory `/home/karin/NetFPGA-10G-live-devel/lib/hw/contrib/pcores/nf1_cml_interface_v1_00_a'

make[1]: Entering directory /home/karin/NetFPGA-10G-live-devel/lib/hw/std/pcores/dma_v1_20_a' /bin/sh: coregen: command not found make[1]: *** [hdl/verilog/xilinx/pcie_7x_v1_7.v] Error 127 make[1]: Leaving directory /home/karin/NetFPGA-10G-live-devel/lib/hw/std/pcores/dma_v1_20_a' make[1]: Entering directory `/home/karin/NetFPGA-10G-live-devel/lib/hw/std/pcores/nf10_axis_gen_check_v1_00_a'

make[1]: Nothing to be done for install'. make[1]: Leaving directory /home/karin/NetFPGA-10G-live-devel/lib/hw/std/pcores/nf10_axis_gen_check_v1_00_a'

make[1]: Entering directory `/home/karin/NetFPGA-10G-live-devel/lib/hw/std/pcores/nf10_bram_output_queues_v1_00_a'

make[1]: Nothing to be done for install'. make[1]: Leaving directory /home/karin/NetFPGA-10G-live-devel/lib/hw/std/pcores/nf10_bram_output_queues_v1_00_a'

make[1]: Entering directory `/home/karin/NetFPGA-10G-live-devel/lib/hw/std/pcores/nf10_input_arbiter_v1_00_a'

make[1]: Nothing to be done for install'. make[1]: Leaving directory /home/karin/NetFPGA-10G-live-devel/lib/hw/std/pcores/nf10_input_arbiter_v1_00_a'

make[1]: Entering directory `/home/karin/NetFPGA-10G-live-devel/lib/hw/std/pcores/nf10_nic_output_port_lookup_v1_00_a'

make[1]: Nothing to be done for install'. make[1]: Leaving directory /home/karin/NetFPGA-10G-live-devel/lib/hw/std/pcores/nf10_nic_output_port_lookup_v1_00_a'

The following error occurred:

make[1]: Entering directory `/home/karin/NetFPGA-10G-live-devel/lib/hw/std/pcores/dma_v1_20_a' /bin/sh: coregen: command not found make[1]: *\ [hdl/verilog/xilinx/pcie_7x_v1_7.v] Error 127

What's the problem? and after compiling, what's the specific command to install this package?

Thanks.

On Wed, Apr 23, 2014 at 8:00 PM, jhirata notifications@github.com wrote:

Hi, Can you do a ls -al tools/scripts/link-py-interpreter.sh from your repository root to see what the file permissions are for the link-py-interpreter.sh file?

Thanks, Jay

— Reply to this email directly or view it on GitHubhttps://github.com/cmlab/NetFPGA-1G-CML/issues/1#issuecomment-41175446 .

— Reply to this email directly or view it on GitHub https://github.com/cmlab/NetFPGA-1G-CML/issues/1#issuecomment-41251328.

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Reply to this email directly or view it on GitHub: https://github.com/cmlab/NetFPGA-1G-CML/issues/1#issuecomment-41288829

[hitly2006]

good， solve my problem，thanks