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Information about the NetFPGA 1G-CML card
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PmodUSBUART does not work in Kintex7_1G_CML NetFPGA #19

Open TuanGCS opened 7 years ago

TuanGCS commented 7 years ago

Dear all,

I am developing the Packet_Processing project , that DPI the RTP Video Stream. I need to capture the Value of Timestamp, SSRC … to PC Host via USB_UART. Due to NetFPGA 1G CML is not supported BSP file, so I must create the EDK using option "Create a System for a Customer board" to connect the PmodUSBUART, and add some code to display “hello” on PC Host through UART. The nets in system.ucf are listed below:

NET axi_uartlite_0_RX_pin LOC = E15 | IOSTANDARD = LVCMOS33; NET axi_uartlite_0_TX_pin LOC = H18 | IOSTANDARD = LVCMOS33; However there is nothing to display PC.

Please anybody give me the suggestions / advice Thanks

Tuan Trong

davidva-cml commented 7 years ago

Hello,

The location constraints for your UART pins appear to be backward. The TX line should be at pin E15, and the RX line at pin H18. So, your UCF should have these lines:

NET axi_uartlite_0_RX_pin LOC = H18 | IOSTANDARD = LVCMOS33; NET axi_uartlite_0_TX_pin LOC = E15 | IOSTANDARD = LVCMOS33;

David

On 09/09/2016 09:29 PM, TuanGCS wrote:

Dear all,

I am developing the Packet_Processing project , that DPI the RTP Video Stream. I need to capture the Value of Timestamp, SSRC … to PC Host via USB_UART. Due to NetFPGA 1G CML is not supported BSP file, so I must create the EDK using option "Create a System for a Customer board" to connect the PmodUSBUART, and add some code to display “hello” on PC Host through UART. The nets in system.ucf are listed below:

NET axi_uartlite_0_RX_pin LOC = E15 | IOSTANDARD = LVCMOS33; NET axi_uartlite_0_TX_pin LOC = H18 | IOSTANDARD = LVCMOS33; However there is nothing to display PC.

Please anybody give me the suggestions / advice Thanks

Tuan Trong

— You are receiving this because you are subscribed to this thread. Reply to this email directly, view it on GitHub https://github.com/cmlab/NetFPGA-1G-CML/issues/19, or mute the thread https://github.com/notifications/unsubscribe-auth/AELP4_DsbDU6BCqCzIn6nlDGOPmSk3RWks5qoiQMgaJpZM4J5n5E.

Thanks, David Van Arnem Development Engineer Computer Measurement Laboratory, LLC

TuanGCS commented 7 years ago

Hi Mr. David,

Yes, i shall try following your.

Thanks

Tuan Trong

On 9/13/2016 12:25 AM, davidva-cml wrote:

Hello,

The location constraints for your UART pins appear to be backward. The TX line should be at pin E15, and the RX line at pin H18. So, your UCF should have these lines:

NET axi_uartlite_0_RX_pin LOC = H18 | IOSTANDARD = LVCMOS33; NET axi_uartlite_0_TX_pin LOC = E15 | IOSTANDARD = LVCMOS33;

David

On 09/09/2016 09:29 PM, TuanGCS wrote:

Dear all,

I am developing the Packet_Processing project , that DPI the RTP Video Stream. I need to capture the Value of Timestamp, SSRC … to PC Host via USB_UART. Due to NetFPGA 1G CML is not supported BSP file, so I must create the EDK using option "Create a System for a Customer board" to connect the PmodUSBUART, and add some code to display “hello” on PC Host through UART. The nets in system.ucf are listed below:

NET axi_uartlite_0_RX_pin LOC = E15 | IOSTANDARD = LVCMOS33; NET axi_uartlite_0_TX_pin LOC = H18 | IOSTANDARD = LVCMOS33; However there is nothing to display PC.

Please anybody give me the suggestions / advice Thanks

Tuan Trong

— You are receiving this because you are subscribed to this thread. Reply to this email directly, view it on GitHub https://github.com/cmlab/NetFPGA-1G-CML/issues/19, or mute the thread

https://github.com/notifications/unsubscribe-auth/AELP4_DsbDU6BCqCzIn6nlDGOPmSk3RWks5qoiQMgaJpZM4J5n5E.

Thanks, David Van Arnem Development Engineer Computer Measurement Laboratory, LLC

— You are receiving this because you authored the thread. Reply to this email directly, view it on GitHub https://github.com/cmlab/NetFPGA-1G-CML/issues/19#issuecomment-246424337, or mute the thread https://github.com/notifications/unsubscribe-auth/AUYwsyY1XvX7x77EZ388FY7HZIJtPe2eks5qpYskgaJpZM4J5n5E.

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