Some name changes etc. are not essential, but would make the code easier to understand. They would require synchronised changes to FW & SW, so should only be made immediately after a FW sync.
Current thinking: delay this until Old L1Trk C++ replaced by Future L1Trk C++.
When configured for Hybrid, C++ should write wires.dat, in which FitTrack is renamed TrackBuilder (TB) to better describe that this processing module is.
Each TB should have 9 output streams (1 track stream, 4 barrel layer stub streams, 4 disk layer stub streams). All 9 streams should connect to the same Duplicate Removal module (DR). Each DR should output same 9 streams, multiplied by the number of output q/Pt bins (2 or 12?).
The TrackBuilder writes to the TrackFit memory. The latter also needs remaining to something more meaningful. But the TrackBuilder FW doesn't write to BRAM, but streams out its output, so no memory should be there at all.
In LUTs/memories.dat, the memory bit widths, which are hard-wired by TrackFindingTracklet/src/TrackletConfigBuilder.cc are out-of-date. Unless they can be calculated, to ensure they are correct, please delete them.
slotToDTCname_ in Settings.h should be changed to:
since there are only 3 PS10G slots per ATCA crate. Similar change needed to dtclayers_. This changes these names in wires.dat & memory test data, so affects the HLS code.
Some name changes etc. are not essential, but would make the code easier to understand. They would require synchronised changes to FW & SW, so should only be made immediately after a FW sync.
Current thinking: delay this until Old L1Trk C++ replaced by Future L1Trk C++.
When configured for Hybrid, C++ should write wires.dat, in which FitTrack is renamed TrackBuilder (TB) to better describe that this processing module is.
Each TB should have 9 output streams (1 track stream, 4 barrel layer stub streams, 4 disk layer stub streams). All 9 streams should connect to the same Duplicate Removal module (DR). Each DR should output same 9 streams, multiplied by the number of output q/Pt bins (2 or 12?).
The TrackBuilder writes to the TrackFit memory. The latter also needs remaining to something more meaningful. But the TrackBuilder FW doesn't write to BRAM, but streams out its output, so no memory should be there at all.
In LUTs/memories.dat, the memory bit widths, which are hard-wired by TrackFindingTracklet/src/TrackletConfigBuilder.cc are out-of-date. Unless they can be calculated, to ensure they are correct, please delete them.
slotToDTCname_ in Settings.h should be changed to:
"PS10G_1","PS10G_2","PS10G_3","PS_1","PS_2","PS_3","2S_1","2S_2","2S_3","2S_4","2S_5","2S_6"
since there are only 3 PS10G slots per ATCA crate. Similar change needed to dtclayers_. This changes these names in wires.dat & memory test data, so affects the HLS code.