Use arrays & generate loops for TE LUT tables

cms-L1TK / project_generation_scripts

Python scripts to generate the wiring map of the tracklet pattern recognition & the top-level HDL that calls the HLS modules in the Hybrid Chain.

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Use arrays & generate loops for TE LUT tables #25

Open tomalin opened 3 years ago

tomalin commented 3 years ago

As a future improvement, the LUT-related signals in SectorProcessor.vhd, such as TE_L1PHIC12_L2PHIB10_bendinnertable_addr should be declared in an array with enum index, such as TE_bendinnertable_addr(L1PHIC12_L2PHIB10). And the instantiation of the "work.tf_lut" done inside "generate" loop. This will make the VHDL more compact.