[Hotfix] v1.1.X: Fixed a bug where the trigger rate counter was cleared before it was read

Description

FPGA was clearing the trigger rate counter before the SW routine was reading it. Lead to an incorrect rate measurement and discontinuity in the rate plot.

Now also including the commit from https://github.com/cms-gem-daq-project/ctp7_modules/pull/121

Types of changes

[x] Bug fix (non-breaking change which fixes an issue)
[ ] New feature (non-breaking change which adds functionality)
[ ] Breaking change (fix or feature that would cause existing functionality to change)

Motivation and Context

See problem plots here

How Has This Been Tested?

See working routine, third plot here

Screenshots (if appropriate):

Checklist:

[ ] My code follows the code style of this project.
[ ] My change requires a change to the documentation.
[ ] I have updated the documentation accordingly.
[x] I have added tests to cover my changes.
[x] All new and existing tests passed.

cms-gem-daq-project / ctp7_modules