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cms-gem-daq-project / xhal

XHAL interface library
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v3.1.0 Release preparation #54

Closed mexanick closed 6 years ago

mexanick commented 6 years ago

Few changes in view of v3.1.0 release

Description

New features:

Breaking changes:

Bugfixes:

Types of changes

Motivation and Context

Provides some requested feature and makes code better maintanable

How Has This Been Tested?

Screenshots (if appropriate):

Checklist:

jsturdy commented 6 years ago

Would it make more sense to have the write test write random data? Suppose it depends on what this test is supposed to accomplish/probe

mexanick commented 6 years ago

Well, I wrote it quickly to have some watchdog stability tests... I don't think it is very useful indeed, but since I already wrote it, I don't see the reason to exclude it from the PR. The choice to write 1 was made because it was developed to test a kind of write-only regs where it doesn't matter what do you write

bdorney commented 6 years ago

The choice to write 1 was made because it was developed to test a kind of write-only regs where it doesn't matter what do you write

In some rare cases I am not sure that writing 1 will be a valid test, e.g. imaging the case where we have some signal inversion/flip in the firmware. Will writing 1 be valid? What about a register whose initial value is 1?

I would propose to add the ability to write a pattern of 1's and 0's on top of current functionality, the user could specify the pattern e.g. "pattern = 0b1010101"

And then it would write it and read it back. If this is too involved it could be tabled to a future release/new feature PR. I am not really sure on it's overall value. Would probably need input from @evka85 or @andrewpeck.

mexanick commented 6 years ago

The readKW and kw methods remain intact.

On Mar 12, 2018 10:17, Brian Dorney notifications@github.com wrote:

@bdorney requested changes on this pull request.

Require clarification regarding backwards compatibility of reg_interface keywords.

— You are receiving this because you were assigned. Reply to this email directly, view it on GitHubhttps://github.com/cms-gem-daq-project/xhal/pull/54#pullrequestreview-102964589, or mute the threadhttps://github.com/notifications/unsubscribe-auth/AHFalrCcG1KKSjOFhVv2Yxh2aEYKdo8hks5tdjzYgaJpZM4SkpLI.

mexanick commented 6 years ago

I don't think it requires attention in current release

On Mar 12, 2018 10:14, Brian Dorney notifications@github.com wrote:

The choice to write 1 was made because it was developed to test a kind of write-only regs where it doesn't matter what do you write

In some rare cases I am not sure that writing 1 will be a valid test, e.g. imaging the case where we have some signal inversion/flip in the firmware. Will writing 1 be valid? What about a register whose initial value is 1?

I would propose to add the ability to write a pattern of 1's and 0's on top of current functionality, the user could specify the pattern e.g. "pattern = 0b1010101"

And then it would write it and read it back. If this is too involved it could be tabled to a future release/new feature PR. I am not really sure on it's overall value. Would probably need input from @evka85https://github.com/evka85 or @andrewpeckhttps://github.com/andrewpeck.

— You are receiving this because you were assigned. Reply to this email directly, view it on GitHubhttps://github.com/cms-gem-daq-project/xhal/pull/54#issuecomment-372239785, or mute the threadhttps://github.com/notifications/unsubscribe-auth/AHFalhL_h0MGttpivhoMU_-O39FcmD2Eks5tdjxBgaJpZM4SkpLI.