Parser missing IRQs (CMSDK_CM3.svd)

[tinylabs]

While parsing ARM CMSDK_CM3.svd extracted from Keil.V2M-MPS2_CMx_BSP.1.7.0.pack it appears the second IRQs for all peripherals are missing. Everything looks fine when I examine the SVD file manually. This device is of special importance as its available in QEMU. Any assistance would be appreciated as my python skills are poor.

[posborne]

I pulled down this file. I believe the SVD provided by ARM does follow the spec but does it in a way that is more than a little obnoxious and different than how all the vendors appear to be doing things (at least as far as I have encountered)

CMSDK_CM3.svd:

        <interrupt>
            <name>UART0_RX</name>
            <description>UART 0 Receive Interrupt</description>
            <value>0</value>
            <name>UART0_TX</name>
            <description>UART 0 Transmit Interrupt</description>
            <value>1</value>
        </interrupt>

How everyone else does it:

        <interrupt>
            <name>UART0_RX</name>
            <description>UART 0 Receive Interrupt</description>
            <value>0</value>
        </interrupt>
        <interrrupt>
            <name>UART0_TX</name>
            <description>UART 0 Transmit Interrupt</description>
            <value>1</value>
        </interrupt>

However, the schema does have the type for "interrupt" defined as follows:

  <!-- interruptType specifies how to describe an interrupt associated with a peripheral -->
  <xs:complexType name="interruptType">
    <xs:sequence>
      <xs:element name="name" type="stringType"/>
      <xs:element name="description" type="xs:string" minOccurs="0"/>
      <xs:element name="value" type="xs:integer"/>
    </xs:sequence>
  </xs:complexType>

Which, if I understand xs:sequence correctly requires a specific order and allow for elements within a given interrupt section to occur more than once. I'll have to look at how to change code to accommodate and figure out where else the spec decided to allow this asinine form of expression.