Rockwell1799
commented
2 months ago RCC->APB2PRSTR |= RCC_APB2Periph_ADC1; is wrong. It should be RCC->APB2PCENR |=RCC_ADC1EN;
Everything is working fine now.
Closed Rockwell1799 closed 2 months ago
Rockwell1799
commented
2 months ago RCC->APB2PRSTR |= RCC_APB2Periph_ADC1; is wrong. It should be RCC->APB2PCENR |=RCC_ADC1EN;
Everything is working fine now.
Rockwell1799
commented
2 months ago The issue is closed.
cnlohr
commented
2 months ago RCC_ADC1EN and RCC_APB2Periph_ADC1 are both 0x200. and it is using RCC->APB2PCENR https://github.com/cnlohr/ch32v003fun/blob/master/examples/adc_polled/adc_polled.c#L18C2-L18C16
cnlohr
commented
2 months ago If there's an issue, I'd really like to fix the example.
Rockwell1799
commented
2 months ago If there's an issue, I'd really like to fix the example.
The examples/adc_polled/adc_polled.c line 18 must be corrected to:
RCC->APB2PCENR |= RCC_APB2Periph_GPIOD | RCC_ADC1EN;
emeb
commented
2 months ago (original author here) I agree that RCC_ADC1EN is preferred given that's how the register is defined in the .h file. It may resolve to the same thing as RCC_APB2Periph_ADC1 for the V003 but might change for other targets. I'll test and submit a PR shortly.
--edit-- On further reflection I'm ambivalent about this change. As cnlohr noted above, the values of RCC_ADC1EN and RCC_APB2Periph_ADC1 are identical and if we were going to use RCC_ADC1EN in the context of of RCC->APB2PCENR then we should also be using RCC_IPOxEN for GPIO clock enables when we touch that register and that would require changing a lot of code.
I'm not convinced that the change from RCC_APB2Periph_ADC1 to RCC_ADC1EN is the root cause of the fix noted above.
Rockwell1799
commented
2 months ago (original author here) I agree that RCC_ADC1EN is preferred given that's how the register is defined in the .h file. It may resolve to the same thing as RCC_APB2Periph_ADC1 for the V003 but might change for other targets. I'll test and submit a PR shortly.
--edit-- On further reflection I'm ambivalent about this change. As cnlohr noted above, the values of RCC_ADC1EN and RCC_APB2Periph_ADC1 are identical and if we were going to use RCC_ADC1EN in the context of of RCC->APB2PCENR then we should also be using RCC_IPOxEN for GPIO clock enables when we touch that register and that would require changing a lot of code.
I'm not convinced that the change from RCC_APB2Periph_ADC1 to RCC_ADC1EN is the root cause of the fix noted above.
I'm using a CH32v003 chip and when I use RCC_APB2Periph_ADC1, the ADC clock is not enabled for some reason.
cnlohr
commented
2 months ago Can you post the binary (and .lst) file from both of your attempts, @Rockwell1799 ?
Rockwell1799
commented
2 months ago Can you post the binary (and .lst) file from both of your attempts, @Rockwell1799 ? .lst file with RCC->APB2PCENR |= RCC_APB2Periph_ADC1;
ADC_POLLING.elf: file format elf32-littleriscv
ADC_POLLING.elf
architecture: riscv:rv32, flags 0x00000112:
EXEC_P, HAS_SYMS, D_PAGED
start address 0x000000a0
Program Header:
LOAD off 0x00001000 vaddr 0x00000000 paddr 0x00000000 align 2**12
filesz 0x0000071c memsz 0x0000071c flags r-x
LOAD off 0x00002000 vaddr 0x20000000 paddr 0x0000071c align 2**12
filesz 0x00000000 memsz 0x00000004 flags rw-
LOAD off 0x00002700 vaddr 0x20000700 paddr 0x20000700 align 2**12
filesz 0x00000000 memsz 0x00000100 flags rw-
Sections:
Idx Name Size VMA LMA File off Algn
0 .init 000000a0 00000000 00000000 00001000 2**2
CONTENTS, ALLOC, LOAD, READONLY, CODE
1 .text 0000067c 000000a0 000000a0 000010a0 2**2
CONTENTS, ALLOC, LOAD, READONLY, CODE
2 .fini 00000000 0000071c 0000071c 0000171c 2**0
CONTENTS, ALLOC, LOAD, CODE
3 .dalign 00000000 20000000 20000000 0000171c 2**0
CONTENTS
4 .dlalign 00000000 0000071c 0000071c 0000171c 2**0
CONTENTS
5 .data 00000000 20000000 20000000 0000171c 2**0
CONTENTS, ALLOC, LOAD, DATA
6 .bss 00000004 20000000 0000071c 00002000 2**2
ALLOC
7 .stack 00000100 20000700 20000700 00002700 2**0
ALLOC
8 .debug_info 00002602 00000000 00000000 0000171c 2**0
CONTENTS, READONLY, DEBUGGING
9 .debug_abbrev 0000072b 00000000 00000000 00003d1e 2**0
CONTENTS, READONLY, DEBUGGING
10 .debug_loc 00001fa2 00000000 00000000 00004449 2**0
CONTENTS, READONLY, DEBUGGING
11 .debug_aranges 00000170 00000000 00000000 000063eb 2**0
CONTENTS, READONLY, DEBUGGING
12 .debug_ranges 000002a0 00000000 00000000 0000655b 2**0
CONTENTS, READONLY, DEBUGGING
13 .debug_line 00002592 00000000 00000000 000067fb 2**0
CONTENTS, READONLY, DEBUGGING
14 .debug_str 00000a02 00000000 00000000 00008d8d 2**0
CONTENTS, READONLY, DEBUGGING
15 .comment 00000033 00000000 00000000 0000978f 2**0
CONTENTS, READONLY
16 .debug_frame 000003c8 00000000 00000000 000097c4 2**2
CONTENTS, READONLY, DEBUGGING
SYMBOL TABLE:
00000000 l d .init 00000000 .init
000000a0 l d .text 00000000 .text
0000071c l d .fini 00000000 .fini
20000000 l d .dalign 00000000 .dalign
0000071c l d .dlalign 00000000 .dlalign
20000000 l d .data 00000000 .data
20000000 l d .bss 00000000 .bss
20000700 l d .stack 00000000 .stack
00000000 l d .debug_info 00000000 .debug_info
00000000 l d .debug_abbrev 00000000 .debug_abbrev
00000000 l d .debug_loc 00000000 .debug_loc
00000000 l d .debug_aranges 00000000 .debug_aranges
00000000 l d .debug_ranges 00000000 .debug_ranges
00000000 l d .debug_line 00000000 .debug_line
00000000 l d .debug_str 00000000 .debug_str
00000000 l d .comment 00000000 .comment
00000000 l d .debug_frame 00000000 .debug_frame
00000000 l df *ABS* 00000000 ch32v003fun.c
00000132 l F .text 00000084 mini_pad
000001b6 l F .text 0000003e _puts
000001f4 l F .text 000000ba mini_itoa.part.0
0000059a l F .text 00000012 __puts_uart
00000000 l df *ABS* 00000000 main.c
000004ee g F .text 0000002a printf
20000800 g .data 00000000 __global_pointer$
00000328 w F .text 00000002 TIM1_CC_IRQHandler
00000328 w F .text 00000002 HardFault_Handler
00000328 w F .text 00000002 SysTick_Handler
00000328 w F .text 00000002 PVD_IRQHandler
0000032a w F .text 0000000e NMI_Handler
00000518 g F .text 0000005a SetupUART
00000000 g F .init 0000009c InterruptVectorDefault
20000000 g .bss 00000000 _sbss
00000100 g *ABS* 00000000 __stack_size
000000aa g F .text 0000000a .hidden __riscv_restore_2
00000000 w F .init 0000009c InterruptVector
000000bc g F .text 0000002c .hidden __udivsi3
000000a0 g .init 00000000 _einit
00000328 w F .text 00000002 SPI1_IRQHandler
000000a0 g F .text 0000000a .hidden __riscv_save_1
000000aa g F .text 0000000a .hidden __riscv_restore_0
00000328 w F .text 00000002 AWU_IRQHandler
00000328 w F .text 00000002 EXTI7_0_IRQHandler
0000066e g F .text 00000028 adc_get
00000328 w F .text 00000002 DMA1_Channel4_IRQHandler
00000328 w F .text 00000002 ADC1_IRQHandler
20000004 g .bss 00000000 _ebss
00000328 w F .text 00000002 DMA1_Channel7_IRQHandler
000000e8 g F .text 00000008 .hidden __umodsi3
000005ac g F .text 00000016 DelaySysTick
00000328 w F .text 00000002 I2C1_EV_IRQHandler
00000328 w F .text 00000002 DMA1_Channel6_IRQHandler
00000328 w F .text 00000002 RCC_IRQHandler
00000328 w F .text 00000002 TIM1_TRG_COM_IRQHandler
00000328 w F .text 00000002 DMA1_Channel1_IRQHandler
00000000 *UND* 00000000 _start
00000328 g F .text 00000002 DefaultIRQHandler
20000000 g .dalign 00000000 _data_vma
0000032a g F .text 0000000e NMI_RCC_CSS_IRQHandler
0000034a g F .text 000001a4 mini_vpprintf
00000696 g F .text 00000070 main
00000328 w F .text 00000002 DMA1_Channel5_IRQHandler
000000b4 g F .text 00000058 .hidden __divsi3
000005c2 g F .text 00000052 SystemInit
20000000 g O .bss 00000004 count
00000000 g .init 00000000 _sinit
00000328 w F .text 00000002 DMA1_Channel3_IRQHandler
00000328 w F .text 00000002 TIM1_UP_IRQHandler
00000614 g F .text 0000005a adc_init
00000328 w F .text 00000002 WWDG_IRQHandler
00000328 w F .text 00000002 TIM2_IRQHandler
20000800 g .stack 00000000 _eusrstack
000000a0 g F .text 0000000a .hidden __riscv_save_2
00000328 w F .text 00000002 SW_Handler
00000328 w F .text 00000002 TIM1_BRK_IRQHandler
00000572 g F .text 00000028 _write
20000000 g .data 00000000 _edata
0000071c g .dlalign 00000000 _data_lma
0000010c g F .text 00000024 .hidden __modsi3
00000328 w F .text 00000002 DMA1_Channel2_IRQHandler
000002ae g F .text 0000007a handle_reset
000000a0 g F .text 0000000a .hidden __riscv_save_0
00000328 w F .text 00000002 FLASH_IRQHandler
00000328 w F .text 00000002 USART1_IRQHandler
00000338 g F .text 00000012 strlen
00000328 w F .text 00000002 I2C1_ER_IRQHandler
000000aa g F .text 0000000a .hidden __riscv_restore_1
Disassembly of section .init:
00000000 <InterruptVectorDefault>:
0: 2ae0006f j 2ae <handle_reset>
4: 0000 unimp
6: 0000 unimp
8: 032a slli t1,t1,0xa
a: 0000 unimp
c: 0328 addi a0,sp,392
...
2e: 0000 unimp
30: 0328 addi a0,sp,392
32: 0000 unimp
34: 0000 unimp
36: 0000 unimp
38: 0328 addi a0,sp,392
3a: 0000 unimp
3c: 0000 unimp
3e: 0000 unimp
40: 0328 addi a0,sp,392
42: 0000 unimp
44: 0328 addi a0,sp,392
46: 0000 unimp
48: 0328 addi a0,sp,392
4a: 0000 unimp
4c: 0328 addi a0,sp,392
4e: 0000 unimp
50: 0328 addi a0,sp,392
52: 0000 unimp
54: 0328 addi a0,sp,392
56: 0000 unimp
58: 0328 addi a0,sp,392
5a: 0000 unimp
5c: 0328 addi a0,sp,392
5e: 0000 unimp
60: 0328 addi a0,sp,392
62: 0000 unimp
64: 0328 addi a0,sp,392
66: 0000 unimp
68: 0328 addi a0,sp,392
6a: 0000 unimp
6c: 0328 addi a0,sp,392
6e: 0000 unimp
70: 0328 addi a0,sp,392
72: 0000 unimp
74: 0328 addi a0,sp,392
76: 0000 unimp
78: 0328 addi a0,sp,392
7a: 0000 unimp
7c: 0328 addi a0,sp,392
7e: 0000 unimp
80: 0328 addi a0,sp,392
82: 0000 unimp
84: 0328 addi a0,sp,392
86: 0000 unimp
88: 0328 addi a0,sp,392
8a: 0000 unimp
8c: 0328 addi a0,sp,392
8e: 0000 unimp
90: 0328 addi a0,sp,392
92: 0000 unimp
94: 0328 addi a0,sp,392
96: 0000 unimp
98: 0328 addi a0,sp,392
9a: 0000 unimp
9c: 0000 unimp
...
Disassembly of section .text:
000000a0 <__riscv_save_0>:
a0: 1151 addi sp,sp,-12
a2: c026 sw s1,0(sp)
a4: c222 sw s0,4(sp)
a6: c406 sw ra,8(sp)
a8: 8282 jr t0
000000aa <__riscv_restore_0>:
aa: 4482 lw s1,0(sp)
ac: 4412 lw s0,4(sp)
ae: 40a2 lw ra,8(sp)
b0: 0131 addi sp,sp,12
b2: 8082 ret
000000b4 <__divsi3>:
b4: 02054e63 bltz a0,f0 <__umodsi3+0x8>
b8: 0405c363 bltz a1,fe <__umodsi3+0x16>
000000bc <__udivsi3>:
bc: 862e mv a2,a1
be: 85aa mv a1,a0
c0: 557d li a0,-1
c2: c215 beqz a2,e6 <__udivsi3+0x2a>
c4: 4685 li a3,1
c6: 00b67863 bgeu a2,a1,d6 <__udivsi3+0x1a>
ca: 00c05663 blez a2,d6 <__udivsi3+0x1a>
ce: 0606 slli a2,a2,0x1
d0: 0686 slli a3,a3,0x1
d2: feb66ce3 bltu a2,a1,ca <__udivsi3+0xe>
d6: 4501 li a0,0
d8: 00c5e463 bltu a1,a2,e0 <__udivsi3+0x24>
dc: 8d91 sub a1,a1,a2
de: 8d55 or a0,a0,a3
e0: 8285 srli a3,a3,0x1
e2: 8205 srli a2,a2,0x1
e4: faf5 bnez a3,d8 <__udivsi3+0x1c>
e6: 8082 ret
000000e8 <__umodsi3>:
e8: 8286 mv t0,ra
ea: 3fc9 jal bc <__udivsi3>
ec: 852e mv a0,a1
ee: 8282 jr t0
f0: 40a00533 neg a0,a0
f4: 0005d763 bgez a1,102 <__stack_size+0x2>
f8: 40b005b3 neg a1,a1
fc: b7c1 j bc <__udivsi3>
fe: 40b005b3 neg a1,a1
102: 8286 mv t0,ra
104: 3f65 jal bc <__udivsi3>
106: 40a00533 neg a0,a0
10a: 8282 jr t0
0000010c <__modsi3>:
10c: 8286 mv t0,ra
10e: 0005c763 bltz a1,11c <__modsi3+0x10>
112: 00054963 bltz a0,124 <__modsi3+0x18>
116: 375d jal bc <__udivsi3>
118: 852e mv a0,a1
11a: 8282 jr t0
11c: 40b005b3 neg a1,a1
120: fe055be3 bgez a0,116 <__modsi3+0xa>
124: 40a00533 neg a0,a0
128: 3f51 jal bc <__udivsi3>
12a: 40b00533 neg a0,a1
12e: 8282 jr t0
...
00000132 <mini_pad>:
132: 4301 li t1,0
134: c2ad beqz a3,196 <mini_pad+0x64>
136: 00b6d463 bge a3,a1,13e <mini_pad+0xc>
13a: 85b6 mv a1,a3
13c: 4305 li t1,1
13e: 8e8d sub a3,a3,a1
140: 87ba mv a5,a4
142: 00d703b3 add t2,a4,a3
146: 40f382b3 sub t0,t2,a5
14a: 04504863 bgtz t0,19a <mini_pad+0x68>
14e: 0006d363 bgez a3,154 <mini_pad+0x22>
152: 4681 li a3,0
154: 96ba add a3,a3,a4
156: 4781 li a5,0
158: 40f58633 sub a2,a1,a5
15c: 04c04363 bgtz a2,1a2 <mini_pad+0x70>
160: 0005d363 bgez a1,166 <mini_pad+0x34>
164: 4581 li a1,0
166: 95b6 add a1,a1,a3
168: 40e58533 sub a0,a1,a4
16c: 02030463 beqz t1,194 <mini_pad+0x62>
170: 02b77263 bgeu a4,a1,194 <mini_pad+0x62>
174: 02a00793 li a5,42
178: fef58fa3 sb a5,-1(a1)
17c: fff58693 addi a3,a1,-1
180: 00d77a63 bgeu a4,a3,194 <mini_pad+0x62>
184: fef58f23 sb a5,-2(a1)
188: ffe58693 addi a3,a1,-2
18c: 00d77463 bgeu a4,a3,194 <mini_pad+0x62>
190: fef58ea3 sb a5,-3(a1)
194: 8082 ret
196: 86ae mv a3,a1
198: b75d j 13e <mini_pad+0xc>
19a: 0785 addi a5,a5,1
19c: fec78fa3 sb a2,-1(a5)
1a0: b75d j 146 <mini_pad+0x14>
1a2: 00f50633 add a2,a0,a5
1a6: 00060283 lb t0,0(a2)
1aa: 00f68633 add a2,a3,a5
1ae: 0785 addi a5,a5,1
1b0: 00560023 sb t0,0(a2)
1b4: b755 j 158 <mini_pad+0x26>
000001b6 <_puts>:
1b6: ce01 beqz a2,1ce <_puts+0x18>
1b8: 00062283 lw t0,0(a2)
1bc: 4701 li a4,0
1be: 425c lw a5,4(a2)
1c0: 00b74963 blt a4,a1,1d2 <_puts+0x1c>
1c4: 00078023 sb zero,0(a5)
1c8: 424c lw a1,4(a2)
1ca: 405585b3 sub a1,a1,t0
1ce: 852e mv a0,a1
1d0: 8082 ret
1d2: 4614 lw a3,8(a2)
1d4: fff68313 addi t1,a3,-1
1d8: 4214 lw a3,0(a2)
1da: 969a add a3,a3,t1
1dc: fed784e3 beq a5,a3,1c4 <_puts+0xe>
1e0: 00178693 addi a3,a5,1
1e4: c254 sw a3,4(a2)
1e6: 00e506b3 add a3,a0,a4
1ea: 00068683 lb a3,0(a3)
1ee: 0705 addi a4,a4,1
1f0: a394 sb a3,0(a5)
1f2: b7f1 j 1be <_puts+0x8>
000001f4 <mini_itoa.part.0>:
1f4: eadff2ef jal t0,a0 <__riscv_save_0>
1f8: 1131 addi sp,sp,-20
1fa: c002 sw zero,0(sp)
1fc: 832a mv t1,a0
1fe: 82ae mv t0,a1
200: 00055763 bgez a0,20e <mini_itoa.part.0+0x1a>
204: e689 bnez a3,20e <mini_itoa.part.0+0x1a>
206: 4785 li a5,1
208: 40a00333 neg t1,a0
20c: c03e sw a5,0(sp)
20e: 06100413 li s0,97
212: c219 beqz a2,218 <mini_itoa.part.0+0x24>
214: 04100413 li s0,65
218: 84ba mv s1,a4
21a: 1459 addi s0,s0,-10
21c: 8596 mv a1,t0
21e: 851a mv a0,t1
220: c83a sw a4,16(sp)
222: c21a sw t1,4(sp)
224: c616 sw t0,12(sp)
226: c41a sw t1,8(sp)
228: 35c1 jal e8 <__umodsi3>
22a: 46a5 li a3,9
22c: 0ff57793 andi a5,a0,255
230: 4322 lw t1,8(sp)
232: 42b2 lw t0,12(sp)
234: 4742 lw a4,16(sp)
236: 04a6ee63 bltu a3,a0,292 <mini_itoa.part.0+0x9e>
23a: 03078793 addi a5,a5,48
23e: 01879693 slli a3,a5,0x18
242: 86e1 srai a3,a3,0x18
244: 00148793 addi a5,s1,1
248: a094 sb a3,0(s1)
24a: 8596 mv a1,t0
24c: 851a mv a0,t1
24e: c83a sw a4,16(sp)
250: c63e sw a5,12(sp)
252: c416 sw t0,8(sp)
254: 35a5 jal bc <__udivsi3>
256: 4692 lw a3,4(sp)
258: 42a2 lw t0,8(sp)
25a: 832a mv t1,a0
25c: 47b2 lw a5,12(sp)
25e: 4742 lw a4,16(sp)
260: 0256f763 bgeu a3,t0,28e <mini_itoa.part.0+0x9a>
264: 4682 lw a3,0(sp)
266: c691 beqz a3,272 <mini_itoa.part.0+0x7e>
268: 02d00693 li a3,45
26c: a394 sb a3,0(a5)
26e: 00248793 addi a5,s1,2
272: 40e78533 sub a0,a5,a4
276: 01f55693 srli a3,a0,0x1f
27a: 96aa add a3,a3,a0
27c: 00078023 sb zero,0(a5)
280: 8685 srai a3,a3,0x1
282: 4601 li a2,0
284: 17fd addi a5,a5,-1
286: 00d64863 blt a2,a3,296 <mini_itoa.part.0+0xa2>
28a: 0151 addi sp,sp,20
28c: bd39 j aa <__riscv_restore_0>
28e: 84be mv s1,a5
290: b771 j 21c <mini_itoa.part.0+0x28>
292: 97a2 add a5,a5,s0
294: b76d j 23e <mini_itoa.part.0+0x4a>
296: 00c705b3 add a1,a4,a2
29a: 00078283 lb t0,0(a5)
29e: 00058303 lb t1,0(a1)
2a2: 0605 addi a2,a2,1
2a4: 00558023 sb t0,0(a1)
2a8: 00678023 sb t1,0(a5)
2ac: bfe1 j 284 <mini_itoa.part.0+0x90>
000002ae <handle_reset>:
2ae: 20000197 auipc gp,0x20000
2b2: 55218193 addi gp,gp,1362 # 20000800 <__global_pointer$>
2b6: 00018113 mv sp,gp
2ba: 08000513 li a0,128
2be: 30051073 csrw mstatus,a0
2c2: 468d li a3,3
2c4: 00000517 auipc a0,0x0
2c8: d3c50513 addi a0,a0,-708 # 0 <InterruptVectorDefault>
2cc: 8d55 or a0,a0,a3
2ce: 30551073 csrw mtvec,a0
2d2: 20000517 auipc a0,0x20000
2d6: d2e50513 addi a0,a0,-722 # 20000000 <_data_vma>
2da: 80418593 addi a1,gp,-2044 # 20000004 <_ebss>
2de: 4601 li a2,0
2e0: 00b55663 bge a0,a1,2ec <handle_reset+0x3e>
2e4: c110 sw a2,0(a0)
2e6: 0511 addi a0,a0,4
2e8: feb54ee3 blt a0,a1,2e4 <handle_reset+0x36>
2ec: 71c00513 li a0,1820
2f0: 20000597 auipc a1,0x20000
2f4: d1058593 addi a1,a1,-752 # 20000000 <_data_vma>
2f8: 20000617 auipc a2,0x20000
2fc: d0860613 addi a2,a2,-760 # 20000000 <_data_vma>
300: 00c58863 beq a1,a2,310 <handle_reset+0x62>
304: 4114 lw a3,0(a0)
306: c194 sw a3,0(a1)
308: 0511 addi a0,a0,4
30a: 0591 addi a1,a1,4
30c: fec59ae3 bne a1,a2,300 <handle_reset+0x52>
310: e000f7b7 lui a5,0xe000f
314: 4705 li a4,1
316: c398 sw a4,0(a5)
318: 000007b7 lui a5,0x0
31c: 69678793 addi a5,a5,1686 # 696 <main>
320: 34179073 csrw mepc,a5
324: 30200073 mret
00000328 <DefaultIRQHandler>:
328: a001 j 328 <DefaultIRQHandler>
0000032a <NMI_RCC_CSS_IRQHandler>:
32a: 40021737 lui a4,0x40021
32e: 471c lw a5,8(a4)
330: 008006b7 lui a3,0x800
334: 8fd5 or a5,a5,a3
336: c71c sw a5,8(a4)
00000338 <strlen>:
338: 87aa mv a5,a0
33a: 00078703 lb a4,0(a5)
33e: e701 bnez a4,346 <strlen+0xe>
340: 40a78533 sub a0,a5,a0
344: 8082 ret
346: 0785 addi a5,a5,1
348: bfcd j 33a <strlen+0x2>
0000034a <mini_vpprintf>:
34a: d57ff2ef jal t0,a0 <__riscv_save_0>
34e: 715d addi sp,sp,-80
350: c02e sw a1,0(sp)
352: 8432 mv s0,a2
354: 87b6 mv a5,a3
356: 84aa mv s1,a0
358: e511 bnez a0,364 <mini_vpprintf+0x1a>
35a: 00000737 lui a4,0x0
35e: c002 sw zero,0(sp)
360: 1b670493 addi s1,a4,438 # 1b6 <_puts>
364: c802 sw zero,16(sp)
366: 00040703 lb a4,0(s0)
36a: 00140313 addi t1,s0,1
36e: 00e10fa3 sb a4,31(sp)
372: c75d beqz a4,420 <mini_vpprintf+0xd6>
374: c41a sw t1,8(sp)
376: 02500693 li a3,37
37a: 00d70f63 beq a4,a3,398 <mini_vpprintf+0x4e>
37e: 4602 lw a2,0(sp)
380: 4585 li a1,1
382: 01f10513 addi a0,sp,31
386: c23e sw a5,4(sp)
388: 9482 jalr s1
38a: 4322 lw t1,8(sp)
38c: 841a mv s0,t1
38e: 47c2 lw a5,16(sp)
390: 97aa add a5,a5,a0
392: c83e sw a5,16(sp)
394: 4792 lw a5,4(sp)
396: bfc1 j 366 <mini_vpprintf+0x1c>
398: 00140683 lb a3,1(s0)
39c: 03000593 li a1,48
3a0: 03000613 li a2,48
3a4: 00d10fa3 sb a3,31(sp)
3a8: c62e sw a1,12(sp)
3aa: 00240713 addi a4,s0,2
3ae: 06c69c63 bne a3,a2,426 <mini_vpprintf+0xdc>
3b2: 843a mv s0,a4
3b4: 4601 li a2,0
3b6: 4701 li a4,0
3b8: 4525 li a0,9
3ba: a811 j 3ce <mini_vpprintf+0x84>
3bc: 00271693 slli a3,a4,0x2
3c0: 0405 addi s0,s0,1
3c2: 9736 add a4,a4,a3
3c4: fff40683 lb a3,-1(s0)
3c8: 0706 slli a4,a4,0x1
3ca: 972e add a4,a4,a1
3cc: 4605 li a2,1
3ce: fd068593 addi a1,a3,-48 # 7fffd0 <_data_lma+0x7ff8b4>
3d2: 0ff5f313 andi t1,a1,255
3d6: fe6573e3 bgeu a0,t1,3bc <mini_vpprintf+0x72>
3da: c219 beqz a2,3e0 <mini_vpprintf+0x96>
3dc: 00d10fa3 sb a3,31(sp)
3e0: c43a sw a4,8(sp)
3e2: 4661 li a2,24
3e4: 00e65363 bge a2,a4,3ea <mini_vpprintf+0xa0>
3e8: c432 sw a2,8(sp)
3ea: 06c00613 li a2,108
3ee: 4581 li a1,0
3f0: 00c69763 bne a3,a2,3fe <mini_vpprintf+0xb4>
3f4: 2014 lbu a3,0(s0)
3f6: 4585 li a1,1
3f8: 0405 addi s0,s0,1
3fa: 00d10fa3 sb a3,31(sp)
3fe: 01f10683 lb a3,31(sp)
402: 06400613 li a2,100
406: 06c68163 beq a3,a2,468 <mini_vpprintf+0x11e>
40a: 02d64263 blt a2,a3,42e <mini_vpprintf+0xe4>
40e: 05800713 li a4,88
412: 08e68d63 beq a3,a4,4ac <mini_vpprintf+0x162>
416: 06300713 li a4,99
41a: 0ae68463 beq a3,a4,4c2 <mini_vpprintf+0x178>
41e: e2f1 bnez a3,4e2 <mini_vpprintf+0x198>
420: 4542 lw a0,16(sp)
422: 6161 addi sp,sp,80
424: b159 j aa <__riscv_restore_0>
426: 02000613 li a2,32
42a: c632 sw a2,12(sp)
42c: b759 j 3b2 <mini_vpprintf+0x68>
42e: 07500613 li a2,117
432: 02c68b63 beq a3,a2,468 <mini_vpprintf+0x11e>
436: 07800613 li a2,120
43a: 06c68963 beq a3,a2,4ac <mini_vpprintf+0x162>
43e: 07300613 li a2,115
442: 0ac69063 bne a3,a2,4e2 <mini_vpprintf+0x198>
446: cc3a sw a4,24(sp)
448: 00478713 addi a4,a5,4
44c: 439c lw a5,0(a5)
44e: c23a sw a4,4(sp)
450: 853e mv a0,a5
452: ca3e sw a5,20(sp)
454: 35d5 jal 338 <strlen>
456: 4762 lw a4,24(sp)
458: 85aa mv a1,a0
45a: 47d2 lw a5,20(sp)
45c: c341 beqz a4,4dc <mini_vpprintf+0x192>
45e: 1018 addi a4,sp,32
460: 46a2 lw a3,8(sp)
462: 4632 lw a2,12(sp)
464: 853e mv a0,a5
466: a01d j 48c <mini_vpprintf+0x142>
468: 00478713 addi a4,a5,4
46c: c23a sw a4,4(sp)
46e: c58d beqz a1,498 <mini_vpprintf+0x14e>
470: f8b68693 addi a3,a3,-117
474: 1838 addi a4,sp,56
476: 0016b693 seqz a3,a3
47a: 4601 li a2,0
47c: 45a9 li a1,10
47e: 4388 lw a0,0(a5)
480: 3b95 jal 1f4 <mini_itoa.part.0>
482: 46a2 lw a3,8(sp)
484: 4632 lw a2,12(sp)
486: 85aa mv a1,a0
488: 1018 addi a4,sp,32
48a: 1828 addi a0,sp,56
48c: 315d jal 132 <mini_pad>
48e: 4602 lw a2,0(sp)
490: 85aa mv a1,a0
492: 1008 addi a0,sp,32
494: 9482 jalr s1
496: bde5 j 38e <mini_vpprintf+0x44>
498: 07500713 li a4,117
49c: 00e69563 bne a3,a4,4a6 <mini_vpprintf+0x15c>
4a0: 1838 addi a4,sp,56
4a2: 4685 li a3,1
4a4: bfd9 j 47a <mini_vpprintf+0x130>
4a6: 1838 addi a4,sp,56
4a8: 4681 li a3,0
4aa: bfc1 j 47a <mini_vpprintf+0x130>
4ac: fa868693 addi a3,a3,-88
4b0: 00478713 addi a4,a5,4
4b4: 0016b613 seqz a2,a3
4b8: c23a sw a4,4(sp)
4ba: 4685 li a3,1
4bc: 1838 addi a4,sp,56
4be: 45c1 li a1,16
4c0: bf7d j 47e <mini_vpprintf+0x134>
4c2: 00478713 addi a4,a5,4
4c6: 439c lw a5,0(a5)
4c8: c23a sw a4,4(sp)
4ca: 46a2 lw a3,8(sp)
4cc: 00f10fa3 sb a5,31(sp)
4d0: 1018 addi a4,sp,32
4d2: 4632 lw a2,12(sp)
4d4: 4585 li a1,1
4d6: 01f10513 addi a0,sp,31
4da: bf4d j 48c <mini_vpprintf+0x142>
4dc: 4602 lw a2,0(sp)
4de: 853e mv a0,a5
4e0: bf55 j 494 <mini_vpprintf+0x14a>
4e2: c23e sw a5,4(sp)
4e4: 4602 lw a2,0(sp)
4e6: 4585 li a1,1
4e8: 01f10513 addi a0,sp,31
4ec: b765 j 494 <mini_vpprintf+0x14a>
000004ee <printf>:
4ee: fdc10113 addi sp,sp,-36
4f2: ca32 sw a2,20(sp)
4f4: 862a mv a2,a0
4f6: 00000537 lui a0,0x0
4fa: c82e sw a1,16(sp)
4fc: cc36 sw a3,24(sp)
4fe: 4581 li a1,0
500: 0814 addi a3,sp,16
502: 59a50513 addi a0,a0,1434 # 59a <__puts_uart>
506: c606 sw ra,12(sp)
508: ce3a sw a4,28(sp)
50a: d03e sw a5,32(sp)
50c: c036 sw a3,0(sp)
50e: 3d35 jal 34a <mini_vpprintf>
510: 40b2 lw ra,12(sp)
512: 02410113 addi sp,sp,36
516: 8082 ret
00000518 <SetupUART>:
518: 400216b7 lui a3,0x40021
51c: 4e9c lw a5,24(a3)
51e: 6711 lui a4,0x4
520: 02070713 addi a4,a4,32 # 4020 <_data_lma+0x3904>
524: 8fd9 or a5,a5,a4
526: ce9c sw a5,24(a3)
528: 400117b7 lui a5,0x40011
52c: 4007a703 lw a4,1024(a5) # 40011400 <__global_pointer$+0x20010c00>
530: ff1006b7 lui a3,0xff100
534: 16fd addi a3,a3,-1
536: 8f75 and a4,a4,a3
538: 40e7a023 sw a4,1024(a5)
53c: 4007a703 lw a4,1024(a5)
540: 009006b7 lui a3,0x900
544: 0542 slli a0,a0,0x10
546: 8f55 or a4,a4,a3
548: 40e7a023 sw a4,1024(a5)
54c: 400147b7 lui a5,0x40014
550: 4721 li a4,8
552: 80e79623 sh a4,-2036(a5) # 4001380c <__global_pointer$+0x2001300c>
556: 80079823 sh zero,-2032(a5)
55a: 80079a23 sh zero,-2028(a5)
55e: 8141 srli a0,a0,0x10
560: 80a79423 sh a0,-2040(a5)
564: 80c7d703 lhu a4,-2036(a5)
568: 6689 lui a3,0x2
56a: 8f55 or a4,a4,a3
56c: 80e79623 sh a4,-2036(a5)
570: 8082 ret
00000572 <_write>:
572: 4781 li a5,0
574: 400146b7 lui a3,0x40014
578: 00c7c463 blt a5,a2,580 <_write+0xe>
57c: 8532 mv a0,a2
57e: 8082 ret
580: 8006d703 lhu a4,-2048(a3) # 40013800 <__global_pointer$+0x20013000>
584: 04077713 andi a4,a4,64
588: df65 beqz a4,580 <_write+0xe>
58a: 00f58733 add a4,a1,a5
58e: 00070703 lb a4,0(a4)
592: 0785 addi a5,a5,1
594: 80e69223 sh a4,-2044(a3)
598: b7c5 j 578 <_write+0x6>
0000059a <__puts_uart>:
59a: b07ff2ef jal t0,a0 <__riscv_save_0>
59e: 842e mv s0,a1
5a0: 862e mv a2,a1
5a2: 85aa mv a1,a0
5a4: 4501 li a0,0
5a6: 37f1 jal 572 <_write>
5a8: 8522 mv a0,s0
5aa: b601 j aa <__riscv_restore_0>
000005ac <DelaySysTick>:
5ac: e000f7b7 lui a5,0xe000f
5b0: 479c lw a5,8(a5)
5b2: e000f737 lui a4,0xe000f
5b6: 953e add a0,a0,a5
5b8: 471c lw a5,8(a4)
5ba: 8f89 sub a5,a5,a0
5bc: fe07cee3 bltz a5,5b8 <DelaySysTick+0xc>
5c0: 8082 ret
000005c2 <SystemInit>:
5c2: adfff2ef jal t0,a0 <__riscv_save_0>
5c6: 400217b7 lui a5,0x40021
5ca: 01080737 lui a4,0x1080
5ce: 0007a223 sw zero,4(a5) # 40021004 <__global_pointer$+0x20020804>
5d2: 08170713 addi a4,a4,129 # 1080081 <_data_lma+0x107f965>
5d6: c398 sw a4,0(a5)
5d8: 4685 li a3,1
5da: 40022737 lui a4,0x40022
5de: c314 sw a3,0(a4)
5e0: 009f0737 lui a4,0x9f0
5e4: c798 sw a4,8(a5)
5e6: 40021737 lui a4,0x40021
5ea: 431c lw a5,0(a4)
5ec: 00679693 slli a3,a5,0x6
5f0: fe06dde3 bgez a3,5ea <SystemInit+0x28>
5f4: 435c lw a5,4(a4)
5f6: 400216b7 lui a3,0x40021
5fa: 9bf1 andi a5,a5,-4
5fc: 0027e793 ori a5,a5,2
600: c35c sw a5,4(a4)
602: 4721 li a4,8
604: 42dc lw a5,4(a3)
606: 8bb1 andi a5,a5,12
608: fee79ee3 bne a5,a4,604 <SystemInit+0x42>
60c: 1a100513 li a0,417
610: 3721 jal 518 <SetupUART>
612: bc61 j aa <__riscv_restore_0>
00000614 <adc_init>:
614: 400217b7 lui a5,0x40021
618: 43d8 lw a4,4(a5)
61a: 6685 lui a3,0x1
61c: 80068693 addi a3,a3,-2048 # 800 <_data_lma+0xe4>
620: 8f55 or a4,a4,a3
622: c3d8 sw a4,4(a5)
624: 4f98 lw a4,24(a5)
626: 400116b7 lui a3,0x40011
62a: 00476713 ori a4,a4,4
62e: cf98 sw a4,24(a5)
630: 44444737 lui a4,0x44444
634: 40470713 addi a4,a4,1028 # 44444404 <__global_pointer$+0x24443c04>
638: 80e6a023 sw a4,-2048(a3) # 40010800 <__global_pointer$+0x20010000>
63c: 47d8 lw a4,12(a5)
63e: 000e06b7 lui a3,0xe0
642: 0685 addi a3,a3,1
644: 20076713 ori a4,a4,512
648: c7d8 sw a4,12(a5)
64a: 400127b7 lui a5,0x40012
64e: 4207a623 sw zero,1068(a5) # 4001242c <__global_pointer$+0x20011c2c>
652: 4207a823 sw zero,1072(a5)
656: 4207aa23 sw zero,1076(a5)
65a: 4107a703 lw a4,1040(a5)
65e: 40e7a823 sw a4,1040(a5)
662: 4087a703 lw a4,1032(a5)
666: 8f55 or a4,a4,a3
668: 40e7a423 sw a4,1032(a5)
66c: 8082 ret
0000066e <adc_get>:
66e: 400127b7 lui a5,0x40012
672: 4087a703 lw a4,1032(a5) # 40012408 <__global_pointer$+0x20011c08>
676: 004006b7 lui a3,0x400
67a: 8f55 or a4,a4,a3
67c: 40e7a423 sw a4,1032(a5)
680: 40012737 lui a4,0x40012
684: 40072783 lw a5,1024(a4) # 40012400 <__global_pointer$+0x20011c00>
688: 8b89 andi a5,a5,2
68a: dfed beqz a5,684 <adc_get+0x16>
68c: 44c72503 lw a0,1100(a4)
690: 0542 slli a0,a0,0x10
692: 8141 srli a0,a0,0x10
694: 8082 ret
00000696 <main>:
696: a0bff2ef jal t0,a0 <__riscv_save_0>
69a: 1171 addi sp,sp,-4
69c: 371d jal 5c2 <SystemInit>
69e: 40021737 lui a4,0x40021
6a2: 4f1c lw a5,24(a4)
6a4: 200004b7 lui s1,0x20000
6a8: 0107e793 ori a5,a5,16
6ac: cf1c sw a5,24(a4)
6ae: 444447b7 lui a5,0x44444
6b2: 40011737 lui a4,0x40011
6b6: 44178793 addi a5,a5,1089 # 44444441 <__global_pointer$+0x24443c41>
6ba: c31c sw a5,0(a4)
6bc: 3fa1 jal 614 <adc_init>
6be: 40011437 lui s0,0x40011
6c2: 481c lw a5,16(s0)
6c4: 002dc737 lui a4,0x2dc
6c8: 6c070513 addi a0,a4,1728 # 2dc6c0 <_data_lma+0x2dbfa4>
6cc: 0017e793 ori a5,a5,1
6d0: c81c sw a5,16(s0)
6d2: 3de9 jal 5ac <DelaySysTick>
6d4: 481c lw a5,16(s0)
6d6: 66c1 lui a3,0x10
6d8: 002dc737 lui a4,0x2dc
6dc: 8fd5 or a5,a5,a3
6de: c81c sw a5,16(s0)
6e0: 6c070513 addi a0,a4,1728 # 2dc6c0 <_data_lma+0x2dbfa4>
6e4: 35e1 jal 5ac <DelaySysTick>
6e6: 00048793 mv a5,s1
6ea: 438c lw a1,0(a5)
6ec: 00158713 addi a4,a1,1
6f0: c02e sw a1,0(sp)
6f2: c398 sw a4,0(a5)
6f4: 3fad jal 66e <adc_get>
6f6: 4582 lw a1,0(sp)
6f8: 862a mv a2,a0
6fa: 00000537 lui a0,0x0
6fe: 70850513 addi a0,a0,1800 # 708 <main+0x72>
702: 33f5 jal 4ee <printf>
704: bf6d j 6be <main+0x28>
706: 0000 unimp
708: 6e756f43 fmadd.q ft10,fa0,ft7,fa3,unknown
70c: 3a74 lbu a3,23(a2)
70e: 2520 lbu s0,10(a0)
710: 2064 lbu s1,6(s0)
712: 6461 lui s0,0x18
714: 25203a63 0x25203a63
718: 0a64 addi s1,sp,284
71a: 000d c.nop 3-.lst file with RCC->APB2PCENR |=RCC_ADC1EN;
ADC_POLLING.elf: file format elf32-littleriscv
ADC_POLLING.elf
architecture: riscv:rv32, flags 0x00000112:
EXEC_P, HAS_SYMS, D_PAGED
start address 0x000000a0
Program Header:
LOAD off 0x00001000 vaddr 0x00000000 paddr 0x00000000 align 2**12
filesz 0x0000071c memsz 0x0000071c flags r-x
LOAD off 0x00002000 vaddr 0x20000000 paddr 0x0000071c align 2**12
filesz 0x00000000 memsz 0x00000004 flags rw-
LOAD off 0x00002700 vaddr 0x20000700 paddr 0x20000700 align 2**12
filesz 0x00000000 memsz 0x00000100 flags rw-
Sections:
Idx Name Size VMA LMA File off Algn
0 .init 000000a0 00000000 00000000 00001000 2**2
CONTENTS, ALLOC, LOAD, READONLY, CODE
1 .text 0000067c 000000a0 000000a0 000010a0 2**2
CONTENTS, ALLOC, LOAD, READONLY, CODE
2 .fini 00000000 0000071c 0000071c 0000171c 2**0
CONTENTS, ALLOC, LOAD, CODE
3 .dalign 00000000 20000000 20000000 0000171c 2**0
CONTENTS
4 .dlalign 00000000 0000071c 0000071c 0000171c 2**0
CONTENTS
5 .data 00000000 20000000 20000000 0000171c 2**0
CONTENTS, ALLOC, LOAD, DATA
6 .bss 00000004 20000000 0000071c 00002000 2**2
ALLOC
7 .stack 00000100 20000700 20000700 00002700 2**0
ALLOC
8 .debug_info 00002602 00000000 00000000 0000171c 2**0
CONTENTS, READONLY, DEBUGGING
9 .debug_abbrev 0000072b 00000000 00000000 00003d1e 2**0
CONTENTS, READONLY, DEBUGGING
10 .debug_loc 00001fa2 00000000 00000000 00004449 2**0
CONTENTS, READONLY, DEBUGGING
11 .debug_aranges 00000170 00000000 00000000 000063eb 2**0
CONTENTS, READONLY, DEBUGGING
12 .debug_ranges 000002a0 00000000 00000000 0000655b 2**0
CONTENTS, READONLY, DEBUGGING
13 .debug_line 00002592 00000000 00000000 000067fb 2**0
CONTENTS, READONLY, DEBUGGING
14 .debug_str 00000a02 00000000 00000000 00008d8d 2**0
CONTENTS, READONLY, DEBUGGING
15 .comment 00000033 00000000 00000000 0000978f 2**0
CONTENTS, READONLY
16 .debug_frame 000003c8 00000000 00000000 000097c4 2**2
CONTENTS, READONLY, DEBUGGING
SYMBOL TABLE:
00000000 l d .init 00000000 .init
000000a0 l d .text 00000000 .text
0000071c l d .fini 00000000 .fini
20000000 l d .dalign 00000000 .dalign
0000071c l d .dlalign 00000000 .dlalign
20000000 l d .data 00000000 .data
20000000 l d .bss 00000000 .bss
20000700 l d .stack 00000000 .stack
00000000 l d .debug_info 00000000 .debug_info
00000000 l d .debug_abbrev 00000000 .debug_abbrev
00000000 l d .debug_loc 00000000 .debug_loc
00000000 l d .debug_aranges 00000000 .debug_aranges
00000000 l d .debug_ranges 00000000 .debug_ranges
00000000 l d .debug_line 00000000 .debug_line
00000000 l d .debug_str 00000000 .debug_str
00000000 l d .comment 00000000 .comment
00000000 l d .debug_frame 00000000 .debug_frame
00000000 l df *ABS* 00000000 ch32v003fun.c
00000132 l F .text 00000084 mini_pad
000001b6 l F .text 0000003e _puts
000001f4 l F .text 000000ba mini_itoa.part.0
0000059a l F .text 00000012 __puts_uart
00000000 l df *ABS* 00000000 main.c
000004ee g F .text 0000002a printf
20000800 g .data 00000000 __global_pointer$
00000328 w F .text 00000002 TIM1_CC_IRQHandler
00000328 w F .text 00000002 HardFault_Handler
00000328 w F .text 00000002 SysTick_Handler
00000328 w F .text 00000002 PVD_IRQHandler
0000032a w F .text 0000000e NMI_Handler
00000518 g F .text 0000005a SetupUART
00000000 g F .init 0000009c InterruptVectorDefault
20000000 g .bss 00000000 _sbss
00000100 g *ABS* 00000000 __stack_size
000000aa g F .text 0000000a .hidden __riscv_restore_2
00000000 w F .init 0000009c InterruptVector
000000bc g F .text 0000002c .hidden __udivsi3
000000a0 g .init 00000000 _einit
00000328 w F .text 00000002 SPI1_IRQHandler
000000a0 g F .text 0000000a .hidden __riscv_save_1
000000aa g F .text 0000000a .hidden __riscv_restore_0
00000328 w F .text 00000002 AWU_IRQHandler
00000328 w F .text 00000002 EXTI7_0_IRQHandler
0000066e g F .text 00000028 adc_get
00000328 w F .text 00000002 DMA1_Channel4_IRQHandler
00000328 w F .text 00000002 ADC1_IRQHandler
20000004 g .bss 00000000 _ebss
00000328 w F .text 00000002 DMA1_Channel7_IRQHandler
000000e8 g F .text 00000008 .hidden __umodsi3
000005ac g F .text 00000016 DelaySysTick
00000328 w F .text 00000002 I2C1_EV_IRQHandler
00000328 w F .text 00000002 DMA1_Channel6_IRQHandler
00000328 w F .text 00000002 RCC_IRQHandler
00000328 w F .text 00000002 TIM1_TRG_COM_IRQHandler
00000328 w F .text 00000002 DMA1_Channel1_IRQHandler
00000000 *UND* 00000000 _start
00000328 g F .text 00000002 DefaultIRQHandler
20000000 g .dalign 00000000 _data_vma
0000032a g F .text 0000000e NMI_RCC_CSS_IRQHandler
0000034a g F .text 000001a4 mini_vpprintf
00000696 g F .text 00000070 main
00000328 w F .text 00000002 DMA1_Channel5_IRQHandler
000000b4 g F .text 00000058 .hidden __divsi3
000005c2 g F .text 00000052 SystemInit
20000000 g O .bss 00000004 count
00000000 g .init 00000000 _sinit
00000328 w F .text 00000002 DMA1_Channel3_IRQHandler
00000328 w F .text 00000002 TIM1_UP_IRQHandler
00000614 g F .text 0000005a adc_init
00000328 w F .text 00000002 WWDG_IRQHandler
00000328 w F .text 00000002 TIM2_IRQHandler
20000800 g .stack 00000000 _eusrstack
000000a0 g F .text 0000000a .hidden __riscv_save_2
00000328 w F .text 00000002 SW_Handler
00000328 w F .text 00000002 TIM1_BRK_IRQHandler
00000572 g F .text 00000028 _write
20000000 g .data 00000000 _edata
0000071c g .dlalign 00000000 _data_lma
0000010c g F .text 00000024 .hidden __modsi3
00000328 w F .text 00000002 DMA1_Channel2_IRQHandler
000002ae g F .text 0000007a handle_reset
000000a0 g F .text 0000000a .hidden __riscv_save_0
00000328 w F .text 00000002 FLASH_IRQHandler
00000328 w F .text 00000002 USART1_IRQHandler
00000338 g F .text 00000012 strlen
00000328 w F .text 00000002 I2C1_ER_IRQHandler
000000aa g F .text 0000000a .hidden __riscv_restore_1
Disassembly of section .init:
00000000 <InterruptVectorDefault>:
0: 2ae0006f j 2ae <handle_reset>
4: 0000 unimp
6: 0000 unimp
8: 032a slli t1,t1,0xa
a: 0000 unimp
c: 0328 addi a0,sp,392
...
2e: 0000 unimp
30: 0328 addi a0,sp,392
32: 0000 unimp
34: 0000 unimp
36: 0000 unimp
38: 0328 addi a0,sp,392
3a: 0000 unimp
3c: 0000 unimp
3e: 0000 unimp
40: 0328 addi a0,sp,392
42: 0000 unimp
44: 0328 addi a0,sp,392
46: 0000 unimp
48: 0328 addi a0,sp,392
4a: 0000 unimp
4c: 0328 addi a0,sp,392
4e: 0000 unimp
50: 0328 addi a0,sp,392
52: 0000 unimp
54: 0328 addi a0,sp,392
56: 0000 unimp
58: 0328 addi a0,sp,392
5a: 0000 unimp
5c: 0328 addi a0,sp,392
5e: 0000 unimp
60: 0328 addi a0,sp,392
62: 0000 unimp
64: 0328 addi a0,sp,392
66: 0000 unimp
68: 0328 addi a0,sp,392
6a: 0000 unimp
6c: 0328 addi a0,sp,392
6e: 0000 unimp
70: 0328 addi a0,sp,392
72: 0000 unimp
74: 0328 addi a0,sp,392
76: 0000 unimp
78: 0328 addi a0,sp,392
7a: 0000 unimp
7c: 0328 addi a0,sp,392
7e: 0000 unimp
80: 0328 addi a0,sp,392
82: 0000 unimp
84: 0328 addi a0,sp,392
86: 0000 unimp
88: 0328 addi a0,sp,392
8a: 0000 unimp
8c: 0328 addi a0,sp,392
8e: 0000 unimp
90: 0328 addi a0,sp,392
92: 0000 unimp
94: 0328 addi a0,sp,392
96: 0000 unimp
98: 0328 addi a0,sp,392
9a: 0000 unimp
9c: 0000 unimp
...
Disassembly of section .text:
000000a0 <__riscv_save_0>:
a0: 1151 addi sp,sp,-12
a2: c026 sw s1,0(sp)
a4: c222 sw s0,4(sp)
a6: c406 sw ra,8(sp)
a8: 8282 jr t0
000000aa <__riscv_restore_0>:
aa: 4482 lw s1,0(sp)
ac: 4412 lw s0,4(sp)
ae: 40a2 lw ra,8(sp)
b0: 0131 addi sp,sp,12
b2: 8082 ret
000000b4 <__divsi3>:
b4: 02054e63 bltz a0,f0 <__umodsi3+0x8>
b8: 0405c363 bltz a1,fe <__umodsi3+0x16>
000000bc <__udivsi3>:
bc: 862e mv a2,a1
be: 85aa mv a1,a0
c0: 557d li a0,-1
c2: c215 beqz a2,e6 <__udivsi3+0x2a>
c4: 4685 li a3,1
c6: 00b67863 bgeu a2,a1,d6 <__udivsi3+0x1a>
ca: 00c05663 blez a2,d6 <__udivsi3+0x1a>
ce: 0606 slli a2,a2,0x1
d0: 0686 slli a3,a3,0x1
d2: feb66ce3 bltu a2,a1,ca <__udivsi3+0xe>
d6: 4501 li a0,0
d8: 00c5e463 bltu a1,a2,e0 <__udivsi3+0x24>
dc: 8d91 sub a1,a1,a2
de: 8d55 or a0,a0,a3
e0: 8285 srli a3,a3,0x1
e2: 8205 srli a2,a2,0x1
e4: faf5 bnez a3,d8 <__udivsi3+0x1c>
e6: 8082 ret
000000e8 <__umodsi3>:
e8: 8286 mv t0,ra
ea: 3fc9 jal bc <__udivsi3>
ec: 852e mv a0,a1
ee: 8282 jr t0
f0: 40a00533 neg a0,a0
f4: 0005d763 bgez a1,102 <__stack_size+0x2>
f8: 40b005b3 neg a1,a1
fc: b7c1 j bc <__udivsi3>
fe: 40b005b3 neg a1,a1
102: 8286 mv t0,ra
104: 3f65 jal bc <__udivsi3>
106: 40a00533 neg a0,a0
10a: 8282 jr t0
0000010c <__modsi3>:
10c: 8286 mv t0,ra
10e: 0005c763 bltz a1,11c <__modsi3+0x10>
112: 00054963 bltz a0,124 <__modsi3+0x18>
116: 375d jal bc <__udivsi3>
118: 852e mv a0,a1
11a: 8282 jr t0
11c: 40b005b3 neg a1,a1
120: fe055be3 bgez a0,116 <__modsi3+0xa>
124: 40a00533 neg a0,a0
128: 3f51 jal bc <__udivsi3>
12a: 40b00533 neg a0,a1
12e: 8282 jr t0
...
00000132 <mini_pad>:
132: 4301 li t1,0
134: c2ad beqz a3,196 <mini_pad+0x64>
136: 00b6d463 bge a3,a1,13e <mini_pad+0xc>
13a: 85b6 mv a1,a3
13c: 4305 li t1,1
13e: 8e8d sub a3,a3,a1
140: 87ba mv a5,a4
142: 00d703b3 add t2,a4,a3
146: 40f382b3 sub t0,t2,a5
14a: 04504863 bgtz t0,19a <mini_pad+0x68>
14e: 0006d363 bgez a3,154 <mini_pad+0x22>
152: 4681 li a3,0
154: 96ba add a3,a3,a4
156: 4781 li a5,0
158: 40f58633 sub a2,a1,a5
15c: 04c04363 bgtz a2,1a2 <mini_pad+0x70>
160: 0005d363 bgez a1,166 <mini_pad+0x34>
164: 4581 li a1,0
166: 95b6 add a1,a1,a3
168: 40e58533 sub a0,a1,a4
16c: 02030463 beqz t1,194 <mini_pad+0x62>
170: 02b77263 bgeu a4,a1,194 <mini_pad+0x62>
174: 02a00793 li a5,42
178: fef58fa3 sb a5,-1(a1)
17c: fff58693 addi a3,a1,-1
180: 00d77a63 bgeu a4,a3,194 <mini_pad+0x62>
184: fef58f23 sb a5,-2(a1)
188: ffe58693 addi a3,a1,-2
18c: 00d77463 bgeu a4,a3,194 <mini_pad+0x62>
190: fef58ea3 sb a5,-3(a1)
194: 8082 ret
196: 86ae mv a3,a1
198: b75d j 13e <mini_pad+0xc>
19a: 0785 addi a5,a5,1
19c: fec78fa3 sb a2,-1(a5)
1a0: b75d j 146 <mini_pad+0x14>
1a2: 00f50633 add a2,a0,a5
1a6: 00060283 lb t0,0(a2)
1aa: 00f68633 add a2,a3,a5
1ae: 0785 addi a5,a5,1
1b0: 00560023 sb t0,0(a2)
1b4: b755 j 158 <mini_pad+0x26>
000001b6 <_puts>:
1b6: ce01 beqz a2,1ce <_puts+0x18>
1b8: 00062283 lw t0,0(a2)
1bc: 4701 li a4,0
1be: 425c lw a5,4(a2)
1c0: 00b74963 blt a4,a1,1d2 <_puts+0x1c>
1c4: 00078023 sb zero,0(a5)
1c8: 424c lw a1,4(a2)
1ca: 405585b3 sub a1,a1,t0
1ce: 852e mv a0,a1
1d0: 8082 ret
1d2: 4614 lw a3,8(a2)
1d4: fff68313 addi t1,a3,-1
1d8: 4214 lw a3,0(a2)
1da: 969a add a3,a3,t1
1dc: fed784e3 beq a5,a3,1c4 <_puts+0xe>
1e0: 00178693 addi a3,a5,1
1e4: c254 sw a3,4(a2)
1e6: 00e506b3 add a3,a0,a4
1ea: 00068683 lb a3,0(a3)
1ee: 0705 addi a4,a4,1
1f0: a394 sb a3,0(a5)
1f2: b7f1 j 1be <_puts+0x8>
000001f4 <mini_itoa.part.0>:
1f4: eadff2ef jal t0,a0 <__riscv_save_0>
1f8: 1131 addi sp,sp,-20
1fa: c002 sw zero,0(sp)
1fc: 832a mv t1,a0
1fe: 82ae mv t0,a1
200: 00055763 bgez a0,20e <mini_itoa.part.0+0x1a>
204: e689 bnez a3,20e <mini_itoa.part.0+0x1a>
206: 4785 li a5,1
208: 40a00333 neg t1,a0
20c: c03e sw a5,0(sp)
20e: 06100413 li s0,97
212: c219 beqz a2,218 <mini_itoa.part.0+0x24>
214: 04100413 li s0,65
218: 84ba mv s1,a4
21a: 1459 addi s0,s0,-10
21c: 8596 mv a1,t0
21e: 851a mv a0,t1
220: c83a sw a4,16(sp)
222: c21a sw t1,4(sp)
224: c616 sw t0,12(sp)
226: c41a sw t1,8(sp)
228: 35c1 jal e8 <__umodsi3>
22a: 46a5 li a3,9
22c: 0ff57793 andi a5,a0,255
230: 4322 lw t1,8(sp)
232: 42b2 lw t0,12(sp)
234: 4742 lw a4,16(sp)
236: 04a6ee63 bltu a3,a0,292 <mini_itoa.part.0+0x9e>
23a: 03078793 addi a5,a5,48
23e: 01879693 slli a3,a5,0x18
242: 86e1 srai a3,a3,0x18
244: 00148793 addi a5,s1,1
248: a094 sb a3,0(s1)
24a: 8596 mv a1,t0
24c: 851a mv a0,t1
24e: c83a sw a4,16(sp)
250: c63e sw a5,12(sp)
252: c416 sw t0,8(sp)
254: 35a5 jal bc <__udivsi3>
256: 4692 lw a3,4(sp)
258: 42a2 lw t0,8(sp)
25a: 832a mv t1,a0
25c: 47b2 lw a5,12(sp)
25e: 4742 lw a4,16(sp)
260: 0256f763 bgeu a3,t0,28e <mini_itoa.part.0+0x9a>
264: 4682 lw a3,0(sp)
266: c691 beqz a3,272 <mini_itoa.part.0+0x7e>
268: 02d00693 li a3,45
26c: a394 sb a3,0(a5)
26e: 00248793 addi a5,s1,2
272: 40e78533 sub a0,a5,a4
276: 01f55693 srli a3,a0,0x1f
27a: 96aa add a3,a3,a0
27c: 00078023 sb zero,0(a5)
280: 8685 srai a3,a3,0x1
282: 4601 li a2,0
284: 17fd addi a5,a5,-1
286: 00d64863 blt a2,a3,296 <mini_itoa.part.0+0xa2>
28a: 0151 addi sp,sp,20
28c: bd39 j aa <__riscv_restore_0>
28e: 84be mv s1,a5
290: b771 j 21c <mini_itoa.part.0+0x28>
292: 97a2 add a5,a5,s0
294: b76d j 23e <mini_itoa.part.0+0x4a>
296: 00c705b3 add a1,a4,a2
29a: 00078283 lb t0,0(a5)
29e: 00058303 lb t1,0(a1)
2a2: 0605 addi a2,a2,1
2a4: 00558023 sb t0,0(a1)
2a8: 00678023 sb t1,0(a5)
2ac: bfe1 j 284 <mini_itoa.part.0+0x90>
000002ae <handle_reset>:
2ae: 20000197 auipc gp,0x20000
2b2: 55218193 addi gp,gp,1362 # 20000800 <__global_pointer$>
2b6: 00018113 mv sp,gp
2ba: 08000513 li a0,128
2be: 30051073 csrw mstatus,a0
2c2: 468d li a3,3
2c4: 00000517 auipc a0,0x0
2c8: d3c50513 addi a0,a0,-708 # 0 <InterruptVectorDefault>
2cc: 8d55 or a0,a0,a3
2ce: 30551073 csrw mtvec,a0
2d2: 20000517 auipc a0,0x20000
2d6: d2e50513 addi a0,a0,-722 # 20000000 <_data_vma>
2da: 80418593 addi a1,gp,-2044 # 20000004 <_ebss>
2de: 4601 li a2,0
2e0: 00b55663 bge a0,a1,2ec <handle_reset+0x3e>
2e4: c110 sw a2,0(a0)
2e6: 0511 addi a0,a0,4
2e8: feb54ee3 blt a0,a1,2e4 <handle_reset+0x36>
2ec: 71c00513 li a0,1820
2f0: 20000597 auipc a1,0x20000
2f4: d1058593 addi a1,a1,-752 # 20000000 <_data_vma>
2f8: 20000617 auipc a2,0x20000
2fc: d0860613 addi a2,a2,-760 # 20000000 <_data_vma>
300: 00c58863 beq a1,a2,310 <handle_reset+0x62>
304: 4114 lw a3,0(a0)
306: c194 sw a3,0(a1)
308: 0511 addi a0,a0,4
30a: 0591 addi a1,a1,4
30c: fec59ae3 bne a1,a2,300 <handle_reset+0x52>
310: e000f7b7 lui a5,0xe000f
314: 4705 li a4,1
316: c398 sw a4,0(a5)
318: 000007b7 lui a5,0x0
31c: 69678793 addi a5,a5,1686 # 696 <main>
320: 34179073 csrw mepc,a5
324: 30200073 mret
00000328 <DefaultIRQHandler>:
328: a001 j 328 <DefaultIRQHandler>
0000032a <NMI_RCC_CSS_IRQHandler>:
32a: 40021737 lui a4,0x40021
32e: 471c lw a5,8(a4)
330: 008006b7 lui a3,0x800
334: 8fd5 or a5,a5,a3
336: c71c sw a5,8(a4)
00000338 <strlen>:
338: 87aa mv a5,a0
33a: 00078703 lb a4,0(a5)
33e: e701 bnez a4,346 <strlen+0xe>
340: 40a78533 sub a0,a5,a0
344: 8082 ret
346: 0785 addi a5,a5,1
348: bfcd j 33a <strlen+0x2>
0000034a <mini_vpprintf>:
34a: d57ff2ef jal t0,a0 <__riscv_save_0>
34e: 715d addi sp,sp,-80
350: c02e sw a1,0(sp)
352: 8432 mv s0,a2
354: 87b6 mv a5,a3
356: 84aa mv s1,a0
358: e511 bnez a0,364 <mini_vpprintf+0x1a>
35a: 00000737 lui a4,0x0
35e: c002 sw zero,0(sp)
360: 1b670493 addi s1,a4,438 # 1b6 <_puts>
364: c802 sw zero,16(sp)
366: 00040703 lb a4,0(s0)
36a: 00140313 addi t1,s0,1
36e: 00e10fa3 sb a4,31(sp)
372: c75d beqz a4,420 <mini_vpprintf+0xd6>
374: c41a sw t1,8(sp)
376: 02500693 li a3,37
37a: 00d70f63 beq a4,a3,398 <mini_vpprintf+0x4e>
37e: 4602 lw a2,0(sp)
380: 4585 li a1,1
382: 01f10513 addi a0,sp,31
386: c23e sw a5,4(sp)
388: 9482 jalr s1
38a: 4322 lw t1,8(sp)
38c: 841a mv s0,t1
38e: 47c2 lw a5,16(sp)
390: 97aa add a5,a5,a0
392: c83e sw a5,16(sp)
394: 4792 lw a5,4(sp)
396: bfc1 j 366 <mini_vpprintf+0x1c>
398: 00140683 lb a3,1(s0)
39c: 03000593 li a1,48
3a0: 03000613 li a2,48
3a4: 00d10fa3 sb a3,31(sp)
3a8: c62e sw a1,12(sp)
3aa: 00240713 addi a4,s0,2
3ae: 06c69c63 bne a3,a2,426 <mini_vpprintf+0xdc>
3b2: 843a mv s0,a4
3b4: 4601 li a2,0
3b6: 4701 li a4,0
3b8: 4525 li a0,9
3ba: a811 j 3ce <mini_vpprintf+0x84>
3bc: 00271693 slli a3,a4,0x2
3c0: 0405 addi s0,s0,1
3c2: 9736 add a4,a4,a3
3c4: fff40683 lb a3,-1(s0)
3c8: 0706 slli a4,a4,0x1
3ca: 972e add a4,a4,a1
3cc: 4605 li a2,1
3ce: fd068593 addi a1,a3,-48 # 7fffd0 <_data_lma+0x7ff8b4>
3d2: 0ff5f313 andi t1,a1,255
3d6: fe6573e3 bgeu a0,t1,3bc <mini_vpprintf+0x72>
3da: c219 beqz a2,3e0 <mini_vpprintf+0x96>
3dc: 00d10fa3 sb a3,31(sp)
3e0: c43a sw a4,8(sp)
3e2: 4661 li a2,24
3e4: 00e65363 bge a2,a4,3ea <mini_vpprintf+0xa0>
3e8: c432 sw a2,8(sp)
3ea: 06c00613 li a2,108
3ee: 4581 li a1,0
3f0: 00c69763 bne a3,a2,3fe <mini_vpprintf+0xb4>
3f4: 2014 lbu a3,0(s0)
3f6: 4585 li a1,1
3f8: 0405 addi s0,s0,1
3fa: 00d10fa3 sb a3,31(sp)
3fe: 01f10683 lb a3,31(sp)
402: 06400613 li a2,100
406: 06c68163 beq a3,a2,468 <mini_vpprintf+0x11e>
40a: 02d64263 blt a2,a3,42e <mini_vpprintf+0xe4>
40e: 05800713 li a4,88
412: 08e68d63 beq a3,a4,4ac <mini_vpprintf+0x162>
416: 06300713 li a4,99
41a: 0ae68463 beq a3,a4,4c2 <mini_vpprintf+0x178>
41e: e2f1 bnez a3,4e2 <mini_vpprintf+0x198>
420: 4542 lw a0,16(sp)
422: 6161 addi sp,sp,80
424: b159 j aa <__riscv_restore_0>
426: 02000613 li a2,32
42a: c632 sw a2,12(sp)
42c: b759 j 3b2 <mini_vpprintf+0x68>
42e: 07500613 li a2,117
432: 02c68b63 beq a3,a2,468 <mini_vpprintf+0x11e>
436: 07800613 li a2,120
43a: 06c68963 beq a3,a2,4ac <mini_vpprintf+0x162>
43e: 07300613 li a2,115
442: 0ac69063 bne a3,a2,4e2 <mini_vpprintf+0x198>
446: cc3a sw a4,24(sp)
448: 00478713 addi a4,a5,4
44c: 439c lw a5,0(a5)
44e: c23a sw a4,4(sp)
450: 853e mv a0,a5
452: ca3e sw a5,20(sp)
454: 35d5 jal 338 <strlen>
456: 4762 lw a4,24(sp)
458: 85aa mv a1,a0
45a: 47d2 lw a5,20(sp)
45c: c341 beqz a4,4dc <mini_vpprintf+0x192>
45e: 1018 addi a4,sp,32
460: 46a2 lw a3,8(sp)
462: 4632 lw a2,12(sp)
464: 853e mv a0,a5
466: a01d j 48c <mini_vpprintf+0x142>
468: 00478713 addi a4,a5,4
46c: c23a sw a4,4(sp)
46e: c58d beqz a1,498 <mini_vpprintf+0x14e>
470: f8b68693 addi a3,a3,-117
474: 1838 addi a4,sp,56
476: 0016b693 seqz a3,a3
47a: 4601 li a2,0
47c: 45a9 li a1,10
47e: 4388 lw a0,0(a5)
480: 3b95 jal 1f4 <mini_itoa.part.0>
482: 46a2 lw a3,8(sp)
484: 4632 lw a2,12(sp)
486: 85aa mv a1,a0
488: 1018 addi a4,sp,32
48a: 1828 addi a0,sp,56
48c: 315d jal 132 <mini_pad>
48e: 4602 lw a2,0(sp)
490: 85aa mv a1,a0
492: 1008 addi a0,sp,32
494: 9482 jalr s1
496: bde5 j 38e <mini_vpprintf+0x44>
498: 07500713 li a4,117
49c: 00e69563 bne a3,a4,4a6 <mini_vpprintf+0x15c>
4a0: 1838 addi a4,sp,56
4a2: 4685 li a3,1
4a4: bfd9 j 47a <mini_vpprintf+0x130>
4a6: 1838 addi a4,sp,56
4a8: 4681 li a3,0
4aa: bfc1 j 47a <mini_vpprintf+0x130>
4ac: fa868693 addi a3,a3,-88
4b0: 00478713 addi a4,a5,4
4b4: 0016b613 seqz a2,a3
4b8: c23a sw a4,4(sp)
4ba: 4685 li a3,1
4bc: 1838 addi a4,sp,56
4be: 45c1 li a1,16
4c0: bf7d j 47e <mini_vpprintf+0x134>
4c2: 00478713 addi a4,a5,4
4c6: 439c lw a5,0(a5)
4c8: c23a sw a4,4(sp)
4ca: 46a2 lw a3,8(sp)
4cc: 00f10fa3 sb a5,31(sp)
4d0: 1018 addi a4,sp,32
4d2: 4632 lw a2,12(sp)
4d4: 4585 li a1,1
4d6: 01f10513 addi a0,sp,31
4da: bf4d j 48c <mini_vpprintf+0x142>
4dc: 4602 lw a2,0(sp)
4de: 853e mv a0,a5
4e0: bf55 j 494 <mini_vpprintf+0x14a>
4e2: c23e sw a5,4(sp)
4e4: 4602 lw a2,0(sp)
4e6: 4585 li a1,1
4e8: 01f10513 addi a0,sp,31
4ec: b765 j 494 <mini_vpprintf+0x14a>
000004ee <printf>:
4ee: fdc10113 addi sp,sp,-36
4f2: ca32 sw a2,20(sp)
4f4: 862a mv a2,a0
4f6: 00000537 lui a0,0x0
4fa: c82e sw a1,16(sp)
4fc: cc36 sw a3,24(sp)
4fe: 4581 li a1,0
500: 0814 addi a3,sp,16
502: 59a50513 addi a0,a0,1434 # 59a <__puts_uart>
506: c606 sw ra,12(sp)
508: ce3a sw a4,28(sp)
50a: d03e sw a5,32(sp)
50c: c036 sw a3,0(sp)
50e: 3d35 jal 34a <mini_vpprintf>
510: 40b2 lw ra,12(sp)
512: 02410113 addi sp,sp,36
516: 8082 ret
00000518 <SetupUART>:
518: 400216b7 lui a3,0x40021
51c: 4e9c lw a5,24(a3)
51e: 6711 lui a4,0x4
520: 02070713 addi a4,a4,32 # 4020 <_data_lma+0x3904>
524: 8fd9 or a5,a5,a4
526: ce9c sw a5,24(a3)
528: 400117b7 lui a5,0x40011
52c: 4007a703 lw a4,1024(a5) # 40011400 <__global_pointer$+0x20010c00>
530: ff1006b7 lui a3,0xff100
534: 16fd addi a3,a3,-1
536: 8f75 and a4,a4,a3
538: 40e7a023 sw a4,1024(a5)
53c: 4007a703 lw a4,1024(a5)
540: 009006b7 lui a3,0x900
544: 0542 slli a0,a0,0x10
546: 8f55 or a4,a4,a3
548: 40e7a023 sw a4,1024(a5)
54c: 400147b7 lui a5,0x40014
550: 4721 li a4,8
552: 80e79623 sh a4,-2036(a5) # 4001380c <__global_pointer$+0x2001300c>
556: 80079823 sh zero,-2032(a5)
55a: 80079a23 sh zero,-2028(a5)
55e: 8141 srli a0,a0,0x10
560: 80a79423 sh a0,-2040(a5)
564: 80c7d703 lhu a4,-2036(a5)
568: 6689 lui a3,0x2
56a: 8f55 or a4,a4,a3
56c: 80e79623 sh a4,-2036(a5)
570: 8082 ret
00000572 <_write>:
572: 4781 li a5,0
574: 400146b7 lui a3,0x40014
578: 00c7c463 blt a5,a2,580 <_write+0xe>
57c: 8532 mv a0,a2
57e: 8082 ret
580: 8006d703 lhu a4,-2048(a3) # 40013800 <__global_pointer$+0x20013000>
584: 04077713 andi a4,a4,64
588: df65 beqz a4,580 <_write+0xe>
58a: 00f58733 add a4,a1,a5
58e: 00070703 lb a4,0(a4)
592: 0785 addi a5,a5,1
594: 80e69223 sh a4,-2044(a3)
598: b7c5 j 578 <_write+0x6>
0000059a <__puts_uart>:
59a: b07ff2ef jal t0,a0 <__riscv_save_0>
59e: 842e mv s0,a1
5a0: 862e mv a2,a1
5a2: 85aa mv a1,a0
5a4: 4501 li a0,0
5a6: 37f1 jal 572 <_write>
5a8: 8522 mv a0,s0
5aa: b601 j aa <__riscv_restore_0>
000005ac <DelaySysTick>:
5ac: e000f7b7 lui a5,0xe000f
5b0: 479c lw a5,8(a5)
5b2: e000f737 lui a4,0xe000f
5b6: 953e add a0,a0,a5
5b8: 471c lw a5,8(a4)
5ba: 8f89 sub a5,a5,a0
5bc: fe07cee3 bltz a5,5b8 <DelaySysTick+0xc>
5c0: 8082 ret
000005c2 <SystemInit>:
5c2: adfff2ef jal t0,a0 <__riscv_save_0>
5c6: 400217b7 lui a5,0x40021
5ca: 01080737 lui a4,0x1080
5ce: 0007a223 sw zero,4(a5) # 40021004 <__global_pointer$+0x20020804>
5d2: 08170713 addi a4,a4,129 # 1080081 <_data_lma+0x107f965>
5d6: c398 sw a4,0(a5)
5d8: 4685 li a3,1
5da: 40022737 lui a4,0x40022
5de: c314 sw a3,0(a4)
5e0: 009f0737 lui a4,0x9f0
5e4: c798 sw a4,8(a5)
5e6: 40021737 lui a4,0x40021
5ea: 431c lw a5,0(a4)
5ec: 00679693 slli a3,a5,0x6
5f0: fe06dde3 bgez a3,5ea <SystemInit+0x28>
5f4: 435c lw a5,4(a4)
5f6: 400216b7 lui a3,0x40021
5fa: 9bf1 andi a5,a5,-4
5fc: 0027e793 ori a5,a5,2
600: c35c sw a5,4(a4)
602: 4721 li a4,8
604: 42dc lw a5,4(a3)
606: 8bb1 andi a5,a5,12
608: fee79ee3 bne a5,a4,604 <SystemInit+0x42>
60c: 1a100513 li a0,417
610: 3721 jal 518 <SetupUART>
612: bc61 j aa <__riscv_restore_0>
00000614 <adc_init>:
614: 400217b7 lui a5,0x40021
618: 43d8 lw a4,4(a5)
61a: 6685 lui a3,0x1
61c: 80068693 addi a3,a3,-2048 # 800 <_data_lma+0xe4>
620: 8f55 or a4,a4,a3
622: c3d8 sw a4,4(a5)
624: 4f98 lw a4,24(a5)
626: 400116b7 lui a3,0x40011
62a: 00476713 ori a4,a4,4
62e: cf98 sw a4,24(a5)
630: 44444737 lui a4,0x44444
634: 40470713 addi a4,a4,1028 # 44444404 <__global_pointer$+0x24443c04>
638: 80e6a023 sw a4,-2048(a3) # 40010800 <__global_pointer$+0x20010000>
63c: 47d8 lw a4,12(a5)
63e: 000e06b7 lui a3,0xe0
642: 0685 addi a3,a3,1
644: 20076713 ori a4,a4,512
648: c7d8 sw a4,12(a5)
64a: 400127b7 lui a5,0x40012
64e: 4207a623 sw zero,1068(a5) # 4001242c <__global_pointer$+0x20011c2c>
652: 4207a823 sw zero,1072(a5)
656: 4207aa23 sw zero,1076(a5)
65a: 4107a703 lw a4,1040(a5)
65e: 40e7a823 sw a4,1040(a5)
662: 4087a703 lw a4,1032(a5)
666: 8f55 or a4,a4,a3
668: 40e7a423 sw a4,1032(a5)
66c: 8082 ret
0000066e <adc_get>:
66e: 400127b7 lui a5,0x40012
672: 4087a703 lw a4,1032(a5) # 40012408 <__global_pointer$+0x20011c08>
676: 004006b7 lui a3,0x400
67a: 8f55 or a4,a4,a3
67c: 40e7a423 sw a4,1032(a5)
680: 40012737 lui a4,0x40012
684: 40072783 lw a5,1024(a4) # 40012400 <__global_pointer$+0x20011c00>
688: 8b89 andi a5,a5,2
68a: dfed beqz a5,684 <adc_get+0x16>
68c: 44c72503 lw a0,1100(a4)
690: 0542 slli a0,a0,0x10
692: 8141 srli a0,a0,0x10
694: 8082 ret
00000696 <main>:
696: a0bff2ef jal t0,a0 <__riscv_save_0>
69a: 1171 addi sp,sp,-4
69c: 371d jal 5c2 <SystemInit>
69e: 40021737 lui a4,0x40021
6a2: 4f1c lw a5,24(a4)
6a4: 200004b7 lui s1,0x20000
6a8: 0107e793 ori a5,a5,16
6ac: cf1c sw a5,24(a4)
6ae: 444447b7 lui a5,0x44444
6b2: 40011737 lui a4,0x40011
6b6: 44178793 addi a5,a5,1089 # 44444441 <__global_pointer$+0x24443c41>
6ba: c31c sw a5,0(a4)
6bc: 3fa1 jal 614 <adc_init>
6be: 40011437 lui s0,0x40011
6c2: 481c lw a5,16(s0)
6c4: 002dc737 lui a4,0x2dc
6c8: 6c070513 addi a0,a4,1728 # 2dc6c0 <_data_lma+0x2dbfa4>
6cc: 0017e793 ori a5,a5,1
6d0: c81c sw a5,16(s0)
6d2: 3de9 jal 5ac <DelaySysTick>
6d4: 481c lw a5,16(s0)
6d6: 66c1 lui a3,0x10
6d8: 002dc737 lui a4,0x2dc
6dc: 8fd5 or a5,a5,a3
6de: c81c sw a5,16(s0)
6e0: 6c070513 addi a0,a4,1728 # 2dc6c0 <_data_lma+0x2dbfa4>
6e4: 35e1 jal 5ac <DelaySysTick>
6e6: 00048793 mv a5,s1
6ea: 438c lw a1,0(a5)
6ec: 00158713 addi a4,a1,1
6f0: c02e sw a1,0(sp)
6f2: c398 sw a4,0(a5)
6f4: 3fad jal 66e <adc_get>
6f6: 4582 lw a1,0(sp)
6f8: 862a mv a2,a0
6fa: 00000537 lui a0,0x0
6fe: 70850513 addi a0,a0,1800 # 708 <main+0x72>
702: 33f5 jal 4ee <printf>
704: bf6d j 6be <main+0x28>
706: 0000 unimp
708: 6e756f43 fmadd.q ft10,fa0,ft7,fa3,unknown
70c: 3a74 lbu a3,23(a2)
70e: 2520 lbu s0,10(a0)
710: 2064 lbu s1,6(s0)
712: 6461 lui s0,0x18
714: 25203a63 0x25203a63
718: 0a64 addi s1,sp,284
71a: 000d c.nop 3
eeucalyptus
commented
2 months ago The problem in your original code is that you use RCC->APB2PRSTR |= RCC_APB2Periph_ADC1; to reset the peripheral without previously ungating the ADC clock. In your suggested fix you used the correct register RCC->APB2PCENR to ungate the clock, but your suggestion is to do that INSTEAD of writing to RCC->APB2PRSTR. Your fix is exactly correct and it's the way that it's done in the example too. It's also not strictly required to reset the ADC before further configuration.
NTL just for completeness, I tested the following adc_init with both ungate and reset and it works just fine:
void adc_init(void)
{
RCC->APB2PCENR |= RCC_APB2Periph_ADC1;
RCC->APB2PRSTR |= RCC_APB2Periph_ADC1;
RCC->APB2PRSTR &= ~RCC_APB2Periph_ADC1;
RCC->CFGR0 |=(0b01000<<11);//FOR 3.2V MAX ADC FREQ IS 12MZ ADCPRES[11:15] 010XX
RCC->APB2PCENR |=RCC_IOPAEN;// enable GPIOA PA1
GPIOA->CFGLR =0X44444404;//PA1 AS ANALOG INPUT
// Set up single conversion on chl 0
ADC1->RSQR1 = 0;
ADC1->RSQR2 = 0;
ADC1->RSQR3 = 0; // 0-9 for 8 ext inputs and two internals
ADC1->SAMPTR2 |=6; // 241 CYCLES
ADC1->CTLR2 |= ADC_ADON | ADC_EXTSEL;// turn on ADC and set rule group to sw trig
//-------------------------
// Reset calibration
}
Hello I tried to modify the code for ADC using polling method on a CH32V003, but it gets stuck in this line: while(!(ADC1->STATR & ADC_EOC)); This is my code :
I have no idea, why my code is not working! Can someone help me please?