cnrv / fpga-rocket-chip

Wrapper for Rocket-Chip on FPGAs
Other
120 stars 26 forks source link

Copy boot.elf to DRAM fails in 64bit system #14

Closed K16DIABLO closed 3 years ago

K16DIABLO commented 3 years ago

I tried to attach PCIe root complex to the system, so I added a new port for 0x20_0000_0000 ~ 0x20_4000_0000 in rocket-core. However, when I tried to boot the system, there was no response from the memory for copy instructions in FSBL. Same happens when I extended memory to 0x8000_0000 ~ 0x1_8000_0000. I'm not sure whether this is the problem of rocket core or the firmware.

wsong83 commented 3 years ago

I am afraid the outer buses (the IO and memory bus connecting the Xilinx IP cores) are all 32-bit wide right now. Changing Chisel code alone is not enough.

K16DIABLO commented 3 years ago

I adjusted the bitwidth of outer buses. UART, BRAM_64K, and SPI worked well. Only memory accesses fail. I think I should open the issue on rocket-chip repo. Thanks a lot!