Closed 00xc closed 5 months ago
According to the AMD manual, there is a reserved 64 bit entry between the RSP and IST stack entries. Thus, separate it as such in the X86Tss struct. While we are at it, mark it as packed(4), which is the correct alignment, and add a layout test.
X86Tss
packed(4)
According to the AMD manual, there is a reserved 64 bit entry between the RSP and IST stack entries. Thus, separate it as such in the
X86Tssstruct. While we are at it, mark it aspacked(4), which is the correct alignment, and add a layout test.