Upgraded Q -> 2 from #45 [1723151163405]

[c4-judge]

Judge has assessed an item in Issue #45 as 2 risk. The relevant finding follows:

[QA-02] MIPS: The MIPS VM does not throw when an unaligned effective memory address is used for certain instructions As per the MIPS spec, certain instructions are supposed to throw if the effective memory address M[R[rs]+SignExtImm] is unaligned, but they currently don’t.

One such example is the sw instruction that copies 4 bytes of data from a source register to destination memory address. If an unaligned effective memory address is used, the operation proceeds as normal instead of throwing an exception as per MIPS spec:

//  sw 
else if (opcode == 0x2b) {
    return rt;
}

There are many instructions that throw an exception on unaligned memory, search AddressError in the MIPS document for more details. The only impact of this is that it deviates from the MIPS specification, as the offchain MIPS VM has the same bug.

[c4-judge]

zobront marked the issue as duplicate of #82

[c4-judge]

zobront marked the issue as satisfactory