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codedchip / AMSGateArray

Prototype boards and verilog for development of Xilinx CPLD replacements for the Amstrad 40010 and 40007 gate array chips.
GNU General Public License v3.0
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Unstable 40007 #4

Open CapnRon opened 2 years ago

CapnRon commented 2 years ago

I have tested the 40007 board with the correct pins file. It is very unstable and has graphical issues. The system works correctly with an original 40007. With the CPLD 40007 it always boots with graphical issues, although sometime I can get a beep from hitting the delete key, or begin typing a few characters before it locks up. Does anyone have any ideas about what may be wrong? Thanks 16583697331282507509413061431285 16583698328328762928622244675196 16583699294878010361127818558091

CapnRon commented 2 years ago

Sometimes on boot it will try to access the cassette with a relay click, or program load failed, or break in XXXX, or the video will become so bad I will loose sync. I tried a different CRTC chip but has similar results.

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codedchip commented 2 years ago

It's hard to diagnose the issue from here, but note that I've only extensively tested this on a 6126, I don't have a 464. Whenever I've had problems in the past, it's always been either a bridged solder joint on the CPLD or a pin not making good contact with the socket or board. However, as I said I've not tested the 40007 extensively so it might just be a bug. I will try to get hold of a 464 to test and develop it further and perhaps you can work with me on it. My email is in the comments of the source code, drop me a line if you're interested. What type/revision of 464 are you using?

CapnRon commented 2 years ago

I will make build up a second 40007 just to verify my result and let you know the outcome. I am using a Schneider CPC 464. I will include an image of the board here to reference. 1658518289085747772573712790281 16585183271244624055415311202738

CapnRon commented 2 years ago

I have soldered up a new board I made sure not to make any bridges, and used quality 2% silver bearing solder under a Meiji EMZ-5 inspection microscope. I get the same exact result with the second CPLD. I am using the commercial grade CPLD instead of the industrial grade, I didn't see any other differences in the data sheet than operating temperature range. If you think this is an issue let me know and I will try an industrial chip. I also posted on the CPC forum incase anyone might have any ideas. https://www.cpcwiki.eu/forum/amstrad-cpc-hardware/gate-array-decapped!/msg217953/#msg217953 Let me know if you need me to make any o-scope readings, the system locks up so quickly idk if I can capture anything useful but let me know and I will try to get you some data. I look forward to helping figure this out and testing on the CPC464

CapnRon commented 2 years ago

Do you think this is possibly an issue of needing logic level shifters on the 464 to work well with all the LS series logic chips?

codedchip commented 2 years ago

Potentially, but it could be a lot of things. This has only been tested on a 6128 as that's all I have access to, so you should consider the 40007 variant experimental at best. Also note that all I did was change the pinout, so it's really a 40010. I know it works on a later 464 which has sockets for the 40007 and 40010, but as to other types I simply don't know.

CapnRon commented 2 years ago

Thank you for all your help! You have done amazing work and I will try to sort it out and let you know if I figure it out. Thanks again!

Veto94 commented 1 year ago

I read your problem. You have been able to program the CPLD. I am begginer in CPLD programming. I use the files provided on this page and the Vivado software from Xilink but the software shows errors when I try to generate the file to be transferred to the CPLD. Could you provide me with the file to be transferred to CPLD . Or possibly the steps to create the file to transfer to the chip

Thank you very much

Best regards

Veto94 commented 1 year ago

Thanks a lot for your help. I downloaded the ISE software and installed it. I'm not used to this software. When I create a project with the files, it asks me which device to use and I don't know which one to put.
What should I do, after adding the files, to create the . Jed and how to transfer it with this software to the programmer and the xilinx chip

Best regards

CapnRon commented 1 year ago

the device is XC95288XL, once you create the jed you will run impact to program the cpld.

also it is important to only include the correct pins file for the 40010 or 40007 depending on which you are trying to build

psyolent commented 9 months ago

@codedchip i have a working CPC464 here and am building one from the board that bobs bits has published. i have also ordered that NOS 40007 from the folks in somewhere in europe which should be here in a few weeks. if you can help me with debugging this i will build up a board with CPLD and work with you on this bud? let me know, ta.