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codedchip / AMSGateArray

Prototype boards and verilog for development of Xilinx CPLD replacements for the Amstrad 40010 and 40007 gate array chips.
GNU General Public License v3.0
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Programming CPLD #5

Open Veto94 opened 1 year ago

Veto94 commented 1 year ago

Hello, I am new to cpld programming.

Maybe you could help me. I use vivado from Xilink. I created a new project and added all the verilog files provided on this page. When generating the bitstream file, there are errors and the file is not generated. Could you give me the different steps to generate the biststream file and load it on the cpld

Best regards

CapnRon commented 1 year ago

Hello,

Vivado is too new for this CPLD. Use Xilinx ISE to create the .JED file and program the CPLD. you will also need a programmer such as a Platform Cable USB II

CapnRon commented 1 year ago

This should help get you pointed in the right direction.

https://www.youtube.com/watch?v=2cBOucDP5Ho

CapnRon commented 1 year ago

did this solve your problem?

Veto94 commented 1 year ago

Hello

Thank you to contact me

I think it s good, but I am waiting for the programmer that I have ordered on eBay I make the Jed File and If I have a problem, I will contact you

Thank you again, without your help,I would never have made it

Veto94 commented 1 year ago

Good morning

I'm back I received the programmer. I open the impact software. Then I add the Xilinx device, and choose the .jed file then I select usb cable setup . And I get an error message

Cse - A reference voltage has not been detected on the ribbon cable interface to the target system ( pin 2 ). Check that power is applied to the target system and that the ribbon cable is properly seated at both ends.

The led status is red and there no cable detected

Could you help me

Best regards

CapnRon commented 1 year ago

You need to power the cpld board. It was very easy for me to simply insert the cpld gate array into my CPC and power it up from the CPC itself. You should notice the green light, then program the cpld with the xilinx platform usb II. Otherwise you will need to use another power supply to power the cpld board

Veto94 commented 1 year ago

Thanh=k you for your respons

I am going to made a power but which pin is the +5 volt and which pin is the ground Best regards

CapnRon commented 1 year ago

VCC on this device is ~3.3v. Do not supply 5v to this circuit. The only 5v on this will be supplied through the CPC socket. Just connect 3.3v to the VCC pin on the header and you should see the green light appear on the usb platform cable. You still haven't told me if you are attempting a 40007 or 40010 so I cant link to the correct schematic, but I recommend you review whichever schematic fits your build and also ensure that you use the correct matching pins definition file to build the jed file.

Veto94 commented 1 year ago

Good morning I believe I made it. I have the green lamp on the programmer, the cable is detected. I was able to read the device ID. The programming seems to be successful and after I relaunched impact and I managed to do a readbacktofile. Can you tell me if everything seems correct to you?

Thank you very much

CapnRon commented 1 year ago

You still haven't told me what version of the board you are building and which pins file you used. Other than that, it sounds like you are able to successfully program the CPLD now so.. Maybe?

You're welcome, I'm glad I was able to help. If you are now able to program the CPLD don't forget to close this issue.

Thanks

CapnRon commented 1 year ago

@Veto94 Any update on this? Is the CPLD programmed? Good luck!