New assembly methods asm::semihosting_syscall, asm::bootstrap, and
asm::bootload.
Deprecated
msp::write has been deprecated in favor of asm::bootstrap. It was not
possible to use msp::write without causing Undefined Behavior, so all
existing users are encouraged to migrate.
Fixed
Fixed a bug in asm::delay which could lead to incorrect codegen and
infinite loops.
Improved timing guarantees of asm::delay on multiple-issue CPU cores.
Additional compiler fences added to inline assembly where necessary.
Fixed DWARF debug information in pre-built assembly binaries.
New assembly methods asm::semihosting_syscall, asm::bootstrap, and
asm::bootload.
Deprecated
msp::write has been deprecated in favor of asm::bootstrap. It was not
possible to use msp::write without causing Undefined Behavior, so all
existing users are encouraged to migrate.
Fixed
Fixed a bug in asm::delay which could lead to incorrect codegen and
infinite loops.
Improved timing guarantees of asm::delay on multiple-issue CPU cores.
Additional compiler fences added to inline assembly where necessary.
Fixed DWARF debug information in pre-built assembly binaries.
[v0.7.0] - 2020-11-09
Added
New InterruptNumber trait is now required on interrupt arguments to the
various NVIC functions, replacing the previous use of Nr from bare-metal.
For backwards compatibility, InterruptNumber is implemented for types
which are Nr + Copy, but this will be removed in a future version.
Associated const PTR is introduced to Core Peripherals to
eventually replace the existing ptr() API.
A delay driver based on SysTick.
You can now use LTO to inline assembly calls, even on stable Rust.
See the asm/lib.rs documentation for more details.
Initial ARMv8-M MPU support
ICTR and ACTLR registers added
Support for the Security Attribution Unit on ARMv8-M
Changed
Previously, asm calls without the inline-asm feature enabled used pre-built
objects which were built by a GCC compiler, while inline-asm enabled the
use of llvm_asm! calls. The asm system has been replaced with a new
technique which generates Rust static libs for stable calling, and uses the
new asm! macro with inline-asm. See the asm/lib.rs documentation for
more details.
Cache enabling now uses an assembly sequence to ensure correctness.
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Updates the requirements on cortex-m to permit the latest version.
Release notes
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Sourced from cortex-m's changelog.
... (truncated)
Commits
ad7e01b
Merge #3204b7764a
Prepare for v0.7.1465f303
Merge #3197777775
CHANGELOG updates2082aca
Merge #3184c624da
Use LTO instead of removing the panic handler manually. Closes #3096d75b14
Merge #3178b6c269
Fix __delay clobberd4cbf07
Merge #313c828dd9
Remove excessive missing_inline_in_public_itemsYou can trigger a rebase of this PR by commenting
@dependabot rebase
.Dependabot commands and options
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