cogenda / Genius-TCAD-Open

Open-source version of the Genius Semiconductor Device Simulator
http://www.cogenda.com
Other
117 stars 68 forks source link

Butting electrode regions #14

Closed deanjennings closed 11 years ago

deanjennings commented 11 years ago

I am trying to butt one electrode against another to form a field plate. The first electrode makes contact with silicon, the second electrode is connected to the first and forms a field plate. There is oxide between the field plate and the underlying silicon. The UG says that this REGION arrangement is OK. It works for making STI however, with Elec, or with Al, it aborts during boundary condition build with no error message.

cogenda commented 11 years ago

Sorry this is not supported. Alternatively, you can enable the "resistive metal" mode in the Global command, i.e. GLOBAL T=300 Resistivemetal=true

In this mode, butting metal regions are allowed. A "solderpad" boundary condition must be defined somewhere on the metal region BOUNDARY id="anode" type="solderpad"

such that you can attach voltage sources to the "anode".