Closed MichaelSuen-thePointer closed 9 months ago
There's no significant performance impact on the platforms we care about
Ever tested on ARM platforms? From what I know, sequential consistent atomics are much heavier than acquire/release atomics in weak order CPUS.
From what I know, sequential consistent atomics are much heavier than acquire/release atomics in weak order CPUS.
No. On 64-bit ARM, you will see the same machine code generated for every (or nearly every) atomic operation we use for seq_cst vs. acq/rel.
-- This is not an official python repo so I put discussion here. --
I've read your blog. Using biased atomic ref counting is a genius idea. But in the code, I've noticed that you intentionally use sequential consistent atomic operations (seq_cst), in all of the atomic wrappers (std, gcc, msvc). Could you explain the reason behind the choice?
https://github.com/colesbury/nogil-3.12/blob/nogil-3.12/Include/pyatomic_std.h#L21