Closed mlund closed 1 year ago
There is a mismatch in the documented addresses of the two VIA chips.
In I/O documentation:
https://github.com/commanderx16/x16-docs/blob/3b891f6dfdf242e18e2623c083a0d8303f1c9277/X16%20Reference%20-%2010%20-%20IO%20Programming.md?plain=1#L5
and in the memory map: https://github.com/commanderx16/x16-docs/blob/3b891f6dfdf242e18e2623c083a0d8303f1c9277/X16%20Reference%20-%2007%20-%20Memory%20Map.md?plain=1#L90
Which one is true?
This has been fixed in 069cb87, but there is one more incorrect reference:
https://github.com/commanderx16/x16-docs/blob/master/X16%20Reference%20-%2004%20-%20KERNAL.md?plain=1#L192
There is a mismatch in the documented addresses of the two VIA chips.
In I/O documentation:
https://github.com/commanderx16/x16-docs/blob/3b891f6dfdf242e18e2623c083a0d8303f1c9277/X16%20Reference%20-%2010%20-%20IO%20Programming.md?plain=1#L5
and in the memory map: https://github.com/commanderx16/x16-docs/blob/3b891f6dfdf242e18e2623c083a0d8303f1c9277/X16%20Reference%20-%2007%20-%20Memory%20Map.md?plain=1#L90
Which one is true?