search

commanderx16 / x16-emulator

Emulator for the Commander X16 8-bit computer
384 stars 61 forks source link

SPRCOL bits should be set in ISR irrespective of IEN #473

Closed mooinglemur closed 1 year ago

mooinglemur commented 1 year ago

AFLOW, SPRCOL, LINE, and VSYNC bits in ISR should be set regardless of what happens to be in IEN. In https://github.com/commanderx16/x16-emulator/pull/462 we fixed this for LINE and VSYNC, but I missed SPRCOL, which is fixed in this PR.

Hardware: image

Emulator before fix: image

Emulator after fix: image

indigodarkwolf commented 1 year ago

If only all the PRs were this easy. 😇

indigodarkwolf commented 1 year ago

That said, just out of an abundance of caution, I'll be merging the larger audio PR first. Looking at the code, I don't anticipate a conflict, but I've been surprised before. So I look forward to merging this on Monday.