Open SlithyMatt opened 4 years ago
I really don't like the multiplexing implied by the CTRL register bit 0 (ADDRSEL); precisely because of this issue. I would much prefer to have the ADDR0* and ADDR1* registers separated to two different addresses (just like the DATA0 and DATA1 registers are).
This could be achieved by either increasing the address space for the VERA, or my multiplexing DC_* even further.
@fvdhoef ?
Related: #197
See also #39.
There is simply not enough address space to have the extra registers and an extra address line isn't possible since there aren't any free FPGA pins left.
If the VERA CTRL register is set to 1 (or any non-zero value, if things have really gone wrong), a call to CHRIN or CHROUT no longer print characters that are entered by the keyboard or programmatically, respectively. The only characters that get printed out are spaces, randomly reversed or not. Any call to CHRIN or CHROUT should zero out CTRL before attempting to print characters to the screen.
Current workaround is to put this responsibility on the application programmer, and reset CTRL to zero before making any calls to CHRIN or CHROUT.