What's our VIA & Timer story

[mist64]

Currently, we do this:

• VIA#1 (NMI):
  • All GPIOs are in use by internal hardware.
  • Timer 1 is used by the entropy driver (free running $ffff->$0000).
  • Timer 2 is used by the Serial Bus driver.
• VIA#2 (IRQ) is completely unused by the KERNAL.
• VERA VBLANK is used for the 60 Hz IRQ. The problem with VERA VBLANK is that it'll be 50 Hz if VERA is switched to PAL S-Video output, and it's not exactly 60 Hz even in VGA mode, so it might not be a good source for the 60 Hz IRQ. We could use a VIA timer, but it would have to be VIA#2, which then isn't unused any more.

[akumanatt]

From the current VERA's source, it doesn't have PAL composite mode. But it does have different VBlank frequency between interlaced and progressive modes due to different dots per line count, for some reason.

Excerpt from my docs:

Progressive Line Rate   31.25000kHz (25MHz/800)
Interlaced Line Rate    15.74307kHz (25MHz/(794*2))
Progressive Frame Rate  59.523810Hz (25MHz/(525*800))
Interlaced Frame Rate   29.986805Hz (25MHz/(525*794*2))

Also, YM2151 its own timer IRQs but it's not useful here since it's too slow to be read at 8 MHz.

I think the solution here is to use VIA 1 Timer 1 for 122.06 Hz IRQ (as that's the maximum period at 8 MHz) or 240Hz, the counting range would still be enough for PRNG seed anyway.

[mist64]

VIA 1 Timers are no good for the 60 Hz interrupt, because VIA 1 can only do NMIs, and the 60 Hz interrupt should be maskable. The serial code relies on this, for example.

[akumanatt]

I see, so there's no other choice but to use VIA 2

[mist64]

I'm leaning towards leaving it as is. We have a real RTC, so the wall clock (TI$) will always be accurate. It's just the 24bit 60Hz counter that will drift a little when in composite mode, which is okay.

[mooinglemur]

VIA1 now uses IRQ