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contiki-ng / mspsim

Official MSPSim git repository
BSD 3-Clause "New" or "Revised" License
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BasicClockModule.java does not support 'Basic Clock Module+' for MSP430x2xx well. #35

Open jsjeong opened 10 years ago

jsjeong commented 10 years ago

In 'Basic Clock Module+', RSELx is 0~3 bits of BCSCTL1. It's not equal to Basic Clock Module for MSP430x1xx that RSELx is 0~2 bits of BCSCTL1.

The se.sics.mspsim.core.BasicClockModule get RSELx value only for Basic Clock Module in write(). It causes wrong DCO configuration on Z1 mote simulation.

atiselsts commented 10 years ago

I second this.

There is also another problem: the maximum DCO frequency in BasicClockModule is limited by the MAX_DCO_FRQ constant, which at the moment is set to 4915200 (~4.9 MHz).

This is clearly insufficient for msp430 Series-2 devices that can run up to 16 MHz according to the MSP430x2xx Family User's Guide. For instance, the default MCU speed of Z1 motes in Contiki is 8 MHz.