cornell-brg / pymtl

Python-based hardware modeling framework
BSD 3-Clause "New" or "Revised" License
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pymtl doesn't correctly register combinational blocks that write to slices of an OutPort #182

Closed Xaec6 closed 4 years ago

Xaec6 commented 4 years ago

For example, the following code does not guarantee that models wired to the outport will execute after the combinational block is finished, but adding s.out.value = 0 at the beginning of the block fixes the issue.

class BuggyClass( Model ):    
    def __init__( s):
        s.in_ = InPort ( 4 )
        s.out = OutPort( 2 )

        @s.combinational
        def logic():
            s.out[1] = ~s.in_[1]
            s.out[0] = s.in_[3]
yo96 commented 4 years ago

You should use .value Inside your combinational block, i.e.:

        @s.combinational
        def logic():
            s.out[1].value = ~s.in_[1]
            s.out[0].value = s.in_[3]

Hope this solves your problem!

Xaec6 commented 4 years ago

oh i didn't realize value could be used on slices, thanks!