cornell-brg / pymtl

Python-based hardware modeling framework
BSD 3-Clause "New" or "Revised" License
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Bits instantiations within behavioral blocks cannot be translated #65

Closed dmlockhart closed 10 years ago

dmlockhart commented 10 years ago
s.x.value = Bits( 3, 0 )
x.y.value = concat( s.some_signal, Bits( 2, 1 ) )

Should be translated into the following verilog

  x = 3'd0;
  y = { some_signal, 2'd1 };