Test_vivado_hls failed using `hcl.platform`

[chhzh123]

There are no documents about the usage of hcl.platform, and I can only guess from the provided examples. However, when I run the test_vivado_hls function in test_runtime_build.py, I received the following error.

Traceback (most recent call last):
  File "test_runtime_build.py", line 41, in <module>
    test_vivado_hls()
  File "test_runtime_build.py", line 30, in test_vivado_hls
    f(hcl_A, hcl_B)
  File "/home/chz/heterocl/python/heterocl/tvm/_ffi/function.py", line 128, in __call__
    return f(*args)
  File "/home/chz/heterocl/python/heterocl/tvm/_ffi/_ctypes/function.py", line 183, in __call__
    ctypes.byref(ret_val), ctypes.byref(ret_tcode)))
  File "/home/chz/heterocl/python/heterocl/tvm/_ffi/base.py", line 66, in check_call
    raise TVMError(py_str(_LIB.TVMGetLastError()))
heterocl.tvm._ffi.base.TVMError: [17:29:09] src/codegen/build_util.cc:376: Check failed: test_file.find("test(") != std::string::npos cannot find top function

USE_VIVADO_HLS is set, and vivado_hls is also in system path.

What I have done is to change the platform from aws_f1 to zc706 and comment the streaming commands.

I think this probably is not a bug, since the program seems to pass the test on the cloud. But I wonder how I can correctly do simulation and synthesis in HeteroCL. Thanks!

[hecmay]

That's a problem from the header generation logic. For Vivado HLS backend, HeteroCL analyzes the generated kernel code, and try to locate the top-level function in the code string (i.e. the test function here), and generate the header file for it.

Since .to is not used in this case, the whole program will run on the host CPU. As a result, there is no top-level function found in the generated code, and thus the error occurred. A simple workaround is to add .to back to the program. I will update the header generation logic in #206.

[hecmay]

Another issue caused by the header generation logic is that the pragmas are hardcoded for VHLS SDSoC mode (this is a quick and dirty solution to make it work... will fix it very soon) https://github.com/cornell-zhang/heterocl/blob/master/tvm/src/codegen/build_util.cc#L382-L404

[zhangzhiru]

@Hecmay when do we plan to add the user document on the usage of the hcl.platform?

[hecmay]

I will discuss with Sean. We can add a short tutorial to showcase how to use the platform feature.

[chhzh123]

A simple workaround is to add .to back to the program.

Thanks. This method works for software simulation, but how can I run synthesis?

I found there is a condition of platform == "vivado" in build_module.py, so I change the target of test_vivado_hls to target.config(compile="vivado", mode="hw_sim"), but it leads to errors again.

Traceback (most recent call last):
  File "test_runtime_build.py", line 42, in <module>
    test_vivado_hls()
  File "test_runtime_build.py", line 24, in test_vivado_hls
    f = hcl.build(s, target)
  File "/home/chz/heterocl/python/heterocl/api.py", line 318, in build
    return _build(schedule.sch, new_inputs, target=target, name=name, stmt=stmt)
  File "/home/chz/heterocl/python/heterocl/tvm/build_module.py", line 768, in build
    return build_fpga_kernel(sch, args, target, name=name)
  File "/home/chz/heterocl/python/heterocl/tvm/build_module.py", line 716, in build_fpga_kernel
    return builder(fdevice, keys, vals)
  File "/home/chz/heterocl/python/heterocl/tvm/_ffi/function.py", line 280, in my_api_func
    return flocal(*args)
  File "/home/chz/heterocl/python/heterocl/tvm/_ffi/_ctypes/function.py", line 183, in __call__
    ctypes.byref(ret_val), ctypes.byref(ret_tcode)))
  File "/home/chz/heterocl/python/heterocl/tvm/_ffi/base.py", line 66, in check_call
    raise TVMError(py_str(_LIB.TVMGetLastError()))
heterocl.tvm._ffi.base.TVMError: [23:55:29] include/tvm/./packed_func_ext.h:101: Check failed: NodeTypeChecker<TNodeRef>::Check(sptr.get()) Expected type array<Expr> but get Array

[hecmay]

I have not checked the Vivado synthesis flow yet. Will check it now.

[chhzh123]

Thanks. This method works for software simulation, but how can I run synthesis?

I found there is a condition of platform == "vivado" in build_module.py, so I change the target of test_vivado_hls to target.config(compile="vivado", mode="hw_sim"), but it leads to errors again.

Use target.config(compile="vivado_hls",mode="csyn") to run synthesis. This mode has been added in #215 .

[chhzh123]

Since .to is not used in this case, the whole program will run on the host CPU. As a result, there is no top-level function found in the generated code, and thus the error occurred. A simple workaround is to add .to back to the program. I will update the header generation logic in #206.

206 does not fix this issue. When no .to is specified, it causes errors.

[hecmay]

I will add a primitive as a simple prototyping for compute placement. And instead of using the stream channels inside the kernel function, I will add a new IR pass to convert the on-chip buffer accessing to off-chip buffer accessing. This should address your concern. Will work on this and keep you posted.

[hecmay]

This should have been fixed in https://github.com/cornell-zhang/heterocl/pull/418. Test case added in tests/issues/test_issue_207.py. Please reopen the issue if the error still exists.