Errors
test.d(100): Error: class uvm.base.uvm_component.uvm_component member print_config_matches is not accessible
test.d(100): Error: function uvm.base.uvm_component.uvm_component.uvm_once_sync!().print_config_matches is not accessible from module test
Please see the following code with error
import uvm; import esdl; import std.stdio;
bool test_error = 0;
class test_root: uvm_root{ mixin uvm_component_utils; }
class TestBench: RootEntity{ uvm_root_entity!(test_root) tb; }
class obj: uvm_object{
int t; string xt;
mixin uvm_object_utils;
this(string name="obj"){ super(name); } }
class component: uvm_component{
int i; string s; obj o;
mixin uvm_component_utils;
this(string name, uvm_component parent){ super.build(); }
override void run(){ if(i != 7){ uvm_error("TESTERROR", "i != 7"); test_error = 1; }
} }
class env: uvm_component{
component c;
mixin uvm_component_utils;
this(string name, uvm_component parent = null){ super(name, parent); }
override void build(){ obj o;
} }
class test: uvm_component{
mixin uvm_component_utils;
env e;
this(string name, uvm_component parent){ super(name, parent); }
override void build(){ e = new env("env", this); uvm_component.print_config_matches = 1; }
override void run(){ print_config_with_audit(1); }
override void report(){ if(test_error) writeln("\ UVM TEST FAIL "); else writeln(" UVM TEST PASSED **"); } }
void main(string [] argv) { TestBench tb = new TestBench; tb.multiCore(0,0); tb.elaborate("tb", argv); tb.simulate(); }
Errors test.d(100): Error: class uvm.base.uvm_component.uvm_component member print_config_matches is not accessible test.d(100): Error: function uvm.base.uvm_component.uvm_component.uvm_once_sync!().print_config_matches is not accessible from module test