cpc / openasip

Open Application-Specific Instruction Set processor tools (OpenASIP)
http://openasip.org
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[Loop Buffer] loop buffer instructions are not inserted in processors without predication #128

Closed barrydebruin closed 2 years ago

barrydebruin commented 2 years ago

For processors without predication support i.e. the gcu uses bnz, bz instead of jump + conditional execution, the loop scheduler fails to insert loop buffer operations.

The verbose tcecc output indicates that the loops are found, but somehow it will always fail to insert the loop buffer instructions:

loop scheduler failed, using basic block scheduler instead

See a output snippet below:

---- LowerMissingInstructions ----
using 'GM' as the default data address space
### compiling (optimized): _start
### compiling (optimized): _exit
### compiling (optimized): main
CFG detects single BB loop
tripcount: 3
executing loop pass with trip count 3
LoopScheduler with MinII=1 MaxII=18
Testing with II=6
Loop scheduling with epilog,  no conditional prolog(no predication)

Handling new loop ddg: main_1
Testing with II=18
Loop scheduling with epilog,  no conditional prolog(no predication)

Handling new loop ddg: main_2
loop scheduler failed, using basic block scheduler instead
BB -- inner loop with trip count: 3
BB -- instruction count: 9
BB -- move slots used: 17 of 108 (15.7407%)
DDG height 11
CFG detects single BB loop
tripcount: 128
executing loop pass with trip count 128
LoopScheduler with MinII=1 MaxII=18
Testing with II=6
Loop scheduling with epilog,  no conditional prolog(no predication)
pjaaskel commented 2 years ago

Loop buffer is an experimental feature not yet finished nor published in the open source branch. Please create this in the private repository's bug tracker instead.

pjaaskel commented 2 years ago

(And I believe loop buffer for machines without predication is simply an unimplemented feature.)