Bug-fix: remove hardcoded widths used in pktbuf addressing

[NAtre]

While the size of Pigasus' packet buffer is intended to be a configurable parameter, the widths of signals used for addressing are currently hardcoded (to constant values, e.g., log2(1024)+5 = 15) in a number of places. Consequently, trying to resize the buffer by modifying the PKT_NUM parameter (either directly or through Fluid) produces incorrect results. Simulation output with PKT_NUM set to 2048 (instead of the default value, 1024):

\# Finish LL emptylist init
\# Finish PKT emptylist init
\# PKT          0
\# ** Error: [fast_pattern] bypass_pkt_FIFO overflows!

This change replaces these hardcoded constants with the correct address width ("PKTBUF_AWIDTH"), allowing the packet buffer to be resized as required.

Testing: Verified output in simulation for both pigasus and pigasus_multi with buffer sizes in {64, ..., 16384}. Note that this doesn't change the default buffer size for either the BRAM- or eSRAM-based designs, so, the default bitstream should be exactly the same.

Important: This builds on the VTL change (see this PR), so please merge that one first!

[NAtre]

Good point, thank you! Added an assertion to enforce this in esram_wrapper.sv.

Testing: As expected, elaboration completes when PKTBUF_DEPTH is LEQ the eSRAM capacity, but errors out when this is not true (e.g., with PKT_NUM set to 2689 instead of the default, 2688).