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crossroadsfpga / pigasus

100Gbps Intrusion Detection and Prevention System
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Does ip_gen.tcl connect components? #6

Closed rewingchow1 closed 2 years ago

rewingchow1 commented 2 years ago

I have 44 system connectivity errors in the Platform Designer. Attached photo of Platform Designer window.

Also using Platform Designer 19.3 Build 222.

Screen Shot 2021-07-13 at 2 54 30 PM

rewingchow1 commented 2 years ago

System Design with connections

Screen Shot 2021-07-13 at 3 02 13 PM Screen Shot 2021-07-13 at 3 02 36 PM Screen Shot 2021-07-13 at 3 02 55 PM Screen Shot 2021-07-13 at 3 03 06 PM

zhipengzhaocmu commented 2 years ago

It should not connect the IP blocks in qsys. The purpose of the script is to create the IP blocks and generate the RTL code of each IP block. We compose these IP blocks in our RTL source code.

rewingchow1 commented 2 years ago

So this is expected right?

zhipengzhaocmu commented 2 years ago

The script is not supposed to be used in this way. But if you use it from GUI, these errors are expected.

rewingchow1 commented 2 years ago

Yea, I'm running the ip_gen.sh line by line to make sure that everything is expected. I opened the system in Platform Designer after running "qsys-script --quartus-project=ip_gen.qpf --script=ip_gen.tcl"

After running "qsys-generate ip_gen.qsys --synthesis=VERILOG", I saw some errors about connections and was concerned. Screen Shot 2021-07-13 at 3 24 56 PM

zhipengzhaocmu commented 2 years ago

As long as the indivual IP's RTL code is generated, you should be fine.