Review level shifter DAC design

[codeThatThinks]

• Check DAC reference voltage
• Check op-amp gain and resistor tolerances
• Maybe add calibration using mcu adc pins?

[codeThatThinks]

It seems that all Microchip DACs default to the interval reference on power up. This is not an issue, just another step that software needs to take when initializing everything.

[codeThatThinks]

The op-amp gain equation for the demo board is:

Vout = 1000/68 * (1.65 - Vdac)

With +/-24V rails, the target gain was 48/3.3 = 14.545, so using standard resistor values the gain is a little off, 1000/68 = 14.705.

The resistors are 1% tolerance. If the resistors are at the opposite ends of their tolerance, and the DAC output is at its maximum, then the output is actually:

(1000 * 1.01)/(68 * 0.99) * (1.65 - 3.3) = -24.755

That is an error of 0.755V, which is significant. Note, this is an approximation since the actual gain equation is more complicated when the resistance is not the same for each pair of resistors, so in reality the output would be off by even more.

For rev 1, the power rails are now +/-15V, so the new gain equation is:

Vout = 1000/110 * (1.65 - Vdac)

This ratio of nominal resistor values actually matches the target gain, where 1000/110 = 30/3.3 = 9.09. If 1% resistors are used, then the maximum error is approximately 0.303V. This is still probably too much, as it should really be somewhere around +/-0.1V. Therefore, 0.1% resistors should be used.

[codeThatThinks]

The differential receiver threshold voltage will be replaced with a 1 channel DAC for rev 1. This simplifies the board layout a lot and cuts down on the BOM cost. This way, the software will have to calculate the required receiver threshold voltage and set it when switching to differential mode. If this were to be done in hardware, a 4 channel 4:1 demux (a 24 pin chip) + dual opamp circuit would be required to handle all of the threshold voltage combinations depending on whether or not the microcontroller output is inverted. That is for each I/O channel pair. (We need to be able to invert an I/O channel output in software in order to handle some differential protocols).

I've chosen the 1 channel version of the MCP4728, which is the MCP4725. An op-amp circuit similar to the 4 ch DAC will be used to scale the output to +/-15V.

[codeThatThinks]

I think we will have enough pins free on the MCU to run each DAC output to an ADC channel. For 4 I/O channels, that will be (4 + 1) * 2 = 10 DAC outputs. We can choose whether or not we want to use this for calibration, and whether or not we need it, but for rev 1 I will include it on the board.

We might run into issues noise coupling onto the ADC lines, which might make calibration difficult/impossible, but we need to build it to find out.