Group Generation: Aggregate Signals into busses where appropriate

[cube1us]

As time goes on generated groups should really use busses instead of individual signals, making grouping of groups practical.

Create a database table of signal busses:

signal name, bus name, bit number

NOTE: A given register can have both negative and positive signals. These should be treated as if they were independent to preserve the original signal paths. (e.g. -S IRING TIME might be MS_IRING_BUS and +S IRING TIME might be PS_IRING_BUS). It also keeps things simpler.

Individual sheets (and their port maps) will use the individual signal names.

During group generation, generate the individual sheet port maps using the individual signal names as well.

For the GROUP entity definition:

For an INPUT signal, i.e. one which is only input to individual sheets in the group, use the group name in the port (when the first one is encountered), and create a "bus rip" signal definition as part of the group. Example:

PS_IRING_2_TIME <= PS_IRING_BUS(2)

(Where PS_IRING would appear in the input section of the port map)

This way, the generation of the individual sheet port map input still works.

For an OUTPUT signal, i.e. one which is generated by pages in the group:

IF and ONLY IF ALL of the signals for a given bus are output by the group sheets, then place the BUS NAME as output from the group, and generate a bus aggregation signal and assignment as part of the group. Of course, only include this output ONCE (when the first output bit is encountered while constructing the port definition.)

For, for example, if 11.20.*.1 generates all of the IRING bits (as one might expect), then individual sheets will still output their individual bits, and the following aggregate might appear:

signal PS_IRING: STD_LOGIC_VECTOR(12 downto 0); PS_IRING <= (PS_IRING_12_TIME, PS_IRING_11_TIME, ... PS_IRING_OP_TIME);

Otherwise, use individual signal names for outputs from the group.

[cube1us]

Completed. See updated documentation for details.