Open calebmkim opened 1 year ago
@calebmkim are we planning to do this for this deadline?
Possibly, but I think the systolic array stuff is taking priority right now. I think it also might be worth reconsidering the stability issue if experiments show that our systolic arrays use way too many registers. So this would take priority.
However, depending on when I get that done, I'd be down to take a shot at this. To be clear, there are two concerns I'm thinking of.
signal_reg
prevent us from sharing FSMsgroup A {
B[go] = ...;
}
Now, not only can A
and B
not share an FSM, but now any cell that is live in A
also must be counted as live in B
. I haven't thought about this fully (so maybe it's not actually a concern), but we'd have to make sure that cell sharing correctly handles this case.
Running the cell-sharing pass doesn't work for the registers generated during static compilation. This is because we generate continuous assignments
signal_reg.in = fsm.out == 0 & signal_reg == 1 ? 1'd1
, which resets thesignal_reg
when the group is done. Because of this continuous assignment, we cannot share thesignal_reg
or thefsm
associated with the group.This required some extra work in https://github.com/cucapra/calyx/pull/1632, in which we used the same coloring analysis to assign FSMs to groups ahead of time. It would be nice if cell sharing "just worked" with FSM generation.