Closed Mark1626 closed 7 months ago
Ah yes, this is definitely wrong. It should be done
and we should be generating content_en
signals and writing write_en = 0
or write_en = 1
depending on whether we want to perform a writ
I'll take a stab at this. A question for Calyx maybe, I don't see seq_mem_d1
documented
https://docs.calyxir.org/libraries/core.html#memories
I created a branch with a fix but it seems like the existing PR #401 itself would solve this problem. Any reason why it hasn't been merged?
Ah, that should've been merged after the new release of Calyx. There is a syntax change needed on the branch before it works. Could you take a shot?
Syntax change in the generated IR? Sure I'll take a shot
Nope, the scala code needs a syntax change (because we're using Scala 3 now). I couldn't fix it from my phone.
Calyx IR for
seq_mem_d1
uses methods which were renamed in the current upstream CalyxThe following code
generated Calyx IR (truncated)
seq_mem_d1
primitive is usingread_done
which is renamed todone
. Similarly it's also usingread_en
andwrite_done