cyber-murmel
commented
3 years ago The modification turns output-only ports into IO ports - i.e. input and output are both possible.
The HUB75 connectors share some signals. There are only 56 individual signals in total. This results in the 7 Pmod connectors.
The chubby hat currently doesn't enable replacing the stock gateware (micro controllers have firmware; FPGAs have gateware). When uploading gateware via JTAG, it's placed in the volatile configuration registers of the FPGA. If then power is turned off and on again, the FPGA automatically loads the stock gateware from the on-board SPI flash.
As mentioned here it's suggested to replace the unidirectional buffers with SN74CBT3245APW 8bit bidirectional FET switches
Which pin is used as in or output will be determined by the gateware.
I hope this answers your questions, If something still remains unclear, feel free to follow up :-)
DoctorMikeReddy
As you’ve hard wired some of the outputs to be inputs - mentioned in #6 - do you need to have a template in the firmware to stop the FPGA trying to output on those lines? Presumably, you need to replace the stock firmware? Also, why are there only 7 pmod ports, when there are 8 hub75 outputs? What’s is the eighth one used for? Could one be used, with replacement buffer chips - from a thread on chubby75 - to allow switchable IO ports? So, all the ports could be selectable in/out ports?
Apologies for all the questions