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cyring / CoreFreq

CoreFreq : CPU monitoring and tuning software designed for 64-bit processors.
https://www.cyring.fr
GNU General Public License v2.0
1.99k stars 126 forks source link

Code review & Optimizations #144

Closed cyring closed 5 years ago

cyring commented 5 years ago
cyring commented 5 years ago
PREV-FUNC NEW-FUNC
504K 502K
cyring commented 5 years ago

https://github.com/cyring/CoreFreq/blob/ed75a48c194261c8b20b472fff9025615c88f526/corefreqd.c#L3920

cyring commented 5 years ago

Fix length of arrays [done]

corefreq-cli-rsc.h

#define RSC_LAYOUT_RULLER_FREQUENCY_CODE                \
{                                   \
    '-','-','-',' ','F','r','e','q','(','M','H','z',')',' ','R','a',\
    't','i','o',' ','-',' ','T','u','r','b','o',' ','-','-','-',' ',\
    'C','0',' ','-','-','-','-',' ','C','1',' ','-','-','-','-',' ',\
    'C','3',' ','-','-','-','-',' ','C','6',' ','-','-','-','-',' ',\
    'C','7',' ','-','-','M','i','n',' ','T','M','P',' ','M','a','x',\
    ' ','-','-','-','-','-','-','-','-','-','-','-','-','-','-','-',\
    '-','-','-','-','-','-','-','-','-','-','-','-','-','-','-','-',\
    '-','-','-','-','-','-','-','-','-','-','-','-','-','-','-','-',\
    '-','-','-','-','-','-','-','-','-','-','-','-','-','-','-','-',\
    '-','-','-','-','-','-','-','-','-','-','-','-','-','-','-','-',\
    '-','-','-','-','-','-','-','-','-','-','-','-','-','-','-','-',\
    '-','-','-','-','-','-','-','-','-','-','-','-','-','-','-','-',\
    '-','-','-','-','-','-','-','-','-','-','-','-','-','-','-','-',\
    '-','-','-','-','-','-','-','-','-','-','-','-','-','-','-','-',\
    '-','-','-','-','-','-','-','-','-','-','-','-','-','-','-','-',\
    '-','-','-','-','-','-','-','-','-','-','-','-','-','-','-','-',\
    '-','-','-','-','-','-','-','-','-','-','-','-','-','-','-','-',\
    '-','-','-','-','-','-','-','-','-','-','-','-','-','-','-','-',\
    '-','-','-','-','-','-','-','-','-','-','-','-','-','-','-','-',\
    '-','-','-','-','-','-','-','-','-','-','-','-','-','-','-','-' \
}

#define RSC_LAYOUT_RULLER_INST_CODE                 \
{                                   \
    '-','-','-','-','-','-','-','-','-','-','-','-',' ','I','P','S',\
    ' ','-','-','-','-','-','-','-','-','-','-','-','-','-','-',' ',\
    'I','P','C',' ','-','-','-','-','-','-','-','-','-','-','-','-',\
    '-','-',' ','C','P','I',' ','-','-','-','-','-','-','-','-','-',\
    '-','-','-','-','-','-','-','-','-',' ','I','N','S','T',' ','-',\
    '-','-','-','-','-','-','-','-','-','-','-','-','-','-','-','-',\
    '-','-','-','-','-','-','-','-','-','-','-','-','-','-','-','-',\
    '-','-','-','-','-','-','-','-','-','-','-','-','-','-','-','-',\
    '-','-','-','-','-','-','-','-','-','-','-','-','-','-','-','-',\
    '-','-','-','-','-','-','-','-','-','-','-','-','-','-','-','-',\
    '-','-','-','-','-','-','-','-','-','-','-','-','-','-','-','-',\
    '-','-','-','-','-','-','-','-','-','-','-','-','-','-','-','-',\
    '-','-','-','-','-','-','-','-','-','-','-','-','-','-','-','-',\
    '-','-','-','-','-','-','-','-','-','-','-','-','-','-','-','-',\
    '-','-','-','-','-','-','-','-','-','-','-','-','-','-','-','-',\
    '-','-','-','-','-','-','-','-','-','-','-','-','-','-','-','-',\
    '-','-','-','-','-','-','-','-','-','-','-','-','-','-','-','-',\
    '-','-','-','-','-','-','-','-','-','-','-','-','-','-','-','-',\
    '-','-','-','-','-','-','-','-','-','-','-','-','-','-','-','-',\
    '-','-','-','-','-','-','-','-','-','-','-','-','-','-','-','-' \
}

#define RSC_LAYOUT_RULLER_CYCLES_CODE                   \
{                                   \
    '-','-','-','-','-','-','-','-','-','-','-','-','-','-',' ','C',\
    '0',':','U','C','C',' ','-','-','-','-','-','-','-','-','-','-',\
    ' ','C','0',':','U','R','C',' ','-','-','-','-','-','-','-','-',\
    '-','-','-','-',' ','C','1',' ','-','-','-','-','-','-','-','-',\
    '-','-','-','-','-',' ','T','S','C',' ','-','-','-','-','-','-',\
    '-','-','-','-','-','-','-','-','-','-','-','-','-','-','-','-',\
    '-','-','-','-','-','-','-','-','-','-','-','-','-','-','-','-',\
    '-','-','-','-','-','-','-','-','-','-','-','-','-','-','-','-',\
    '-','-','-','-','-','-','-','-','-','-','-','-','-','-','-','-',\
    '-','-','-','-','-','-','-','-','-','-','-','-','-','-','-','-',\
    '-','-','-','-','-','-','-','-','-','-','-','-','-','-','-','-',\
    '-','-','-','-','-','-','-','-','-','-','-','-','-','-','-','-',\
    '-','-','-','-','-','-','-','-','-','-','-','-','-','-','-','-',\
    '-','-','-','-','-','-','-','-','-','-','-','-','-','-','-','-',\
    '-','-','-','-','-','-','-','-','-','-','-','-','-','-','-','-',\
    '-','-','-','-','-','-','-','-','-','-','-','-','-','-','-','-',\
    '-','-','-','-','-','-','-','-','-','-','-','-','-','-','-','-',\
    '-','-','-','-','-','-','-','-','-','-','-','-','-','-','-','-',\
    '-','-','-','-','-','-','-','-','-','-','-','-','-','-','-','-',\
    '-','-','-','-','-','-','-','-','-','-','-','-','-','-','-','-' \
}

#define RSC_LAYOUT_RULLER_CSTATES_CODE                  \
{                                   \
    '-','-','-','-','-','-','-','-','-','-','-','-','-','-','-','-',\
    ' ','C','1',' ','-','-','-','-','-','-','-','-','-','-','-','-',\
    '-','-',' ','C','3',' ','-','-','-','-','-','-','-','-','-','-',\
    '-','-','-','-',' ','C','6',' ','-','-','-','-','-','-','-','-',\
    '-','-','-','-','-','-',' ','C','7',' ','-','-','-','-','-','-',\
    '-','-','-','-','-','-','-','-','-','-','-','-','-','-','-','-',\
    '-','-','-','-','-','-','-','-','-','-','-','-','-','-','-','-',\
    '-','-','-','-','-','-','-','-','-','-','-','-','-','-','-','-',\
    '-','-','-','-','-','-','-','-','-','-','-','-','-','-','-','-',\
    '-','-','-','-','-','-','-','-','-','-','-','-','-','-','-','-',\
    '-','-','-','-','-','-','-','-','-','-','-','-','-','-','-','-',\
    '-','-','-','-','-','-','-','-','-','-','-','-','-','-','-','-',\
    '-','-','-','-','-','-','-','-','-','-','-','-','-','-','-','-',\
    '-','-','-','-','-','-','-','-','-','-','-','-','-','-','-','-',\
    '-','-','-','-','-','-','-','-','-','-','-','-','-','-','-','-',\
    '-','-','-','-','-','-','-','-','-','-','-','-','-','-','-','-',\
    '-','-','-','-','-','-','-','-','-','-','-','-','-','-','-','-',\
    '-','-','-','-','-','-','-','-','-','-','-','-','-','-','-','-',\
    '-','-','-','-','-','-','-','-','-','-','-','-','-','-','-','-',\
    '-','-','-','-','-','-','-','-','-','-','-','-','-','-','-','-' \
}

#define RSC_LAYOUT_RULLER_INTERRUPTS_CODE               \
{                                   \
    '-','-','-','-','-','-','-','-','-','-',' ','S','M','I',' ','-',\
    '-','-','-','-','-','-','-','-','-','-','-',' ','N','M','I','[',\
    ' ','L','O','C','A','L',' ',' ',' ','U','N','K','N','O','W','N',\
    ' ',' ','P','C','I','_','S','E','R','R','#',' ',' ','I','O','_',\
    'C','H','E','C','K',']',' ','-','-','-','-','-','-','-','-','-',\
    '-','-','-','-','-','-','-','-','-','-','-','-','-','-','-','-',\
    '-','-','-','-','-','-','-','-','-','-','-','-','-','-','-','-',\
    '-','-','-','-','-','-','-','-','-','-','-','-','-','-','-','-',\
    '-','-','-','-','-','-','-','-','-','-','-','-','-','-','-','-',\
    '-','-','-','-','-','-','-','-','-','-','-','-','-','-','-','-',\
    '-','-','-','-','-','-','-','-','-','-','-','-','-','-','-','-',\
    '-','-','-','-','-','-','-','-','-','-','-','-','-','-','-','-',\
    '-','-','-','-','-','-','-','-','-','-','-','-','-','-','-','-',\
    '-','-','-','-','-','-','-','-','-','-','-','-','-','-','-','-',\
    '-','-','-','-','-','-','-','-','-','-','-','-','-','-','-','-',\
    '-','-','-','-','-','-','-','-','-','-','-','-','-','-','-','-',\
    '-','-','-','-','-','-','-','-','-','-','-','-','-','-','-','-',\
    '-','-','-','-','-','-','-','-','-','-','-','-','-','-','-','-',\
    '-','-','-','-','-','-','-','-','-','-','-','-','-','-','-','-',\
    '-','-','-','-','-','-','-','-','-','-','-','-','-','-','-','-' \
}

#define RSC_LAYOUT_POWER_MONITOR_ATTR                   \
{                                   \
    LWK,LWK,LWK,LWK,LWK,LWK,LWK,LWK,LWK,LWK,            \
    HWK,HWK,HWK,HWK,HWK,HWK,HWK,HWK,HWK,HWK,HWK,HWK,HWK,        \
    LWK,LWK,LWK,HWK,HWK,HWK,HWK,HWK,HWK,HWK,HWK,HWK,HWK,HWK,HWK,HWK \
}

#define RSC_LAYOUT_POWER_MONITOR_CODE                   \
{                                   \
    ' ',' ',' ',' ',' ',' ',' ',' ',' ',' ',            \
    ' ',' ',' ',' ',' ',' ',' ',' ',' ',' ',' ',' ',' ',        \
    ' ',' ',' ',' ',' ',' ',' ',' ',' ',' ',' ',' ',' ',' ',' ',' ' \
}

#define RSC_CREATE_SETTINGS_COND_CODE "                                "

#define RSC_CREATE_HELP_BLANK_CODE "                  "

#define RSC_CREATE_ADV_HELP_BLANK_CODE "                                      "

corefreq-cli-rsc.c

https://github.com/cyring/CoreFreq/blob/516bf2ae94ae2488ef71c7beb615f84a7bd5dfc0/corefreq-cli-rsc.c#L416

#define LDV(attr_var, en_var, fr_var)                   \
    .Attr = attr_var,                       \
    .Code = {                           \
        [LOC_EN] = (ASCII*) en_var,             \
        [LOC_FR] = (ASCII*) fr_var              \
    }                               \

#define LDA(attr_var, en_var, fr_var)                   \
{                                   \
    LDV(attr_var, en_var, fr_var),                  \
    .Size = {                           \
        [LOC_EN] = sizeof(en_var),              \
        [LOC_FR] = sizeof(fr_var)               \
    }                               \
}

#define LDB(attr_var)                           \
{                                   \
    LDV(attr_var, hSpace, hSpace),                  \
    .Size = {                           \
        [LOC_EN] = sizeof(HSPACE),              \
        [LOC_FR] = sizeof(HSPACE)               \
    }                               \
}

#define LDS(attr_var, en_var, fr_var)                   \
{                                   \
    LDV(attr_var, en_var, fr_var),                  \
    .Size = {                           \
        [LOC_EN] = __builtin_strlen(en_var),            \
        [LOC_FR] = __builtin_strlen(fr_var)         \
    }                               \
}

#define LDT(en_var, fr_var) LDS(vColor, en_var, fr_var)

https://github.com/cyring/CoreFreq/blob/516bf2ae94ae2488ef71c7beb615f84a7bd5dfc0/corefreq-cli-rsc.c#L690

    [RSC_CREATE_SETTINGS_COND0] = LDS(  Rsc_CreateSettings_Cond_Attr[0],
                    RSC_CREATE_SETTINGS_COND_CODE,
                    RSC_CREATE_SETTINGS_COND_CODE),
    [RSC_CREATE_SETTINGS_COND1] = LDS(  Rsc_CreateSettings_Cond_Attr[1],
                    RSC_CREATE_SETTINGS_COND_CODE,
                    RSC_CREATE_SETTINGS_COND_CODE),
    [RSC_CREATE_ADV_HELP_COND0] = LDS(  Rsc_CreateAdvHelp_Cond_Attr[0],
                    RSC_CREATE_ADV_HELP_BLANK_CODE,
                    RSC_CREATE_ADV_HELP_BLANK_CODE),
    [RSC_CREATE_ADV_HELP_COND1] = LDS(  Rsc_CreateAdvHelp_Cond_Attr[1],
                    RSC_CREATE_ADV_HELP_BLANK_CODE,
                    RSC_CREATE_ADV_HELP_BLANK_CODE),

https://github.com/cyring/CoreFreq/blob/516bf2ae94ae2488ef71c7beb615f84a7bd5dfc0/corefreq-cli-rsc.c#L1284

    [RSC_HELP_BLANK]    = LDS(  vColor,
                    RSC_CREATE_HELP_BLANK_CODE,
                    RSC_CREATE_HELP_BLANK_CODE),

Fix misc attributes [done]

https://github.com/cyring/CoreFreq/blob/516bf2ae94ae2488ef71c7beb615f84a7bd5dfc0/corefreq-cli.c#L3609

    StoreWindow(wHelp, .color[1].select, MAKE_PRINT_FOCUS);
cyring commented 5 years ago

Uncore programming [done]

Skylake/S

https://github.com/cyring/CoreFreq/blob/516bf2ae94ae2488ef71c7beb615f84a7bd5dfc0/corefreqk.h#L3784

[Skylake_S]  = {                            /* 39*/
    .Signature = _Skylake_S,
    .Query = Query_Broadwell,
    .Update = PerCore_Skylake_Query,
    .Start = Start_Skylake,
    .Stop = Stop_Skylake,
    .Exit = NULL,
    .Timer = InitTimer_Skylake,
    .BaseClock = BaseClock_Skylake,
    .ClockMod = ClockMod_Skylake_HWP,
    .TurboClock = Intel_Turbo_Config8C,
    .thermalFormula = THERMAL_FORMULA_INTEL,
    .voltageFormula = VOLTAGE_FORMULA_INTEL_SNB,
    .powerFormula   = POWER_FORMULA_INTEL,
    .PCI_ids = PCI_Skylake_ids,
    .Uncore = {
        .Start = Start_Uncore_Skylake,
        .Stop = Stop_Uncore_Skylake,
        .ClockMod = Haswell_Uncore_Ratio
        },
    .Specific = Void_Specific,
    .SystemDriver = &SKL_Driver,
    .Architecture = Arch_Skylake_S
    },

https://github.com/cyring/CoreFreq/blob/516bf2ae94ae2488ef71c7beb615f84a7bd5dfc0/corefreqk.c#L2130

long Haswell_Uncore_Ratio(CLOCK_ARG *pClockMod)
{
    long rc = 0;
    UNCORE_RATIO_LIMIT UncoreRatio = {.value = 0};
    RDMSR(UncoreRatio, MSR_HSW_UNCORE_RATIO_LIMIT);

    if (pClockMod != NULL) {
        unsigned short WrRdMSR = 0;
        switch (pClockMod->NC) {
        case CLOCK_MOD_MAX:
            UncoreRatio.MaxRatio += pClockMod->Offset;
            WrRdMSR = 1;
            break;
        case CLOCK_MOD_MIN:
            UncoreRatio.MinRatio += pClockMod->Offset;
            WrRdMSR = 1;
            break;
        }
        if (WrRdMSR) {
            WRMSR(UncoreRatio, MSR_HSW_UNCORE_RATIO_LIMIT);
            RDMSR(UncoreRatio, MSR_HSW_UNCORE_RATIO_LIMIT);
            rc = 2;
        }
    }

    Proc->Uncore.Boost[UNCORE_BOOST(MIN)] = UncoreRatio.MinRatio;
    Proc->Uncore.Boost[UNCORE_BOOST(MAX)] = UncoreRatio.MaxRatio;

    return(rc);
}

https://github.com/cyring/CoreFreq/blob/516bf2ae94ae2488ef71c7beb615f84a7bd5dfc0/corefreq-cli.c#L6668

        ComputeRatioShifts(Shm->Uncore.Boost[BOOST(MIN)],
                1,
                Shm->Proc.Features.Factory.Ratio,
                &lowestShift,
                &highestShift);
cyring commented 5 years ago

Quit corefreq-cli when terminal is closed [done]

void TrapSignal(int operation)
{
    if (operation == 0) {
        Shm->AppCli = 0;
    } else {
        const int ignored[] = {
            SIGUSR1, SIGUSR2, SIGTTIN, SIGTTOU, SIGIO,
            SIGILL, SIGBUS, SIGFPE, SIGPWR, SIGSYS, SIGTRAP,
            SIGALRM, SIGPROF, SIGPIPE, SIGABRT, SIGSEGV,
            SIGXCPU, SIGXFSZ, SIGSTKFLT, SIGVTALRM, SIGCHLD
        }, handled[] = {
            SIGINT, SIGQUIT, SIGTERM, SIGTSTP, SIGHUP
        };
        /* SIGKILL,SIGCONT,SIGSTOP,SIGURG,SIGWINCH: Reserved    */
        int signo;

        Shm->AppCli = getpid();
        for (signo = SIGRTMIN; signo <= SIGRTMAX; signo++) {
            signal(signo, SIG_IGN);
        }
        for (signo = 0; signo < sizeof(ignored)/sizeof(int); signo++) {
            signal(ignored[signo], SIG_IGN);
        }
        for (signo = 0; signo < sizeof(handled)/sizeof(int); signo++) {
            signal(handled[signo],  Emergency);
        }
    }
}
cyring commented 5 years ago

Target ratio for non-Turbo Processors [done]

void TurboBoost_Technology(CORE *Core,  SET_TARGET SetTarget,
                    GET_TARGET GetTarget,
                    CMP_TARGET CmpTarget,
                    unsigned int TurboRatio,
                    unsigned int ValidRatio)
{                               /* Per SMT */
    int ToggleFeature;
    MISC_PROC_FEATURES MiscFeatures = {.value = 0};
    RDMSR(MiscFeatures, MSR_IA32_MISC_ENABLE);

    BITSET_CC(LOCKLESS, Proc->TurboBoost_Mask, Core->Bind);
    RDMSR(Core->PowerThermal.PerfControl, MSR_IA32_PERF_CTL);

  if ((MiscFeatures.Turbo_IDA == 0) && (Proc->Features.Power.EAX.TurboIDA))
  {
    switch (TurboBoost_Enable) {
/* ... */
}
cyring commented 5 years ago
cyring commented 5 years ago

All of these implemented.