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cyring / CoreFreq

CoreFreq : CPU monitoring and tuning software designed for 64-bit processors.
https://www.cyring.fr
GNU General Public License v2.0
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[Intel] PRE Command Timing register at offset 0x4000 #255

Closed cyring closed 3 years ago

cyring commented 3 years ago

tRAS

From 6th up to 10th generation, tRAS bit range is [14-8], change happens in 11th generation where range is [15-9]

Is this a typo or a real change in Rocket Lake ?

I dont' have the hardware to test with; any help is welcomed.

11th Generation

PRE_CMD_0x4000_11th_Gen PRE_CMD_0x4000_11th_Gen_2

10th Generation

PRE_CMD_0x4000_10th_Gen PRE_CMD_0x4000_10th_Gen_2

8th Generation

PRE_CMD_0x4000_8th_Gen

7th Generation

PRE_CMD_0x4000_7th_Gen

6th Generation

PRE_CMD_0x4000_6th_Gen

cyring commented 3 years ago

Specs are indeed impacted. See commit a36be2d24fc956b35c3a6828b30d02c7b7d21382

The Rocket Lake IMC is available for testings in develop branch