Closed ich777 closed 2 years ago
Thanks a lot. I see many small bits to fix, starting from specs of generation 10 and 11. Stay tuned ...
Hello,
For testings develop
is updated for IMC.
EDIT: These enhancements are made for:
Remaining generations, starting from the 6th, are processed as a Skylake; until I get enough issues to debug.
Can you plz test the Comet Lake against latest development branch ? Especially IMC (text output)
Oh sorry, yes of course. Will report back ASAP.
Is this what you wanted:
Intel Z490 [ 685]
Controller #0 Dual Channel
Bus Rate 8000 MT/s Bus Speed 8028 MT/s DRAM Speed 2667 MHz
Cha CL RCD RP RAS RRD RFC WR RTPr WTPr FAW B2B CWL CMD REFI
#0 16 18 18 35 24 734 21 10 40 28 0 15 2T 10400
#1 16 18 18 35 24 734 21 10 40 28 0 15 2T 10400
sgRR dgRR drRR ddRR sgRW dgRW drRW ddRW sgWR dgWR drWR ddWR
#0 7 4 6 7 10 10 10 11 32 27 7 7
#1 7 4 6 7 10 10 10 11 32 27 7 7
sgWW dgWW drWW ddWW CKE ECC
#0 7 4 7 7 4 0
#1 7 4 7 7 4 0
DIMM Geometry for channel #0
Slot Bank Rank Rows Columns Memory Size (MB)
#0 16 1 65536 1024 16384
#1 16 1 65536 1024 16384
DIMM Geometry for channel #1
Slot Bank Rank Rows Columns Memory Size (MB)
#0 16 1 65536 1024 16384
#1 16 1 65536 1024 16384
Should I also test this on my 6700k?
Is this what you wanted:
Intel Z490 [ 685] Controller #0 Dual Channel Bus Rate 8000 MT/s Bus Speed 8028 MT/s DRAM Speed 2667 MHz Cha CL RCD RP RAS RRD RFC WR RTPr WTPr FAW B2B CWL CMD REFI #0 16 18 18 35 24 734 21 10 40 28 0 15 2T 10400 #1 16 18 18 35 24 734 21 10 40 28 0 15 2T 10400 sgRR dgRR drRR ddRR sgRW dgRW drRW ddRW sgWR dgWR drWR ddWR #0 7 4 6 7 10 10 10 11 32 27 7 7 #1 7 4 6 7 10 10 10 11 32 27 7 7 sgWW dgWW drWW ddWW CKE ECC #0 7 4 7 7 4 0 #1 7 4 7 7 4 0 DIMM Geometry for channel #0 Slot Bank Rank Rows Columns Memory Size (MB) #0 16 1 65536 1024 16384 #1 16 1 65536 1024 16384 DIMM Geometry for channel #1 Slot Bank Rank Rows Columns Memory Size (MB) #0 16 1 65536 1024 16384 #1 16 1 65536 1024 16384
Should I also test this on my 6700k?
Everything looks working great.
rank
may however be wrong b/c equation to DIMM size is not true.
Yes for 6700K as I don't have anymore access to Skylake family for non-regression tests.
Yes for 6700K as I don't have anymore access to Skylake family for non-regression tests.
Will create a dedicated issue for that with all pictures included. :)
Before I forgot to say this was from my i5-10600, @soonic6 will also post a picture and output from IMC here in this issue for his 10400 that this thread is for.
hello,
like @ich777 said, here a the screenshots:
root@Unraid-1:/tmp/corefreq# corefreq-cli -M
Intel H470 [ 684]
Controller #0 Dual Channel
Bus Rate 8000 MT/s Bus Speed 8011 MT/s DRAM Speed 2667 MHz
Cha CL RCD RP RAS RRD RFC WR RTPr WTPr FAW B2B CWL CMD REFI
#0 19 19 19 43 7 467 20 10 42 28 0 18 2T 10400
#1 19 19 19 43 7 467 20 10 42 28 0 18 2T 10400
sgRR dgRR drRR ddRR sgRW dgRW drRW ddRW sgWR dgWR drWR ddWR
#0 7 4 6 7 9 9 10 11 33 28 6 6
#1 7 4 6 7 9 9 10 11 33 28 6 6
sgWW dgWW drWW ddWW CKE ECC
#0 7 4 7 7 4 0
#1 7 4 7 7 4 0
DIMM Geometry for channel #0
Slot Bank Rank Rows Columns Memory Size (MB)
#0 16 1 65536 1024 16384
#1
DIMM Geometry for channel #1
Slot Bank Rank Rows Columns Memory Size (MB)
#0 16 1 65536 1024 16384
#1
@soonic6 Thank you. Intel H470 and IMC of this CML i5 10400 have been detected.
lspci.txt motherboard.txt lscpu.txt
dmidecode -t memory
: