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cyring / CoreFreq

CoreFreq : CPU monitoring and tuning software designed for 64-bit processors.
https://www.cyring.fr
GNU General Public License v2.0
1.97k stars 126 forks source link

Not starting when called via script #286

Closed ppascher closed 2 years ago

ppascher commented 2 years ago

Hello,

I have a bash script which opens corefreq-cli among other programs and tiles a sway workspace. swaymsg 'exec "foot corefreq-cli"' A couple of days ago the terminal calling corefreq-cli briefly flashes and then closes itself instead of staying opened. coredump:

Core was generated by `/home/username/source/CoreFreq/corefreq-cli'.
Program terminated with signal SIGFPE, Arithmetic exception.

#0  0x0000562ee8387950 in AggregateRatio () at corefreq-cli.c:121
121     const unsigned int MaxRatio = MAXCLOCK_TO_RATIO(
(gdb) bt full
#0  0x0000562ee8387950 in AggregateRatio () at corefreq-cli.c:121
        CFlop = 0x7f11168bc990
        MaxRatio = 0
        lt = RATIO_MIN
        rt = RATIO_MIN
        cpu = 0
        lowest = 0
        highest = 0
#1  0x0000562ee83f84d9 in main (argc=1, argv=0x7ffe80b78398) at corefreq-cli.c:17789
        shmStat = {st_dev = 26, st_ino = 11974, st_nlink = 1, st_mode = 33206, st_uid = 0, st_gid = 0, __pad0 = 0, st_rdev = 0, 
          st_size = 233472, st_blksize = 4096, st_blocks = 456, st_atim = {tv_sec = 1633556173, tv_nsec = 867272919}, st_mtim = {
            tv_sec = 1633556173, tv_nsec = 867272919}, st_ctim = {tv_sec = 1633556173, tv_nsec = 867272919}, __glibc_reserved = {
            0, 0, 0}}
        fd = 3
        idx = 0
        program = 0x562ee9c0f2a0 "/home/username/source/CoreFreq/corefreq-cli"
        appName = 0x562ee9c0f2be "corefreq-cli"
        option = 116 't'
        trailing = 0 '\000'
        reason = {no = 0, ln = 0, rc = RC_SUCCESS}

Manually calling corefreq-cli in an already open terminal window works fine.

cyring commented 2 years ago

The change brought by commit 6d6a85f2afd1bbd2998cbc57db53267a88af7f2b relies on the mandatory Makefile variable MAX_FREQ_HZ: https://github.com/cyring/CoreFreq/blob/5127cc858078fbac640a443bfa9d4dabd552c5e0/Makefile#L13

This fix is an UI only workaround for uninitialized and/or garbage hardware ratios like the Skylake/X from which a frequency ratio of 255 is retrieved: https://gist.github.com/chenkaigithub/0f5943d51bf101a559b53f2c65ca8417#file-gistfile1-txt-L45

You have to explain me what sway is supposed to do and how it differs from a Terminal or Console ?

Edit: and please post the output of corefreq-cli -s when run in your bash script.

ppascher commented 2 years ago

I noticed the issue also when directly executing: sudo modprobe corefreqk && sudo systemctl start corefreqd && corefreq-cli which used to work fine. My script executes the same commands but with a delay of 0.2 seconds. I should have included the whole command, sorry about that.

While this used to work fine for the last couple of months it seems a (larger) delay is now needed between starting corefreqd and corefreq-cli. I found a delay of 1.5 seconds is not enough while 2 seconds works. My case in the above post probably only worked because corefreqd was already running.

The result of corefreq-cli -s without adding a delay was Floating point exception (core dumped)

If this has nothing to do with a recent change please feel free to close. Thank you.

cyring commented 2 years ago

I noticed the issue also when directly executing: sudo modprobe corefreqk && sudo systemctl start corefreqd && corefreq-cli which used to work fine. My script executes the same commands but with a delay of 0.2 seconds. I should have included the whole command, sorry about that.

While this used to work fine for the last couple of months it seems a (larger) delay is now needed between starting corefreqd and corefreq-cli. I found a delay of 1.5 seconds is not enough while 2 seconds works. My case in the above post probably only worked because corefreqd was already running.

The result of corefreq-cli -s without adding a delay was Floating point exception (core dumped)

If this has nothing to do with a recent change please feel free to close. Thank you.

Using your working case, can you however post the cli output because I need to know your processor settings and determine which loops are involved in driver and daemon. And check for any regression.

I usually start all processes by hand, in their own terminal, so there is a natural delay to prepare but it takes less than half second between them.

2 seconds you have to wait is indeed not nominal. I have to investigate the call flow your processor is following.

EDIT: my regular way is:

# as root
insmod corefreqk.ko
./corefreqd -d
# as User
./corefreq-cli
ppascher commented 2 years ago

Thank you for looking into this. At first I thought something was broken that is why I opened this issue. It is no problem to add a delay to my script though (it starts corefreq and some other monitoring scripts on my second screen and tiles+resizes the sway windows just the way I want it so I do not have to do it manually each time).

sudo corefreqd -d
CoreFreq Daemon 1.87.4  Copyright (C) 2015-2021 CYRIL INGENIERIE

  Processor [AMD Ryzen 9 5950X 16-Core Processor]
  Architecture [Zen3/Vermeer] 32/32 CPU Online.
  SleepInterval(1000), SysGate(2000), 2326 tasks

    CPU #000 @ 3401.38 MHz
    CPU #001 @ 3400.88 MHz
    CPU #002 @ 3401.40 MHz
    Thread [7f38fe1d6640] Init CYCLE 000
    CPU #003 @ 3401.33 MHz
    Thread [7f38fd9d5640] Init CYCLE 001
    Thread [7f38fd1d4640] Init CYCLE 002
    Thread [7f38fc9d3640] Init CYCLE 003
    CPU #004 @ 3401.31 MHz
    CPU #005 @ 3401.30 MHz
    CPU #006 @ 3401.27 MHz
    CPU #007 @ 3401.23 MHz
    CPU #008 @ 3400.80 MHz
    CPU #009 @ 3400.11 MHz
    CPU #010 @ 3400.29 MHz
    CPU #011 @ 3400.16 MHz
    CPU #012 @ 3400.16 MHz
    CPU #013 @ 3400.14 MHz
    CPU #014 @ 3400.15 MHz
    CPU #015 @ 3400.16 MHz
    CPU #016 @ 3400.12 MHz
    CPU #017 @ 3400.16 MHz
    CPU #018 @ 3400.17 MHz
    CPU #019 @ 3400.15 MHz
    CPU #020 @ 3400.13 MHz
    Thread [7f38fb1d0640] Init CHILD 006
    Thread [7f38f81ca640] Init CHILD 012
    Thread [7f38f89cb640] Init CHILD 011
    Thread [7f38f99cd640] Init CHILD 009
    CPU #021 @ 3400.13 MHz
    Thread [7f38fa9cf640] Init CHILD 007
    Thread [7f38f59c5640] Init CHILD 017
    Thread [7f38fa1ce640] Init CHILD 008
    Thread [7f38f51c4640] Init CHILD 018
    Thread [7f38f91cc640] Init CHILD 010
    Thread [7f38f79c9640] Init CHILD 013
    Thread [7f38e77fe640] Init CYCLE 012
    Thread [7f38e37f6640] Init CYCLE 020
    Thread [7f38e7fff640] Init CYCLE 011
    Thread [7f38f01ba640] Init CHILD 028
    Thread [7f38edffb640] Init CYCLE 008
    Thread [7f38f41c2640] Init CHILD 020
    Thread [7f38f19bd640] Init CHILD 025
    Thread [7f38f09bb640] Init CHILD 027
    Thread [7f38e6ffd640] Init CYCLE 013
    Thread [7f38f71c8640] Init CHILD 014
    Thread [7f38e2ff5640] Init CYCLE 021
    Thread [7f38fe1d6640] Init CHILD 000
    Thread [7f38f61c6640] Init CHILD 016
    Thread [7f38ef7fe640] Init CYCLE 005
    Thread [7f38fc1d2640] Init CHILD 004
    Thread [7f38f49c3640] Init CHILD 019
    Thread [7f38e4ff9640] Init CYCLE 017
    Thread [7f38ef1b8640] Init CHILD 030
    Thread [7f38e5ffb640] Init CYCLE 015
    Thread [7f38fd1d4640] Init CHILD 002
    Thread [7f38e3ff7640] Init CYCLE 019
    Thread [7f38e57fa640] Init CYCLE 016
    Thread [7f38f11bc640] Init CHILD 026
    Thread [7f38e47f8640] Init CYCLE 018
    CPU #022 @ 3400.12 MHz
    Thread [7f38ecff9640] Init CYCLE 010
    Thread [7f38e67fc640] Init CYCLE 014
    Thread [7f38ed7fa640] Init CYCLE 009
    Thread [7f38f31c0640] Init CHILD 022
    Thread [7f38e27f4640] Init CYCLE 022
    Thread [7f38ee9b7640] Init CHILD 031
    Thread [7f38ee7fc640] Init CYCLE 007
    Thread [7f38f69c7640] Init CHILD 015
    CPU #023 @ 3400.12 MHz
    Thread [7f38f39c1640] Init CHILD 021
    Thread [7f38eeffd640] Init CYCLE 006
    Thread [7f38effff640] Init CYCLE 004
    Thread [7f38f29bf640] Init CHILD 023
    CPU #024 @ 3400.11 MHz
    Thread [7f38f21be640] Init CHILD 024
    Thread [7f38e1ff3640] Init CYCLE 023
    Thread [7f38fc9d3640] Init CHILD 003
    CPU #025 @ 3400.13 MHz
    Thread [7f38fd9d5640] Init CHILD 001
    Thread [7f38e17f2640] Init CYCLE 024
    Thread [7f38fb9d1640] Init CHILD 005
    Thread [7f38e0ff1640] Init CYCLE 025
    CPU #026 @ 3400.14 MHz
    Thread [7f38ef9b9640] Init CHILD 029
    CPU #027 @ 3400.27 MHz
    CPU #028 @ 3400.00 MHz
    Thread [7f38c77fe640] Init CYCLE 027
    Thread [7f38c6ffd640] Init CYCLE 028
    CPU #029 @ 3400.13 MHz
    CPU #030 @ 3400.15 MHz
    Thread [7f38c67fc640] Init CYCLE 029
    CPU #031 @ 3400.14 MHz
    Thread [7f38c5ffb640] Init CYCLE 030
    Thread [7f38c57fa640] Init CYCLE 031
    NTFY || ....
    Thread [7f38c7fff640] Init CYCLE 026

The order is not completely fixed. Here is another run:

CoreFreq Daemon 1.87.4  Copyright (C) 2015-2021 CYRIL INGENIERIE

  Processor [AMD Ryzen 9 5950X 16-Core Processor]
  Architecture [Zen3/Vermeer] 32/32 CPU Online.
  SleepInterval(1000), SysGate(2000), 2326 tasks

    CPU #000 @ 3401.36 MHz
    CPU #001 @ 3400.53 MHz
    Thread [7f334f461640] Init CYCLE 000
    CPU #002 @ 3401.34 MHz
    CPU #003 @ 3400.48 MHz
    Thread [7f334ec60640] Init CYCLE 001
    Thread [7f334f461640] Init CHILD 000
    Thread [7f334ec60640] Init CHILD 001
    CPU #004 @ 3400.53 MHz
    CPU #005 @ 3400.46 MHz
    CPU #006 @ 3400.50 MHz
    CPU #007 @ 3400.55 MHz
    CPU #008 @ 3400.52 MHz
    CPU #009 @ 3400.15 MHz
    CPU #010 @ 3400.17 MHz
    CPU #011 @ 3400.02 MHz
    CPU #012 @ 3400.17 MHz
    CPU #013 @ 3400.28 MHz
    CPU #014 @ 3400.17 MHz
    CPU #015 @ 3400.14 MHz
    CPU #016 @ 3400.00 MHz
    CPU #017 @ 3400.14 MHz
    CPU #018 @ 3400.01 MHz
    CPU #019 @ 3400.02 MHz
    CPU #020 @ 3400.01 MHz
    CPU #021 @ 3400.14 MHz
    CPU #022 @ 3400.01 MHz
    CPU #023 @ 3400.01 MHz
    CPU #024 @ 3400.03 MHz
    Thread [7f33477fe640] Init CHILD 008
    CPU #025 @ 3400.19 MHz
    Thread [7f333f7fe640] Init CHILD 014
    Thread [7f333ffff640] Init CHILD 013
    Thread [7f3346ffd640] Init CHILD 009
    Thread [7f334545d640] Init CHILD 011
    CPU #026 @ 3400.29 MHz
    Thread [7f3344c5c640] Init CHILD 012
    Thread [7f3347fff640] Init CYCLE 002
    Thread [7f333e7fc640] Init CHILD 016
    Thread [7f333b7f6640] Init CHILD 022
    Thread [7f333dffb640] Init CHILD 017
    CPU #027 @ 3400.17 MHz
    Thread [7f333d7fa640] Init CHILD 018
    Thread [7f333bff7640] Init CHILD 021
    CPU #028 @ 3400.03 MHz
    Thread [7f333aff5640] Init CHILD 023
    CPU #029 @ 3400.14 MHz
    Thread [7f33387f0640] Init CHILD 028
    Thread [7f33397f2640] Init CHILD 026
    CPU #030 @ 3400.14 MHz
    Thread [7f3336fed640] Init CHILD 031
    Thread [7f334645f640] Init CHILD 002
    Thread [7f3338ff1640] Init CHILD 027
    Thread [7f33377ee640] Init CHILD 030
    Thread [7f334cc5c640] Init CYCLE 006
    CPU #031 @ 3400.14 MHz
    Thread [7f3339ff3640] Init CYCLE 026
    Thread [7f334d45d640] Init CHILD 005
    Thread [7f3347fff640] Init CHILD 007
    Thread [7f334e45f640] Init CHILD 003
    Thread [7f33397f2640] Init CYCLE 027
    Thread [7f334dc5e640] Init CHILD 004
    Thread [7f3338ff1640] Init CYCLE 028
    NTFY || ....
    Thread [7f33337fe640] Init CYCLE 029
    Thread [7f333cff9640] Init CHILD 019
    Thread [7f3332ffd640] Init CYCLE 030
    Thread [7f3345ffb640] Init CYCLE 010
    Thread [7f3346ffd640] Init CYCLE 008
    Thread [7f332a7fc640] Init CYCLE 031
    Thread [7f33467fc640] Init CYCLE 009
    Thread [7f33457fa640] Init CYCLE 011
    Thread [7f333c7f8640] Init CHILD 020
    Thread [7f333f7fe640] Init CYCLE 014
    Thread [7f333ffff640] Init CYCLE 013
    Thread [7f3344ff9640] Init CYCLE 012
    Thread [7f333dffb640] Init CYCLE 017
    Thread [7f3337fef640] Init CHILD 029
    Thread [7f333e7fc640] Init CYCLE 016
    Thread [7f333d7fa640] Init CYCLE 018
    Thread [7f333bff7640] Init CYCLE 021
    Thread [7f3345c5e640] Init CHILD 010
    Thread [7f333c7f8640] Init CYCLE 020
    Thread [7f333b7f6640] Init CYCLE 022
    Thread [7f333aff5640] Init CYCLE 023
    Thread [7f33477fe640] Init CYCLE 007
    Thread [7f334cc5c640] Init CHILD 006
    Thread [7f334d45d640] Init CYCLE 005
    Thread [7f334dc5e640] Init CYCLE 004
    Thread [7f334e45f640] Init CYCLE 003
    Thread [7f3333fff640] Init CYCLE 025
    Thread [7f3339ff3640] Init CHILD 025
    Thread [7f333effd640] Init CYCLE 015
    Thread [7f333effd640] Init CHILD 015
    Thread [7f333a7f4640] Init CHILD 024
    Thread [7f333cff9640] Init CYCLE 019
    Thread [7f333a7f4640] Init CYCLE 024

corefreq-cli starts up normally after that.

corefreq-cli -s output:

corefreq-cli -s
Processor                                  [AMD Ryzen 9 5950X 16-Core Processor]
|- Architecture                                                   [Zen3/Vermeer]
|- Vendor ID                                                      [AuthenticAMD]
|- Firmware                                                         [ 56.53.0-2]
|- Microcode                                                        [0x0a201016]
|- Signature                                                           [  AF_21]
|- Stepping                                                            [      0]
|- Online CPU                                                          [ 32/ 32]
|- Base Clock                                                          [100.000]
|- Frequency            (MHz)                      Ratio                        
                 Min   2199.99                    <  22 >                       
                 Max   3399.99                    <  34 >                       
|- Factory                                                             [100.000]
                       3400                       [  34 ]                       
|- Performance                                                                  
   |- P-State                                                                   
                 TGT   3399.99                    <  34 >                       
|- Turbo Boost                                                         [ UNLOCK]
                 XFR   5099.98                    [  51 ]                       
                 CPB   4999.98                    [  50 ]                       
                  1C   2799.99                    <  28 >                       
                  2C   2199.99                    <  22 >                       
|- Uncore                                                              [   LOCK]
                 Min   1899.99                    [  19 ]                       
                 Max   1899.99                    [  19 ]                       
|- TDP                                                           Level [  0:0  ]
   |- Programmable                                                     [ UNLOCK]

Instruction Set Extensions                                                      
|- 3DNow!/Ext [N/N]          ADX [Y]          AES [Y]  AVX/AVX2 [Y/Y] 
|- AVX512-F     [N]    AVX512-DQ [N]  AVX512-IFMA [N]   AVX512-PF [N] 
|- AVX512-ER    [N]    AVX512-CD [N]    AVX512-BW [N]   AVX512-VL [N] 
|- AVX512-VBMI  [N] AVX512-VBMI2 [N]  AVX512-VNMI [N]  AVX512-ALG [N] 
|- AVX512-VPOP  [N] AVX512-VNNIW [N] AVX512-FMAPS [N] AVX512-VP2I [N] 
|- AVX512-BF16  [N]  BMI1/BMI2 [Y/Y]         CLWB [Y] CLFLUSH/O [Y/Y] 
|- CLAC-STAC    [Y]         CMOV [Y]    CMPXCHG8B [Y]  CMPXCHG16B [Y] 
|- F16C         [Y]          FPU [Y]         FXSR [Y]   LAHF-SAHF [Y] 
|- MMX/Ext    [Y/Y] MON/MWAITX [Y/Y]        MOVBE [Y]   PCLMULQDQ [Y] 
|- POPCNT       [Y]       RDRAND [Y]       RDSEED [Y]      RDTSCP [Y] 
|- SEP          [Y]          SHA [Y]          SSE [Y]        SSE2 [Y] 
|- SSE3         [Y]        SSSE3 [Y]  SSE4.1/4A [Y/Y]      SSE4.2 [Y] 
|- SERIALIZE    [N]      SYSCALL [Y]        RDPID [N]        UMIP [N] 

Features                                                                        
|- 1 GB Pages Support                                      1GB-PAGES   [Capable]
|- 100 MHz multiplier Control                            100MHzSteps   [Missing]
|- Advanced Configuration & Power Interface                     ACPI   [Capable]
|- Advanced Programmable Interrupt Controller                   APIC   [Capable]
|- Core Multi-Processing                                  CMP Legacy   [Capable]
|- L1 Data Cache Context ID                                  CNXT-ID   [Missing]
|- Collaborative Processor Performance Control                  CPPC   [Missing]
|- Direct Cache Access                                           DCA   [Missing]
|- Debugging Extension                                            DE   [Capable]
|- Debug Store & Precise Event Based Sampling               DS, PEBS   [Missing]
|- CPL Qualified Debug Store                                  DS-CPL   [Missing]
|- 64-Bit Debug Store                                         DTES64   [Missing]
|- Fast-String Operation                                Fast-Strings   [Capable]
|- Fused Multiply Add                                     FMA | FMA4   [Capable]
|- Hardware Lock Elision                                         HLE   [Missing]
|- Instruction Based Sampling                                    IBS   [Capable]
|- Instruction INVLPGB                                       INVLPGB   [Missing]
|- Long Mode 64 bits                                       IA64 | LM   [Capable]
|- LightWeight Profiling                                         LWP   [Missing]
|- Memory Bandwidth Enforcement                                  MBE   [Capable]
|- Machine-Check Architecture                                    MCA   [Capable]
|- Instruction MCOMMIT                                       MCOMMIT   [Missing]
|- Memory Protection Extensions                                  MPX   [Missing]
|- Model Specific Registers                                      MSR   [Capable]
|- Memory Type Range Registers                                  MTRR   [Capable]
|- No-Execute Page Protection                                     NX   [Capable]
|- OS-Enabled Ext. State Management                          OSXSAVE   [Capable]
|- Physical Address Extension                                    PAE   [Capable]
|- Page Attribute Table                                          PAT   [Capable]
|- Pending Break Enable                                          PBE   [Missing]
|- Process Context Identifiers                                  PCID   [Missing]
|- Perfmon and Debug Capability                                 PDCM   [Missing]
|- Page Global Enable                                            PGE   [Capable]
|- Page Size Extension                                           PSE   [Capable]
|- 36-bit Page Size Extension                                  PSE36   [Capable]
|- Processor Serial Number                                       PSN   [Missing]
|- Resource Director Technology/PQE                            RDT-A   [Capable]
|- Resource Director Technology/PQM                            RDT-M   [Capable]
|- Read Processor Register at User level                       RDPRU   [Capable]
|- Restricted Transactional Memory                               RTM   [Missing]
|- Safer Mode Extensions                                         SMX   [Missing]
|- Self-Snoop                                                     SS   [Missing]
|- Supervisor-Mode Access Prevention                            SMAP   [Capable]
|- Supervisor-Mode Execution Prevention                         SMEP   [Capable]
|- Time Stamp Counter                                            TSC [Invariant]
|- Time Stamp Counter Deadline                          TSC-DEADLINE   [Missing]
|- TSX Force Abort MSR Register                            TSX-ABORT   [Missing]
|- TSX Suspend Load Address Tracking                       TSX-LDTRK   [Missing]
|- User-Mode Instruction Prevention                             UMIP   [Missing]
|- Virtual Mode Extension                                        VME   [Capable]
|- Virtual Machine Extensions                                    VMX   [Missing]
|- Extended xAPIC Support                                     x2APIC   [  xAPIC]
|- XSAVE/XSTOR States                                          XSAVE   [Capable]
|- xTPR Update Control                                          xTPR   [Missing]
Mitigation mechanisms                                                           
|- Indirect Branch Restricted Speculation                       IBRS   [Capable]
|- Indirect Branch Prediction Barrier                           IBPB   [Capable]
|- Single Thread Indirect Branch Predictor                     STIBP   [Capable]
|- Speculative Store Bypass Disable                             SSBD   [Capable]
|- Architectural - Predictive Store Forwarding                  PSFD   [Capable]

Technologies                                                                    
|- Data Cache Unit                                                              
   |- L1 Prefetcher                                                L1 HW   < ON>
   |- L2 Prefetcher                                                L2 HW   < ON>
|- System Management Mode                                       SMM-Lock   [ ON]
|- Simultaneous Multithreading                                       SMT   [ ON]
|- PowerNow!                                                         CnQ   [OFF]
|- Core C-States                                                     CCx   [ ON]
|- Core Performance Boost                                            CPB   < ON>
|- Watchdog Timer                                                    WDT   < ON>
|- Virtualization                                                    SVM   [OFF]
   |- I/O MMU                                                      AMD-V   [ ON]
   |- Version                                                     [         0.1]
   |- Hypervisor                                                           [OFF]
   |- Vendor ID                                                   [         N/A]

Performance Monitoring                                                          
|- Version                                                        PM       [N/A]
|- Counters:          General                   Fixed                           
|                     6 x 64 bits             3 x 64 bits                       
|- Enhanced Halt State                                           C1E       <OFF>
|- C2 UnDemotion                                                 C2U       <OFF>
|- C3 UnDemotion                                                 C3U       < ON>
|- Core C6 State                                                 CC6       < ON>
|- Package C6 State                                              PC6       < ON>
|- Legacy Frequency ID control                                   FID       [OFF]
|- Legacy Voltage ID control                                     VID       [OFF]
|- P-State Hardware Coordination Feedback                MPERF/APERF       [ ON]
|- Hardware-Controlled Performance States                        HWP       [ ON]
|- Core C-States                                                                
   |- C-States Base Address                                      BAR   [ 0x413 ]
|- MONITOR/MWAIT                                                                
   |- State index:    #0    #1    #2    #3    #4    #5    #6    #7              
   |- Sub C-State:     1     1     0     0     0     0     0     0              
|- Core Cycles                                                         [Capable]
|- Instructions Retired                                                [Capable]
|- Reference Cycles                                                    [Capable]
|- Last Level Cache References                                         [Capable]
|- Performance Time Stamp Counter                                      [Missing]
|- Data Fabric Performance Counter                                     [Capable]
|- Core Performance Counter                                            [Capable]

Power, Current & Thermal                                                        
|- Junction Temperature                                        TjMax   [49: 90C]
|- Digital Thermal Sensor                                        DTS   [Capable]
|- Power Limit Notification                                      PLN   [Missing]
|- Package Thermal Management                                    PTM   [Missing]
|- Thermal Monitor 1                                             TTP   [Capable]
|- Thermal Monitor 2                                             HTC   [Capable]
|- Thermal Design Power                                          TDP   [  105 W]
   |- Minimum Power                                              Min   [  105 W]
   |- Maximum Power                                              Max   [  105 W]
|- Thermal Design Power                                      Package   < Enable>
   |- Power Limit (0 sec)                                        PL1   <  270 W>
   |- Power Limit (0 sec)                                        PL2   < 1300 W>
|- Thermal Design Power                                         Core   <Disable>
   |- Power Limit                                                PL1   [Missing]
|- Thermal Design Power                                       Uncore   <Disable>
   |- Power Limit                                                PL1   [Missing]
|- Thermal Design Power                                         DRAM   <Disable>
   |- Power Limit                                                PL1   [Missing]
|- Thermal Design Power                                     Platform   <Disable>
   |- Power Limit                                                PL1   [Missing]
   |- Power Limit                                                PL2   [Missing]
|- Package Power Tracking                                        PPT   [  142 W]
|- Electrical Design Current                                     EDC   [  140 A]
|- Thermal Design Current                                        TDC   <   95 A>
|- Units                                                                        
   |- Power                                               watt   [  0.125000000]
   |- Energy                                             joule   [  0.000015259]
   |- Window                                            second   [  0.000976562]
cyring commented 2 years ago

What I can reproduce:

ppascher commented 2 years ago

Not sure if you want me to keep this issue open to check why a delay is needed now. I would be fine with closing this issue.

cyring commented 2 years ago

Not sure if you want me to keep this issue open to check why a delay is needed now. I would be fine with closing this issue.

Yes, feel free to close issue. I'll will work later on this as I think I have to put a memory fence around my assembly lib.

Warmed thanks for your tests

cyring commented 2 years ago

Not sure if you want me to keep this issue open to check why a delay is needed now. I would be fine with closing this issue.

Yes, feel free to close issue. I'll will work later on this as I think I have to put a memory fence around my assembly lib.

Warmed thanks for your tests

cyring commented 2 years ago

Hello, I'm fixing the startup issues. Can you try develop branch ? No sleep is now required.