cyring / CoreFreq

CoreFreq : CPU monitoring and tuning software designed for 64-bit processors.

https://www.cyring.fr

GNU General Public License v2.0

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trap divide error ? #287

Closed jowa2021 closed 2 years ago

jowa2021 commented 2 years ago

Hello,

I was wondering if you had any advice on the following snip from dmesg when loading this phenomenal tool?

Also, if you would happen to know why my pci dev's are listed as skylake ??

Thank you for your time

cyring commented 2 years ago

Hello,

Can you switch to the develop branch where that division by zero should be fixed.
About your PCI list, I can't barely see your screenshot.
Can you post the output in Markdown, including the full command line you are running for.
Edit:
Because those processors share the same CPUID signature of hexa 06_55. Thus some OSes may not make the difference with Skylake Xeon. In CoreFreq I'm adding tables which based on the brand string will refine the architecture codename. That's how I'm able to tag your processor as Cascade Lake/X

cyring commented 2 years ago

289 for your testings

cyring commented 2 years ago

New version is awaiting for your answer. Do you still have the issue ?

cyring commented 2 years ago

Do you still have your issue ?

cyring commented 2 years ago

Closing the issue b/c no answer.

Will try to find a way to reach such Xeon family ...