Closed cyring closed 2 years ago
But with Matisse, UMC BAR of 0x50000
is found within the first 20th bits of MSR 0xc0002075
aka MCA::L3::MCA_IPID_L3
rdmsr -ax 0xc0002075
700b020350000
700b020b50000
0
0
...
0
Especially at the first Core (aka CPU #0
).
EDIT From model PPR, it is found as (MCA::LS::MCA_IPID_LS)
Can anyone read these MSR registers on Cezanne ?
rdmsr -ax 0xc0002075
rdmsr -ax 0xc0002005
@PJVol Hello
Can you please give a try to the develop
branch with your Ryzen 5700G and post the output of the Memory Controller if any (corefreq-cli -M
)
Using that 1.91.5
CoreFreq version, you have to start the driver in Experimental mode to claim an UMC collect.
insmod corefreqk.ko Experimental=1
Thanks for your help
Cezanne UMC solved in #356
Cezanne APU of CPUID signature
AF_50
:CoreFreq is failing to probe the UMC memory controller through the SMU
Kernel is logging the following.
Previous models of Zen1, Zen2, and Zen3/Vermeer have all the UMC queried via SMU BAR
0x00050000
https://github.com/cyring/CoreFreq/blob/6e88e7e1226941046a8efadf8674b473bc598137/amdmsr.h#L1283UMC decoding happens in function
AMD_17h_DataFabric()
https://github.com/cyring/CoreFreq/blob/6e88e7e1226941046a8efadf8674b473bc598137/corefreqk.c#L5735So far I have not found the Cezanne UMC BAR within the Processor Programming Reference (PPR) for AMD Family 19h Model 51h, Revision A1 Processors (PUB)
Your help is welcomed.