cyring
commented
1 year ago - Using
master 1.92.4
Closed cyring closed 8 months ago
cyring
commented
1 year ago master 1.92.4
cyring
commented
1 year ago $ lspci -nn
00:00.0 Host bridge [0600]: Advanced Micro Devices, Inc. [AMD] Device [1022:14d8]
00:00.2 IOMMU [0806]: Advanced Micro Devices, Inc. [AMD] Device [1022:14d9]
00:01.0 Host bridge [0600]: Advanced Micro Devices, Inc. [AMD] Device [1022:14da]
00:01.1 PCI bridge [0604]: Advanced Micro Devices, Inc. [AMD] Device [1022:14db]
00:02.0 Host bridge [0600]: Advanced Micro Devices, Inc. [AMD] Device [1022:14da]
00:02.1 PCI bridge [0604]: Advanced Micro Devices, Inc. [AMD] Device [1022:14db]
00:02.2 PCI bridge [0604]: Advanced Micro Devices, Inc. [AMD] Device [1022:14db]
00:03.0 Host bridge [0600]: Advanced Micro Devices, Inc. [AMD] Device [1022:14da]
00:04.0 Host bridge [0600]: Advanced Micro Devices, Inc. [AMD] Device [1022:14da]
00:08.0 Host bridge [0600]: Advanced Micro Devices, Inc. [AMD] Device [1022:14da]
00:08.1 PCI bridge [0604]: Advanced Micro Devices, Inc. [AMD] Device [1022:14dd]
00:08.3 PCI bridge [0604]: Advanced Micro Devices, Inc. [AMD] Device [1022:14dd]
00:14.0 SMBus [0c05]: Advanced Micro Devices, Inc. [AMD] FCH SMBus Controller [1022:790b] (rev 71)
00:14.3 ISA bridge [0601]: Advanced Micro Devices, Inc. [AMD] FCH LPC Bridge [1022:790e] (rev 51)
00:18.0 Host bridge [0600]: Advanced Micro Devices, Inc. [AMD] Device [1022:14e0]
00:18.1 Host bridge [0600]: Advanced Micro Devices, Inc. [AMD] Device [1022:14e1]
00:18.2 Host bridge [0600]: Advanced Micro Devices, Inc. [AMD] Device [1022:14e2]
00:18.3 Host bridge [0600]: Advanced Micro Devices, Inc. [AMD] Device [1022:14e3]
00:18.4 Host bridge [0600]: Advanced Micro Devices, Inc. [AMD] Device [1022:14e4]
00:18.5 Host bridge [0600]: Advanced Micro Devices, Inc. [AMD] Device [1022:14e5]
00:18.6 Host bridge [0600]: Advanced Micro Devices, Inc. [AMD] Device [1022:14e6]
00:18.7 Host bridge [0600]: Advanced Micro Devices, Inc. [AMD] Device [1022:14e7]
01:00.0 PCI bridge [0604]: Advanced Micro Devices, Inc. [AMD/ATI] Navi 10 XL Upstream Port of PCI Express Switch [1002:1478] (rev c1)
02:00.0 PCI bridge [0604]: Advanced Micro Devices, Inc. [AMD/ATI] Navi 10 XL Downstream Port of PCI Express Switch [1002:1479]
03:00.0 VGA compatible controller [0300]: Advanced Micro Devices, Inc. [AMD/ATI] Navi 21 [Radeon RX 6800/6800 XT / 6900 XT] [1002:73bf] (rev c1)
03:00.1 Audio device [0403]: Advanced Micro Devices, Inc. [AMD/ATI] Navi 21/23 HDMI/DP Audio Controller [1002:ab28]
03:00.2 USB controller [0c03]: Advanced Micro Devices, Inc. [AMD/ATI] Device [1002:73a6]
03:00.3 Serial bus controller [0c80]: Advanced Micro Devices, Inc. [AMD/ATI] Navi 21 USB [1002:73a4]
04:00.0 PCI bridge [0604]: Advanced Micro Devices, Inc. [AMD] Device [1022:43f4] (rev 01)
05:00.0 PCI bridge [0604]: Advanced Micro Devices, Inc. [AMD] Device [1022:43f5] (rev 01)
05:04.0 PCI bridge [0604]: Advanced Micro Devices, Inc. [AMD] Device [1022:43f5] (rev 01)
05:05.0 PCI bridge [0604]: Advanced Micro Devices, Inc. [AMD] Device [1022:43f5] (rev 01)
05:06.0 PCI bridge [0604]: Advanced Micro Devices, Inc. [AMD] Device [1022:43f5] (rev 01)
05:07.0 PCI bridge [0604]: Advanced Micro Devices, Inc. [AMD] Device [1022:43f5] (rev 01)
05:08.0 PCI bridge [0604]: Advanced Micro Devices, Inc. [AMD] Device [1022:43f5] (rev 01)
05:09.0 PCI bridge [0604]: Advanced Micro Devices, Inc. [AMD] Device [1022:43f5] (rev 01)
05:0a.0 PCI bridge [0604]: Advanced Micro Devices, Inc. [AMD] Device [1022:43f5] (rev 01)
05:0b.0 PCI bridge [0604]: Advanced Micro Devices, Inc. [AMD] Device [1022:43f5] (rev 01)
05:0c.0 PCI bridge [0604]: Advanced Micro Devices, Inc. [AMD] Device [1022:43f5] (rev 01)
05:0d.0 PCI bridge [0604]: Advanced Micro Devices, Inc. [AMD] Device [1022:43f5] (rev 01)
06:00.0 Non-Volatile memory controller [0108]: Sandisk Corp WD PC SN810 / Black SN850 NVMe SSD [15b7:5011] (rev 01)
0b:00.0 SATA controller [0106]: ASMedia Technology Inc. ASM1062 Serial ATA Controller [1b21:0612] (rev 02)
0d:00.0 Ethernet controller [0200]: Realtek Semiconductor Co., Ltd. RTL8125 2.5GbE Controller [10ec:8125] (rev 05)
0e:00.0 Network controller [0280]: MEDIATEK Corp. MT7922 802.11ax PCI Express Wireless Network Adapter [14c3:0616]
0f:00.0 USB controller [0c03]: Advanced Micro Devices, Inc. [AMD] Device [1022:43f7] (rev 01)
10:00.0 SATA controller [0106]: Advanced Micro Devices, Inc. [AMD] Device [1022:43f6] (rev 01)
11:00.0 Non-Volatile memory controller [0108]: Samsung Electronics Co Ltd NVMe SSD Controller SM961/PM961/SM963 [144d:a804]
12:00.0 Non-Essential Instrumentation [1300]: Advanced Micro Devices, Inc. [AMD] Device [1022:14de] (rev c1)
12:00.2 Encryption controller [1080]: Advanced Micro Devices, Inc. [AMD] VanGogh PSP/CCP [1022:1649]
12:00.3 USB controller [0c03]: Advanced Micro Devices, Inc. [AMD] Device [1022:15b6]
12:00.4 USB controller [0c03]: Advanced Micro Devices, Inc. [AMD] Device [1022:15b7]
12:00.6 Audio device [0403]: Advanced Micro Devices, Inc. [AMD] Family 17h/19h HD Audio Controller [1022:15e3]
13:00.0 USB controller [0c03]: Advanced Micro Devices, Inc. [AMD] Device [1022:15b8]# rdmsr -ax 0xC0010299
a1000
...
a1000$ corefreq-cli -s -n -m -n -V 1 -n -W 1 -n -c 1 -n -i 1 -n -B -n -k -n -MProcessor [AMD Ryzen 9 7950X 16-Core Processor]
|- Architecture [Zen4/Raphael]
|- Vendor ID [AuthenticAMD]
|- Microcode [0x0a601203]
|- Signature [ AF_61]
|- Stepping [ 2]
|- Online CPU [ 32/ 32]
|- Base Clock [ 99.998]
|- Frequency (MHz) Ratio
Min 2999.95 < 30 >
Max 4499.93 < 45 >
|- Factory [100.000]
4500 [ 45 ]
|- Performance
|- P-State
TGT 2999.95 < 30 >
|- Turbo Boost [ UNLOCK]
XFR 5799.91 [ 58 ]
CPB 5699.91 [ 57 ]
1C 2999.95 < 30 >
|- Uncore [ LOCK]
CLK 899.99 [ 9 ]
MEM 2799.96 [ 28 ]
Instruction Set Extensions
|- 3DNow!/Ext [N/N] ADX [Y] AES [Y] AVX/AVX2 [Y/Y]
|- AVX512-F [Y] AVX512-DQ [Y] AVX512-IFMA [Y] AVX512-PF [N]
|- AVX512-ER [N] AVX512-CD [Y] AVX512-BW [Y] AVX512-VL [Y]
|- AVX512-VBMI [Y] AVX512-VBMI2 [Y] AVX512-VNNI [Y] AVX512-ALG [Y]
|- AVX512-VPOP [Y] AVX512-VNNIW [N] AVX512-FMAPS [N] AVX512-VP2I [N]
|- AVX512-BF16 [Y] AVX-VNNI-VEX [N] AVX-FP128 [N] AVX-FP256 [Y]
|- BMI1/BMI2 [Y/Y] CLWB [Y] CLFLUSH [Y] CLFLUSH-OPT [Y]
|- CLAC-STAC [Y] CMOV [Y] CMPXCHG8B [Y] CMPXCHG16B [Y]
|- F16C [Y] FPU [Y] FXSR [Y] LAHF-SAHF [Y]
|- MMX/Ext [Y/Y] MON/MWAITX [Y/Y] MOVBE [Y] PCLMULQDQ [Y]
|- POPCNT [Y] RDRAND [Y] RDSEED [Y] RDTSCP [Y]
|- SEP [Y] SHA [Y] SSE [Y] SSE2 [Y]
|- SSE3 [Y] SSSE3 [Y] SSE4.1/4A [Y/Y] SSE4.2 [Y]
|- SERIALIZE [N] SYSCALL [Y] RDPID [Y] UMIP [Y]
|- VAES [Y] VPCLMULQDQ [Y] PREFETCH/W [Y] LZCNT [Y]
Features
|- 1 GB Pages Support 1GB-PAGES [Capable]
|- 100 MHz multiplier Control 100MHzSteps [Missing]
|- Advanced Configuration & Power Interface ACPI [Capable]
|- Advanced Programmable Interrupt Controller APIC [Capable]
|- Advanced Virtual Interrupt Controller AVIC [Capable]
|- APIC Timer Invariance ARAT [Capable]
|- Clear Zero Instruction CLZERO [Capable]
|- Core Multi-Processing CMP Legacy [Capable]
|- L1 Data Cache Context ID CNXT-ID [Missing]
|- Collaborative Processor Performance Control CPPC [Capable]
|- Direct Cache Access DCA [Missing]
|- Debugging Extension DE [Capable]
|- Debug Store & Precise Event Based Sampling DS, PEBS [Missing]
|- CPL Qualified Debug Store DS-CPL [Missing]
|- 64-Bit Debug Store DTES64 [Missing]
|- Fast Short REP MOVSB FSRM [Capable]
|- Fast-String Operation ERMS [Capable]
|- Fused Multiply Add FMA | FMA4 [Capable]
|- Hardware Lock Elision HLE [Missing]
|- Hardware P-state control HwP [Capable]
|- Instruction Based Sampling IBS [Capable]
|- Instruction INVLPGB INVLPGB [Missing]
|- Instruction INVPCID INVPCID [Capable]
|- Long Mode 64 bits IA64 | LM [Capable]
|- LightWeight Profiling LWP [Missing]
|- Memory Bandwidth Enforcement MBE [Capable]
|- Machine-Check Architecture MCA [Capable]
|- Instruction MCOMMIT MCOMMIT [Missing]
|- Memory Protection Extensions MPX [Missing]
|- Model Specific Registers MSR [Capable]
|- Memory Type Range Registers MTRR [Capable]
|- No-Execute Page Protection NX [Capable]
|- OS-Enabled Ext. State Management OSXSAVE [Capable]
|- Physical Address Extension PAE [Capable]
|- Page Attribute Table PAT [Capable]
|- Pending Break Enable PBE [Missing]
|- Process Context Identifiers PCID [Missing]
|- Perfmon and Debug Capability PDCM [Missing]
|- Page Global Enable PGE [Capable]
|- Page Size Extension PSE [Capable]
|- 36-bit Page Size Extension PSE36 [Capable]
|- Processor Serial Number PSN [Missing]
|- Resource Director Technology/PQE RDT-A [Capable]
|- Resource Director Technology/PQM RDT-M [Capable]
|- Read Processor Register at User level RDPRU [Capable]
|- Restricted Transactional Memory RTM [Missing]
|- Safer Mode Extensions SMX [Missing]
|- Self-Snoop SS [Missing]
|- Supervisor-Mode Access Prevention SMAP [Capable]
|- Supervisor-Mode Execution Prevention SMEP [Capable]
|- Time Stamp Counter TSC [Invariant]
|- Time Stamp Counter Deadline TSC-DEADLINE [Missing]
|- TSX Force Abort MSR Register TSX-ABORT [Missing]
|- TSX Suspend Load Address Tracking TSX-LDTRK [Missing]
|- User-Mode Instruction Prevention UMIP [Capable]
|- Virtual Mode Extension VME [Capable]
|- Virtual Machine Extensions VMX [Missing]
|- Write Back & Do Not Invalidate Cache WBNOINVD [Capable]
|- Extended xAPIC Support x2APIC [ xAPIC]
|- AVIC controller for x2APIC x2AVIC [Capable]
|- XSAVE/XSTOR States XSAVE [Capable]
|- xTPR Update Control xTPR [Missing]
Mitigation mechanisms
|- Indirect Branch Restricted Speculation IBRS [Capable]
|- IBRS Always-On preferred by processor [ Unable]
|- IBRS preferred over software solution [Capable]
|- IBRS provides same speculation limits [Capable]
|- Indirect Branch Prediction Barrier IBPB [Capable]
|- Single Thread Indirect Branch Predictor STIBP [ Enable]
|- Speculative Store Bypass Disable SSBD [Capable]
|- SSBD use VIRT_SPEC_CTRL register [ Unable]
|- SSBD not needed on this processor [ Unable]
|- No Branch Type Confusion BTC_NO [ Unable]
|- BTC on Non-Branch instruction BTC-NOBR [Capable]
|- Arch - No Fast Predictive Store Forwarding PSFD [Capable]
Security Features
|- Secure Init and Jump with Attestation SKINIT [Capable]
|- Secure Encrypted Virtualization SEV [Missing]
|- SEV - Encrypted State SEV-ES [Missing]
|- SEV - Secure Nested Paging SEV-SNP [Missing]
|- Guest Mode Execute Trap GMET [Capable]
|- Supervisor Shadow Stack SSS [Capable]
|- VM Permission Levels VMPL [Missing]
|- VMPL Supervisor Shadow Stack VMPL-SSS [Missing]
|- Secure Multi-Key Memory Encryption SME-MK [Missing]
Technologies
|- Instruction Cache Unit
|- L1 IP Prefetcher L1 HW IP < ON>
|- Data Cache Unit
|- L1 Prefetcher L1 HW < ON>
|- L2 Prefetcher L2 HW < ON>
|- System Management Mode SMM-Lock [ ON]
|- Simultaneous Multithreading SMT [ ON]
|- PowerNow! CnQ [OFF]
|- Core C-States CCx [ ON]
|- Core Performance Boost CPB < ON>
|- Watchdog Timer WDT <OFF>
|- Virtualization SVM [OFF]
|- I/O MMU AMD-V [ ON]
|- Version [ 0.1]
|- Hypervisor [OFF]
|- Vendor ID [ N/A]
Performance Monitoring
|- Version PM [ 2]
|- Counters: General Fixed
| { 6, 6, 16 } x 48 bits 3 x 64 bits
|- Enhanced Halt State C1E <OFF>
|- C2 UnDemotion C2U < ON>
|- C3 UnDemotion C3U < ON>
|- Core C6 State CC6 < ON>
|- Package C6 State PC6 < ON>
|- Legacy Frequency ID control FID [OFF]
|- Legacy Voltage ID control VID [OFF]
|- P-State Hardware Coordination Feedback MPERF/APERF [ ON]
|- Core C-States
|- C-States Base Address BAR [ 0x413 ]
|- MONITOR/MWAIT
|- State index: #0 #1 #2 #3 #4 #5 #6 #7
|- Sub C-State: 1 1 0 0 0 0 0 0
|- Core Cycles [Capable]
|- Instructions Retired [Capable]
|- Reference Cycles [Capable]
|- Last Level Cache References [Capable]
|- Global Time Stamp Counter [Missing]
|- Data Fabric Performance Counter [Capable]
|- Core Performance Counter [Capable]
|- Continuous Performance Control _CPC [OFF]
|- Collaborative Processor Performance Control CPPC <OFF>
|- Capabilities Lowest Efficient Guaranteed Highest
|- CPU #0 0.00 ( 0) 0.00 ( 0) 0.00 ( 0) 0.00 ( 0)
|- CPU #1 0.00 ( 0) 0.00 ( 0) 0.00 ( 0) 0.00 ( 0)
|- CPU #2 0.00 ( 0) 0.00 ( 0) 0.00 ( 0) 0.00 ( 0)
|- CPU #3 0.00 ( 0) 0.00 ( 0) 0.00 ( 0) 0.00 ( 0)
|- CPU #4 0.00 ( 0) 0.00 ( 0) 0.00 ( 0) 0.00 ( 0)
|- CPU #5 0.00 ( 0) 0.00 ( 0) 0.00 ( 0) 0.00 ( 0)
|- CPU #6 0.00 ( 0) 0.00 ( 0) 0.00 ( 0) 0.00 ( 0)
|- CPU #7 0.00 ( 0) 0.00 ( 0) 0.00 ( 0) 0.00 ( 0)
|- CPU #8 0.00 ( 0) 0.00 ( 0) 0.00 ( 0) 0.00 ( 0)
|- CPU #9 0.00 ( 0) 0.00 ( 0) 0.00 ( 0) 0.00 ( 0)
|- CPU #10 0.00 ( 0) 0.00 ( 0) 0.00 ( 0) 0.00 ( 0)
|- CPU #11 0.00 ( 0) 0.00 ( 0) 0.00 ( 0) 0.00 ( 0)
|- CPU #12 0.00 ( 0) 0.00 ( 0) 0.00 ( 0) 0.00 ( 0)
|- CPU #13 0.00 ( 0) 0.00 ( 0) 0.00 ( 0) 0.00 ( 0)
|- CPU #14 0.00 ( 0) 0.00 ( 0) 0.00 ( 0) 0.00 ( 0)
|- CPU #15 0.00 ( 0) 0.00 ( 0) 0.00 ( 0) 0.00 ( 0)
|- CPU #16 0.00 ( 0) 0.00 ( 0) 0.00 ( 0) 0.00 ( 0)
|- CPU #17 0.00 ( 0) 0.00 ( 0) 0.00 ( 0) 0.00 ( 0)
|- CPU #18 0.00 ( 0) 0.00 ( 0) 0.00 ( 0) 0.00 ( 0)
|- CPU #19 0.00 ( 0) 0.00 ( 0) 0.00 ( 0) 0.00 ( 0)
|- CPU #20 0.00 ( 0) 0.00 ( 0) 0.00 ( 0) 0.00 ( 0)
|- CPU #21 0.00 ( 0) 0.00 ( 0) 0.00 ( 0) 0.00 ( 0)
|- CPU #22 0.00 ( 0) 0.00 ( 0) 0.00 ( 0) 0.00 ( 0)
|- CPU #23 0.00 ( 0) 0.00 ( 0) 0.00 ( 0) 0.00 ( 0)
|- CPU #24 0.00 ( 0) 0.00 ( 0) 0.00 ( 0) 0.00 ( 0)
|- CPU #25 0.00 ( 0) 0.00 ( 0) 0.00 ( 0) 0.00 ( 0)
|- CPU #26 0.00 ( 0) 0.00 ( 0) 0.00 ( 0) 0.00 ( 0)
|- CPU #27 0.00 ( 0) 0.00 ( 0) 0.00 ( 0) 0.00 ( 0)
|- CPU #28 0.00 ( 0) 0.00 ( 0) 0.00 ( 0) 0.00 ( 0)
|- CPU #29 0.00 ( 0) 0.00 ( 0) 0.00 ( 0) 0.00 ( 0)
|- CPU #30 0.00 ( 0) 0.00 ( 0) 0.00 ( 0) 0.00 ( 0)
|- CPU #31 0.00 ( 0) 0.00 ( 0) 0.00 ( 0) 0.00 ( 0)
Power, Current & Thermal
|- Temperature Offset:Junction TjMax [ 0: 0 C]
|- CPPC Energy Preference CPPC [Capable]
|- Digital Thermal Sensor DTS [Capable]
|- Power Limit Notification PLN [Missing]
|- Package Thermal Management PTM [Missing]
|- Thermal Monitor 1 TTP [ Enable]
|- Thermal Monitor 2 HTC [ Enable]
|- Thermal Design Power TDP [Missing]
|- Minimum Power Min [Missing]
|- Maximum Power Max [Missing]
|- Thermal Design Power Package [Disable]
|- Power Limit PL1 [ 0 W]
|- Time Window TW1 [ 0 ns]
|- Power Limit PL2 [ 0 W]
|- Time Window TW2 [ 0 ns]
|- Thermal Design Power Core [Disable]
|- Power Limit PL1 [ 0 W]
|- Time Window TW1 [ 0 ns]
|- Thermal Design Power Uncore [Disable]
|- Power Limit PL1 [ 0 W]
|- Time Window TW1 [ 0 ns]
|- Thermal Design Power DRAM [Disable]
|- Power Limit PL1 [ 0 W]
|- Time Window TW1 [ 0 ns]
|- Thermal Design Power Platform [Disable]
|- Power Limit PL1 [ 0 W]
|- Time Window TW1 [ 0 ns]
|- Power Limit PL2 [ 0 W]
|- Time Window TW2 [ 0 ns]
|- Package Power Tracking PPT [Missing]
|- Electrical Design Current EDC [Missing]
|- Thermal Design Current TDC [Missing]
|- Core Thermal Point
|- Package Thermal Point
|- Thermal Monitor Trip Limit [ 115 C]
|- HTC Temperature Limit Limit [ 127 C]
|- HTC Temperature Hysteresis Threshold [ 2 C]
|- Units
|- Power watt [ Missing]
|- Energy joule [ 0.000015259]
|- Window second [ 0.000976562]
CPU Pkg Apic Core/Thread Caches (w)rite-Back (i)nclusive
# ID ID CCD CCX ID/ID L1-Inst Way L1-Data Way L2 Way L3 Way
000:BSP 0 0 0 0 0 32 8 32 8 1024 8 i 65536 16w
001: 0 2 0 0 1 0 32 8 32 8 1024 8 i 65536 16w
002: 0 4 0 0 2 0 32 8 32 8 1024 8 i 65536 16w
003: 0 6 0 0 3 0 32 8 32 8 1024 8 i 65536 16w
004: 0 8 0 1 4 0 32 8 32 8 1024 8 i 65536 16w
005: 0 10 0 1 5 0 32 8 32 8 1024 8 i 65536 16w
006: 0 12 0 1 6 0 32 8 32 8 1024 8 i 65536 16w
007: 0 14 0 1 7 0 32 8 32 8 1024 8 i 65536 16w
008: 0 16 1 2 8 0 32 8 32 8 1024 8 i 65536 16w
009: 0 18 1 2 9 0 32 8 32 8 1024 8 i 65536 16w
010: 0 20 1 2 10 0 32 8 32 8 1024 8 i 65536 16w
011: 0 22 1 2 11 0 32 8 32 8 1024 8 i 65536 16w
012: 0 24 1 3 12 0 32 8 32 8 1024 8 i 65536 16w
013: 0 26 1 3 13 0 32 8 32 8 1024 8 i 65536 16w
014: 0 28 1 3 14 0 32 8 32 8 1024 8 i 65536 16w
015: 0 30 1 3 15 0 32 8 32 8 1024 8 i 65536 16w
016: 0 1 0 0 0 1 32 8 32 8 1024 8 i 65536 16w
017: 0 3 0 0 1 1 32 8 32 8 1024 8 i 65536 16w
018: 0 5 0 0 2 1 32 8 32 8 1024 8 i 65536 16w
019: 0 7 0 0 3 1 32 8 32 8 1024 8 i 65536 16w
020: 0 9 0 1 4 1 32 8 32 8 1024 8 i 65536 16w
021: 0 11 0 1 5 1 32 8 32 8 1024 8 i 65536 16w
022: 0 13 0 1 6 1 32 8 32 8 1024 8 i 65536 16w
023: 0 15 0 1 7 1 32 8 32 8 1024 8 i 65536 16w
024: 0 17 1 2 8 1 32 8 32 8 1024 8 i 65536 16w
025: 0 19 1 2 9 1 32 8 32 8 1024 8 i 65536 16w
026: 0 21 1 2 10 1 32 8 32 8 1024 8 i 65536 16w
027: 0 23 1 2 11 1 32 8 32 8 1024 8 i 65536 16w
028: 0 25 1 3 12 1 32 8 32 8 1024 8 i 65536 16w
029: 0 27 1 3 13 1 32 8 32 8 1024 8 i 65536 16w
030: 0 29 1 3 14 1 32 8 32 8 1024 8 i 65536 16w
031: 0 31 1 3 15 1 32 8 32 8 1024 8 i 65536 16w
CPU Freq(MHz) VID Min Vcore Max
000 13.13 87 0.8375 1.0063 1.0063
001 97.92 88 0.8375 1.0000 1.0000
002 96.38 88 0.8375 1.0000 1.0000
003 31.14 104 0.8375 0.9000 1.0063
004 53.12 87 0.8375 1.0063 1.0063
005 13.44 88 0.8375 1.0000 1.0000
006 82.41 87 0.8375 1.0063 1.0063
007 11.41 88 0.8375 1.0000 1.0000
008 11.45 96 0.8375 0.9500 0.9500
009 15.97 96 0.8375 0.9500 0.9500
010 0.86 97 0.8375 0.9437 0.9437
011 2.31 95 0.8375 0.9563 0.9563
012 1.55 96 0.8375 0.9500 0.9500
013 9.55 96 0.8375 0.9500 0.9500
014 2.66 96 0.8375 0.9500 0.9500
015 0.97 95 0.8375 0.9563 0.9563
016 10.21 87 0.8375 1.0063 1.0063
017 13.43 88 0.8375 1.0000 1.0000
018 8.60 88 0.8375 1.0000 1.0000
019 94.96 104 0.8375 0.9000 1.0063
020 58.43 87 0.8375 1.0063 1.0063
021 64.34 88 0.8375 1.0000 1.0000
022 44.05 87 0.8375 1.0063 1.0063
023 11.98 88 0.8375 1.0000 1.0000
024 2.87 96 0.8375 0.9500 0.9500
025 1.25 96 0.8375 0.9500 0.9500
026 18.19 97 0.8375 0.9437 0.9437
027 6.98 95 0.8375 0.9563 0.9563
028 3.15 96 0.8375 0.9500 0.9500
029 1.26 96 0.8375 0.9500 0.9500
030 5.36 96 0.8375 0.9500 0.9688
031 5.64 95 0.8375 0.9563 0.9688
CPU Freq(MHz) Accumulator Min Energy(J) Max Min Power(W) Max
000 30.16 000000000000013326 0.04 0.20 0.51 0.04 0.20 0.51
001 58.51 000000000000013188 0.02 0.20 0.38 0.02 0.20 0.38
002 57.28 000000000000010012 0.03 0.15 0.34 0.03 0.15 0.34
003 66.21 000000000000014928 0.03 0.23 0.35 0.03 0.23 0.35
004 63.33 000000000000014828 0.03 0.23 0.39 0.03 0.23 0.39
005 5.23 000000000000017052 0.03 0.26 0.34 0.03 0.26 0.34
006 3.61 000000000000015548 0.05 0.24 0.45 0.05 0.24 0.45
007 58.90 000000000000012854 0.06 0.20 0.31 0.06 0.20 0.31
008 6.64 000000000000003779 0.01 0.06 0.27 0.01 0.06 0.27
009 18.25 000000000000004101 0.02 0.06 0.13 0.02 0.06 0.13
010 1.71 000000000000001902 0.01 0.03 0.14 0.01 0.03 0.14
011 1.99 000000000000002361 0.01 0.04 0.25 0.01 0.04 0.25
012 1.93 000000000000001587 0.01 0.02 0.09 0.01 0.02 0.09
013 2.90 000000000000001461 0.01 0.02 0.15 0.01 0.02 0.15
014 1.50 000000000000000841 0.00 0.01 0.11 0.00 0.01 0.11
015 10.06 000000000000002906 0.01 0.04 0.11 0.01 0.04 0.11
016 28.71 000000000000000000 0.00 0.00 0.00 0.00 0.00 0.00
017 28.98 000000000000000000 0.00 0.00 0.00 0.00 0.00 0.00
018 42.89 000000000000000000 0.00 0.00 0.00 0.00 0.00 0.00
019 78.62 000000000000000000 0.00 0.00 0.00 0.00 0.00 0.00
020 50.60 000000000000000000 0.00 0.00 0.00 0.00 0.00 0.00
021 229.31 000000000000000000 0.00 0.00 0.00 0.00 0.00 0.00
022 92.13 000000000000000000 0.00 0.00 0.00 0.00 0.00 0.00
023 57.28 000000000000000000 0.00 0.00 0.00 0.00 0.00 0.00
024 4.48 000000000000000000 0.00 0.00 0.00 0.00 0.00 0.00
025 1.00 000000000000000000 0.00 0.00 0.00 0.00 0.00 0.00
026 2.89 000000000000000000 0.00 0.00 0.00 0.00 0.00 0.00
027 4.70 000000000000000000 0.00 0.00 0.00 0.00 0.00 0.00
028 2.80 000000000000000000 0.00 0.00 0.00 0.00 0.00 0.00
029 0.44 000000000000000000 0.00 0.00 0.00 0.00 0.00 0.00
030 3.69 000000000000000000 0.00 0.00 0.00 0.00 0.00 0.00
031 4.81 000000000000000000 0.00 0.00 0.00 0.00 0.00 0.00
Energy(J) Package[0] Cores Uncore Memory
34.81 36.65 39.21 0.74 1.99 3.53 0.00 0.00 0.00 0.00 0.00 0.00
Power(W)
34.81 36.65 39.21 0.74 1.99 3.53 0.00 0.00 0.00 0.00 0.00 0.00
CPU Freq(MHz) Ratio Turbo C0(%) C1(%) C3(%) C6(%) C7(%) Min TMP:TS Max
000 173.05 ( 1.73) 3.85 4.42 95.58 0.00 0.00 0.00 0 / 0:0 / 0
001 105.71 ( 1.06) 2.35 2.46 97.54 0.00 0.00 0.00 0 / 0:0 / 0
002 57.62 ( 0.58) 1.28 1.50 98.50 0.00 0.00 0.00 0 / 0:0 / 0
003 69.95 ( 0.70) 1.55 1.91 98.09 0.00 0.00 0.00 0 / 0:0 / 0
004 15.82 ( 0.16) 0.35 0.54 99.46 0.00 0.00 0.00 0 / 0:0 / 0
005 85.18 ( 0.85) 1.89 1.92 98.08 0.00 0.00 0.00 0 / 0:0 / 0
006 28.25 ( 0.28) 0.63 0.70 99.30 0.00 0.00 0.00 0 / 0:0 / 0
007 69.44 ( 0.69) 1.54 1.72 98.28 0.00 0.00 0.00 0 / 0:0 / 0
008 27.65 ( 0.28) 0.61 0.81 99.19 0.00 0.00 0.00 0 / 0:0 / 0
009 17.55 ( 0.18) 0.39 0.60 99.40 0.00 0.00 0.00 0 / 0:0 / 0
010 2.34 ( 0.02) 0.05 0.08 99.92 0.00 0.00 0.00 0 / 0:0 / 0
011 4.33 ( 0.04) 0.10 0.15 99.85 0.00 0.00 0.00 0 / 0:0 / 0
012 61.18 ( 0.61) 1.36 1.18 98.82 0.00 0.00 0.00 0 / 0:0 / 0
013 3.71 ( 0.04) 0.08 0.13 99.87 0.00 0.00 0.00 0 / 0:0 / 0
014 72.58 ( 0.73) 1.61 1.53 98.47 0.00 0.00 0.00 0 / 0:0 / 0
015 9.73 ( 0.10) 0.22 0.32 99.68 0.00 0.00 0.00 0 / 0:0 / 0
016 17.60 ( 0.18) 0.39 0.60 99.40 0.00 0.00 0.00 0 / 0:0 / 0
017 112.77 ( 1.13) 2.51 2.35 97.65 0.00 0.00 0.00 0 / 0:0 / 0
018 23.39 ( 0.23) 0.52 0.79 99.21 0.00 0.00 0.00 0 / 0:0 / 0
019 15.73 ( 0.16) 0.35 0.52 99.48 0.00 0.00 0.00 0 / 0:0 / 0
020 57.37 ( 0.57) 1.27 1.94 98.06 0.00 0.00 0.00 0 / 0:0 / 0
021 43.05 ( 0.43) 0.96 1.26 98.74 0.00 0.00 0.00 0 / 0:0 / 0
022 229.03 ( 2.29) 5.09 7.05 92.95 0.00 0.00 0.00 0 / 0:0 / 0
023 69.40 ( 0.69) 1.54 2.24 97.76 0.00 0.00 0.00 0 / 0:0 / 0
024 5.39 ( 0.05) 0.12 0.18 99.82 0.00 0.00 0.00 0 / 0:0 / 0
025 12.59 ( 0.13) 0.28 0.42 99.58 0.00 0.00 0.00 0 / 0:0 / 0
026 7.88 ( 0.08) 0.18 0.27 99.73 0.00 0.00 0.00 0 / 0:0 / 0
027 3.68 ( 0.04) 0.08 0.13 99.87 0.00 0.00 0.00 0 / 0:0 / 0
028 6.12 ( 0.06) 0.14 0.20 99.80 0.00 0.00 0.00 0 / 0:0 / 0
029 0.95 ( 0.01) 0.02 0.03 99.97 0.00 0.00 0.00 0 / 0:0 / 0
030 3.75 ( 0.04) 0.08 0.13 99.87 0.00 0.00 0.00 0 / 0:0 / 0
031 6.37 ( 0.06) 0.14 0.21 99.79 0.00 0.00 0.00 0 / 0:0 / 0
Averages: Turbo C0(%) C1(%) C3(%) C6(%) C7(%) TjMax: Pkg:
0.99 1.20 98.80 0.00 0.00 0.00 0 C 0 C
CPU IPS IPC CPI
000 0.025084/s 0.643475/c 1.554062/i
001 0.018048/s 0.542125/c 1.844595/i
002 0.016224/s 0.523154/c 1.911483/i
003 0.024907/s 0.622159/c 1.607306/i
004 0.008753/s 0.333212/c 3.001094/i
005 0.003932/s 0.626759/c 1.595509/i
006 0.005692/s 0.678785/c 1.473220/i
007 0.002294/s 0.504436/c 1.982413/i
008 0.000208/s 0.230722/c 4.334223/i
009 0.005769/s 1.072930/c 0.932027/i
010 0.000046/s 0.151272/c 6.610589/i
011 0.000078/s 0.158671/c 6.302363/i
012 0.000082/s 0.151932/c 6.581878/i
013 0.000074/s 0.143778/c 6.955146/i
014 0.000073/s 0.141404/c 7.071919/i
015 0.000402/s 0.211346/c 4.731570/i
016 0.001683/s 0.437047/c 2.288086/i
017 0.002933/s 0.703867/c 1.420724/i
018 0.000063/s 0.186133/c 5.372494/i
019 0.002832/s 0.400949/c 2.494082/i
020 0.001975/s 0.224822/c 4.447955/i
021 0.002012/s 0.205581/c 4.864268/i
022 0.000736/s 0.123750/c 8.080785/i
023 0.018437/s 0.898369/c 1.113128/i
024 0.000270/s 0.220510/c 4.534947/i
025 0.000408/s 0.324812/c 3.078707/i
026 0.000136/s 0.212756/c 4.700230/i
027 0.000377/s 0.260364/c 3.840772/i
028 0.000122/s 0.162415/c 6.157073/i
029 0.000042/s 0.161605/c 6.187937/i
030 0.005526/s 0.870089/c 1.149308/i
031 0.001448/s 0.600544/c 1.665157/i
[ 0] American Megatrends International, LLC.
[ 1] 1.11
[ 2] 10/11/2022
[ 3] Micro-Star International Co., Ltd.
[ 4] MS-7E10
[ 5] 1.0
[ 6] T---e---l--- ---O---M-
[ 7] To be filled by O.E.M.
[ 8] To be filled by O.E.M.
[ 9] Micro-Star International Co., Ltd.
[10] MPG B650 EDGE WIFI (MS-7E10)
[11] 1.0
[12] 0---0---M---0---0-
[13] Number Of Devices:4\Maximum Capacity:134217728 bytes
[14]
[15] DIMM 1\P0 CHANNEL A
[16]
[17] DIMM 1\P0 CHANNEL B
[18]
[19] Unknown
[20]
[21] Unknown
[22]
[23] F5-6000J3238F16G
[24]
[25] F5-6000J3238F16G
Linux:
|- Release [6.0.10-gentoo]
|- Version [#4 SMP PREEMPT_DYNAMIC Mon Nov 28 19:29:53 CET 2022]
|- Machine [x86_64]
Memory:
|- Total RAM 32604388 KB
|- Shared RAM 195288 KB
|- Free RAM 27639044 KB
|- Buffer RAM 256248 KB
|- Total High 0 KB
|- Free High 0 KB
Clock Source < tsc>
CPU-Freq driver [ acpi-cpufreq]
Governor [ ondemand]
CPU-Idle driver [ acpi_idle]
|- Idle Limit [ C3]
|- State POLL C1 C2 C3
|- CPUIDLE ACPI FF ACPI IO ACPI IO
|- Power -1 0 0 0
|- Latency 0 1 18 350
|- Residency 0 2 36 700
Zen UMC [14E0]
Controller #0 Dual Channel
Bus Rate 933 MHz Bus Speed 933 MHz DDR5 Speed 1399 MT/s
Cha CL RCDr RCDw RP RAS RC RRDs RRDl FAW WTRs WTRl WR clRR clWW
#0 32 38 38 38 32 48 4 4 20 4 16 48 4 6
#1 32 38 38 38 32 48 4 4 20 4 16 48 4 6
CWL RTP RdWr WrRd scWW sdWW ddWW scRR sdRR ddRR drRR drWW drWR drRRD
#0 30 12 16 2 1 11 7 1 7 8 0 0 0 0
#1 30 12 16 2 1 11 7 1 7 8 0 0 0 0
REFI RFC1 RFC2 RFC4 RCPB RPPB BGS:Alt Ban Page CKE CMD GDM ECC
#0 12076 312 0 3 0 0 ON OFF R0W0 0 0 2T ON 0
#1 12076 312 0 3 0 0 ON OFF R0W0 0 0 2T ON 0
MRD:PDA MOD:PDA WRMPR STAG PDM RDDATA WRD WRL RDL XS XP CPDED
#0 44 32 44 32 24 7 0:F:0 20 6 18 36 945 24 0
#1 44 32 44 32 24 7 0:F:0 20 6 18 36 945 24 0
DIMM Geometry for channel #0
Slot Bank Rank Rows Columns Memory Size (MB)
#0
#1 16 1 32768 1024 4096 F5-6000J3238F16G
DIMM Geometry for channel #1
Slot Bank Rank Rows Columns Memory Size (MB)
#0
#1 16 1 32768 1024 4096 F5-6000J3238F16GNeed a 7000 owner to test this version:
Buid,run, and post the output of corefreq-cli -s -n -C 1 -n -M
cyring
commented
1 year ago Getting the MEMCLK may be decoded from other encoding since Zen4
https://github.com/cyring/CoreFreq/blob/aa3d63efd3de6e02cda1112aad406182e22bc805/amd_reg.h#L1571
For example, Zen2 case
zencli smu 0x50200[0x00050200] READ(smu) = 0x00001937 (6455)
60 56 52 48 44 40 36 32 28 24 20 16 12 08 04 00
0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0001 1001 0011 0111Using zencli need someone to read SMU at address 0x50200 with Zen4, like Ryzen 7000
cyring
commented
1 year ago Idle
Load
Vcore = 0.00625 \times VIDTestings should provide the following results:
| Case | VID | Vcore (V) |
|---|---|---|
| Idle | 99 |
0.6187 |
| Load | 210 |
1.3125 |
EDIT: Incoming tests
Idle
Load
Jon0
commented
1 year ago 7950x :
# zencli smu 0x50200
[0x00050200] READ(smu) = 0x80050bb8 (2147814328)
60 56 52 48 44 40 36 32 28 24 20 16 12 08 04 00
0000 0000 0000 0000 0000 0000 0000 0000 1000 0000 0000 0101 0000 1011 1011 1000Processor [AMD Ryzen 9 7950X 16-Core Processor]
|- Architecture [Zen4/Raphael]
|- Vendor ID [AuthenticAMD]
|- Microcode [0x0a601203]
|- Signature [ AF_61]
|- Stepping [ 2]
|- Online CPU [ 32/ 32]
|- Base Clock [ 99.999]
|- Frequency (MHz) Ratio
Min 2999.99 < 30 >
Max 4499.98 < 45 >
|- Factory [100.000]
4500 [ 45 ]
|- Performance
|- P-State
TGT 4499.98 < 45 >
|- Turbo Boost [ UNLOCK]
XFR 5799.97 [ 58 ]
CPB 5699.97 [ 57 ]
1C 2999.99 < 30 >
|- Uncore [ LOCK]
CLK 1799.99 [ 18 ]
MEM 5599.98 [ 56 ]
Instruction Set Extensions
|- 3DNow!/Ext [N/N] ADX [Y] AES [Y] AVX/AVX2 [Y/Y]
|- AVX512-F [Y] AVX512-DQ [Y] AVX512-IFMA [Y] AVX512-PF [N]
|- AVX512-ER [N] AVX512-CD [Y] AVX512-BW [Y] AVX512-VL [Y]
|- AVX512-VBMI [Y] AVX512-VBMI2 [Y] AVX512-VNNI [Y] AVX512-ALG [Y]
|- AVX512-VPOP [Y] AVX512-VNNIW [N] AVX512-FMAPS [N] AVX512-VP2I [N]
|- AVX512-BF16 [Y] AVX-VNNI-VEX [N] AVX-FP128 [N] AVX-FP256 [Y]
|- BMI1/BMI2 [Y/Y] CLWB [Y] CLFLUSH [Y] CLFLUSH-OPT [Y]
|- CLAC-STAC [Y] CMOV [Y] CMPXCHG8B [Y] CMPXCHG16B [Y]
|- F16C [Y] FPU [Y] FXSR [Y] LAHF-SAHF [Y]
|- MMX/Ext [Y/Y] MON/MWAITX [Y/Y] MOVBE [Y] PCLMULQDQ [Y]
|- POPCNT [Y] RDRAND [Y] RDSEED [Y] RDTSCP [Y]
|- SEP [Y] SHA [Y] SSE [Y] SSE2 [Y]
|- SSE3 [Y] SSSE3 [Y] SSE4.1/4A [Y/Y] SSE4.2 [Y]
|- SERIALIZE [N] SYSCALL [Y] RDPID [Y] UMIP [Y]
|- VAES [Y] VPCLMULQDQ [Y] PREFETCH/W [Y] LZCNT [Y]
Features
|- 1 GB Pages Support 1GB-PAGES [Capable]
|- 100 MHz multiplier Control 100MHzSteps [Missing]
|- Advanced Configuration & Power Interface ACPI [Capable]
|- Advanced Programmable Interrupt Controller APIC [Capable]
|- Advanced Virtual Interrupt Controller AVIC [Capable]
|- APIC Timer Invariance ARAT [Capable]
|- Clear Zero Instruction CLZERO [Capable]
|- Core Multi-Processing CMP Legacy [Capable]
|- L1 Data Cache Context ID CNXT-ID [Missing]
|- Collaborative Processor Performance Control CPPC [Capable]
|- Direct Cache Access DCA [Missing]
|- Debugging Extension DE [Capable]
|- Debug Store & Precise Event Based Sampling DS, PEBS [Missing]
|- CPL Qualified Debug Store DS-CPL [Missing]
|- 64-Bit Debug Store DTES64 [Missing]
|- Fast Short REP MOVSB FSRM [Capable]
|- Fast-String Operation ERMS [Capable]
|- Fused Multiply Add FMA | FMA4 [Capable]
|- Hardware Lock Elision HLE [Missing]
|- Hardware P-state control HwP [Capable]
|- Instruction Based Sampling IBS [Capable]
|- Instruction INVLPGB INVLPGB [Missing]
|- Instruction INVPCID INVPCID [Capable]
|- Long Mode 64 bits IA64 | LM [Capable]
|- LightWeight Profiling LWP [Missing]
|- Memory Bandwidth Enforcement MBE [Capable]
|- Machine-Check Architecture MCA [Capable]
|- Instruction MCOMMIT MCOMMIT [Missing]
|- Memory Protection Extensions MPX [Missing]
|- Model Specific Registers MSR [Capable]
|- Memory Type Range Registers MTRR [Capable]
|- No-Execute Page Protection NX [Capable]
|- OS-Enabled Ext. State Management OSXSAVE [Capable]
|- Physical Address Extension PAE [Capable]
|- Page Attribute Table PAT [Capable]
|- Pending Break Enable PBE [Missing]
|- Process Context Identifiers PCID [Missing]
|- Perfmon and Debug Capability PDCM [Missing]
|- Page Global Enable PGE [Capable]
|- Page Size Extension PSE [Capable]
|- 36-bit Page Size Extension PSE36 [Capable]
|- Processor Serial Number PSN [Missing]
|- Resource Director Technology/PQE RDT-A [Capable]
|- Resource Director Technology/PQM RDT-M [Capable]
|- Read Processor Register at User level RDPRU [Capable]
|- Restricted Transactional Memory RTM [Missing]
|- Safer Mode Extensions SMX [Missing]
|- Self-Snoop SS [Missing]
|- Supervisor-Mode Access Prevention SMAP [Capable]
|- Supervisor-Mode Execution Prevention SMEP [Capable]
|- Time Stamp Counter TSC [Invariant]
|- Time Stamp Counter Deadline TSC-DEADLINE [Missing]
|- TSX Force Abort MSR Register TSX-ABORT [Missing]
|- TSX Suspend Load Address Tracking TSX-LDTRK [Missing]
|- User-Mode Instruction Prevention UMIP [Capable]
|- Virtual Mode Extension VME [Capable]
|- Virtual Machine Extensions VMX [Missing]
|- Write Back & Do Not Invalidate Cache WBNOINVD [Capable]
|- Extended xAPIC Support x2APIC [ xAPIC]
|- AVIC controller for x2APIC x2AVIC [Capable]
|- XSAVE/XSTOR States XSAVE [Capable]
|- xTPR Update Control xTPR [Missing]
Mitigation mechanisms
|- Indirect Branch Restricted Speculation IBRS [Capable]
|- IBRS Always-On preferred by processor [ Unable]
|- IBRS preferred over software solution [Capable]
|- IBRS provides same speculation limits [Capable]
|- Indirect Branch Prediction Barrier IBPB [Capable]
|- Single Thread Indirect Branch Predictor STIBP [ Enable]
|- Speculative Store Bypass Disable SSBD [Capable]
|- SSBD use VIRT_SPEC_CTRL register [ Unable]
|- SSBD not needed on this processor [ Unable]
|- No Branch Type Confusion BTC_NO [ Unable]
|- BTC on Non-Branch instruction BTC-NOBR [Capable]
|- Arch - No Fast Predictive Store Forwarding PSFD [Capable]
Security Features
|- Secure Init and Jump with Attestation SKINIT [Capable]
|- Secure Encrypted Virtualization SEV [Missing]
|- SEV - Encrypted State SEV-ES [Missing]
|- SEV - Secure Nested Paging SEV-SNP [Missing]
|- Guest Mode Execute Trap GMET [Capable]
|- Supervisor Shadow Stack SSS [Capable]
|- VM Permission Levels VMPL [Missing]
|- VMPL Supervisor Shadow Stack VMPL-SSS [Missing]
|- Secure Multi-Key Memory Encryption SME-MK [Missing]
Technologies
|- Instruction Cache Unit
|- L1 IP Prefetcher L1 HW IP < ON>
|- Data Cache Unit
|- L1 Prefetcher L1 HW < ON>
|- L2 Prefetcher L2 HW < ON>
|- System Management Mode SMM-Lock [ ON]
|- Simultaneous Multithreading SMT [ ON]
|- PowerNow! CnQ [OFF]
|- Core C-States CCx [ ON]
|- Core Performance Boost CPB < ON>
|- Watchdog Timer WDT <OFF>
|- Virtualization SVM [ ON]
|- I/O MMU AMD-V [ ON]
|- Version [ 0.1]
|- Hypervisor [OFF]
|- Vendor ID [ N/A]
Performance Monitoring
|- Version PM [ 2]
|- Counters: General Fixed
| { 6, 6, 16 } x 48 bits 3 x 64 bits
|- Enhanced Halt State C1E <OFF>
|- C2 UnDemotion C2U < ON>
|- C3 UnDemotion C3U < ON>
|- Core C6 State CC6 < ON>
|- Package C6 State PC6 < ON>
|- Legacy Frequency ID control FID [OFF]
|- Legacy Voltage ID control VID [OFF]
|- P-State Hardware Coordination Feedback MPERF/APERF [ ON]
|- Core C-States
|- C-States Base Address BAR [ 0x413 ]
|- MONITOR/MWAIT
|- State index: #0 #1 #2 #3 #4 #5 #6 #7
|- Sub C-State: 1 1 0 0 0 0 0 0
|- Core Cycles [Capable]
|- Instructions Retired [Capable]
|- Reference Cycles [Capable]
|- Last Level Cache References [Capable]
|- Global Time Stamp Counter [Missing]
|- Data Fabric Performance Counter [Capable]
|- Core Performance Counter [Capable]
|- Continuous Performance Control _CPC [OFF]
|- Collaborative Processor Performance Control CPPC <OFF>
|- Capabilities Lowest Efficient Guaranteed Highest
|- CPU #0 0.00 ( 0) 0.00 ( 0) 0.00 ( 0) 0.00 ( 0)
|- CPU #1 0.00 ( 0) 0.00 ( 0) 0.00 ( 0) 0.00 ( 0)
|- CPU #2 0.00 ( 0) 0.00 ( 0) 0.00 ( 0) 0.00 ( 0)
|- CPU #3 0.00 ( 0) 0.00 ( 0) 0.00 ( 0) 0.00 ( 0)
|- CPU #4 0.00 ( 0) 0.00 ( 0) 0.00 ( 0) 0.00 ( 0)
|- CPU #5 0.00 ( 0) 0.00 ( 0) 0.00 ( 0) 0.00 ( 0)
|- CPU #6 0.00 ( 0) 0.00 ( 0) 0.00 ( 0) 0.00 ( 0)
|- CPU #7 0.00 ( 0) 0.00 ( 0) 0.00 ( 0) 0.00 ( 0)
|- CPU #8 0.00 ( 0) 0.00 ( 0) 0.00 ( 0) 0.00 ( 0)
|- CPU #9 0.00 ( 0) 0.00 ( 0) 0.00 ( 0) 0.00 ( 0)
|- CPU #10 0.00 ( 0) 0.00 ( 0) 0.00 ( 0) 0.00 ( 0)
|- CPU #11 0.00 ( 0) 0.00 ( 0) 0.00 ( 0) 0.00 ( 0)
|- CPU #12 0.00 ( 0) 0.00 ( 0) 0.00 ( 0) 0.00 ( 0)
|- CPU #13 0.00 ( 0) 0.00 ( 0) 0.00 ( 0) 0.00 ( 0)
|- CPU #14 0.00 ( 0) 0.00 ( 0) 0.00 ( 0) 0.00 ( 0)
|- CPU #15 0.00 ( 0) 0.00 ( 0) 0.00 ( 0) 0.00 ( 0)
|- CPU #16 0.00 ( 0) 0.00 ( 0) 0.00 ( 0) 0.00 ( 0)
|- CPU #17 0.00 ( 0) 0.00 ( 0) 0.00 ( 0) 0.00 ( 0)
|- CPU #18 0.00 ( 0) 0.00 ( 0) 0.00 ( 0) 0.00 ( 0)
|- CPU #19 0.00 ( 0) 0.00 ( 0) 0.00 ( 0) 0.00 ( 0)
|- CPU #20 0.00 ( 0) 0.00 ( 0) 0.00 ( 0) 0.00 ( 0)
|- CPU #21 0.00 ( 0) 0.00 ( 0) 0.00 ( 0) 0.00 ( 0)
|- CPU #22 0.00 ( 0) 0.00 ( 0) 0.00 ( 0) 0.00 ( 0)
|- CPU #23 0.00 ( 0) 0.00 ( 0) 0.00 ( 0) 0.00 ( 0)
|- CPU #24 0.00 ( 0) 0.00 ( 0) 0.00 ( 0) 0.00 ( 0)
|- CPU #25 0.00 ( 0) 0.00 ( 0) 0.00 ( 0) 0.00 ( 0)
|- CPU #26 0.00 ( 0) 0.00 ( 0) 0.00 ( 0) 0.00 ( 0)
|- CPU #27 0.00 ( 0) 0.00 ( 0) 0.00 ( 0) 0.00 ( 0)
|- CPU #28 0.00 ( 0) 0.00 ( 0) 0.00 ( 0) 0.00 ( 0)
|- CPU #29 0.00 ( 0) 0.00 ( 0) 0.00 ( 0) 0.00 ( 0)
|- CPU #30 0.00 ( 0) 0.00 ( 0) 0.00 ( 0) 0.00 ( 0)
|- CPU #31 0.00 ( 0) 0.00 ( 0) 0.00 ( 0) 0.00 ( 0)
Power, Current & Thermal
|- Temperature Offset:Junction TjMax [ 49: 0 C]
|- CPPC Energy Preference EPP [Capable]
|- Digital Thermal Sensor DTS [Capable]
|- Power Limit Notification PLN [Missing]
|- Package Thermal Management PTM [Missing]
|- Thermal Monitor 1 TTP [ Enable]
|- Thermal Monitor 2 HTC [ Enable]
|- Thermal Design Power TDP [Missing]
|- Minimum Power Min [Missing]
|- Maximum Power Max [Missing]
|- Thermal Design Power Package [Disable]
|- Power Limit PL1 [ 0 W]
|- Time Window TW1 [ 0 ns]
|- Power Limit PL2 [ 0 W]
|- Time Window TW2 [ 0 ns]
|- Thermal Design Power Core [Disable]
|- Power Limit PL1 [ 0 W]
|- Time Window TW1 [ 0 ns]
|- Thermal Design Power Uncore [Disable]
|- Power Limit PL1 [ 0 W]
|- Time Window TW1 [ 0 ns]
|- Thermal Design Power DRAM [Disable]
|- Power Limit PL1 [ 0 W]
|- Time Window TW1 [ 0 ns]
|- Thermal Design Power Platform [Disable]
|- Power Limit PL1 [ 0 W]
|- Time Window TW1 [ 0 ns]
|- Power Limit PL2 [ 0 W]
|- Time Window TW2 [ 0 ns]
|- Package Power Tracking PPT [Missing]
|- Electrical Design Current EDC [Missing]
|- Thermal Design Current TDC [Missing]
|- Core Thermal Point
|- Package Thermal Point
|- Thermal Monitor Trip Limit [ 115 C]
|- HTC Temperature Limit Limit [ 127 C]
|- HTC Temperature Hysteresis Threshold [ 2 C]
|- Units
|- Power watt [ Missing]
|- Energy joule [ 0.000015259]
|- Window second [ 0.000976562]
CPU Freq(MHz) VID Vcore TMP(C) Accumulator Energy(J) Power(W)
000 11.02 239 1.4938 47 000000000000012119 0.184921265 0.184921265
001 287.13 239 1.4938 47 000000000000110229 1.681961060 1.681961060
002 3.08 239 1.4938 47 000000000000006595 0.100631714 0.100631714
003 40.40 239 1.4938 47 000000000000083132 1.268493652 1.268493652
004 0.78 239 1.4938 47 000000000000004992 0.076171875 0.076171875
005 1.38 239 1.4938 47 000000000000004574 0.069793701 0.069793701
006 1.45 239 1.4938 47 000000000000107116 1.634460449 1.634460449
007 12.99 239 1.4938 47 000000000000006918 0.105560303 0.105560303
008 1.01 239 1.4938 46 000000000000029665 0.452651978 0.452651978
009 17.72 239 1.4938 46 000000000000007425 0.113296509 0.113296509
010 1.52 239 1.4938 46 000000000000003162 0.048248291 0.048248291
011 9.84 239 1.4938 46 000000000000008166 0.124603271 0.124603271
012 4.68 239 1.4938 46 000000000000004691 0.071578979 0.071578979
013 0.85 239 1.4938 46 000000000000003146 0.048004150 0.048004150
014 0.91 239 1.4938 46 000000000000003140 0.047912598 0.047912598
015 1.39 239 1.4938 46 000000000000003064 0.046752930 0.046752930
016 19.80 230 1.4375 47 000000000000000000 0.000000000 0.000000000
017 9.25 230 1.4375 47 000000000000000000 0.000000000 0.000000000
018 6.77 230 1.4375 47 000000000000000000 0.000000000 0.000000000
019 36.05 230 1.4375 47 000000000000000000 0.000000000 0.000000000
020 3.03 230 1.4375 47 000000000000000000 0.000000000 0.000000000
021 0.62 230 1.4375 47 000000000000000000 0.000000000 0.000000000
022 315.69 230 1.4375 47 000000000000000000 0.000000000 0.000000000
023 1.43 230 1.4375 47 000000000000000000 0.000000000 0.000000000
024 178.11 230 1.4375 46 000000000000000000 0.000000000 0.000000000
025 1.20 230 1.4375 46 000000000000000000 0.000000000 0.000000000
026 0.53 230 1.4375 46 000000000000000000 0.000000000 0.000000000
027 11.93 230 1.4375 46 000000000000000000 0.000000000 0.000000000
028 2.72 230 1.4375 46 000000000000000000 0.000000000 0.000000000
029 0.75 230 1.4375 46 000000000000000000 0.000000000 0.000000000
030 0.88 230 1.4375 46 000000000000000000 0.000000000 0.000000000
031 0.85 230 1.4375 46 000000000000000000 0.000000000 0.000000000
Package[0] Cores Uncore Memory Platform
Energy(J): 57.696487427 3.406738281 0.000000000 0.000000000 0.000000000
Power(W) : 57.696487427 3.406738281 0.000000000 0.000000000 0.000000000
Zen UMC [14E0]
Controller #0 Dual Channel
Bus Rate 1866 MHz Bus Speed 1867 MHz DDR5 Speed 2800 MT/s
Cha CL RCDr RCDw RP RAS RC RRDs RRDl FAW WTRs WTRl WR clRR clWW
#0 40 40 40 40 77 146 8 15 32 8 30 90 8 23
#1 40 40 40 40 77 146 8 15 32 8 30 90 8 23
CWL RTP RdWr WrRd scWW sdWW ddWW scRR sdRR ddRR drRR drWW drWR drRRD
#0 38 23 21 8 1 15 15 1 8 8 0 0 0 0
#1 38 23 22 8 1 15 15 1 8 8 0 0 0 0
REFI RFC1 RFC2 RFC4 RCPB RPPB BGS:Alt Ban Page CKE CMD GDM ECC
#0 11677 312 0 3 0 0 ON OFF R0W0 0 0 0T ON 0
#1 11677 312 0 3 0 0 ON OFF R0W0 0 0 0T ON 0
MRD:PDA MOD:PDA WRMPR STAG PDM RDDATA WRD WRL RDL XS XP CPDED
#0 42 32 42 32 24 7 0:F:0 28 6 26 36 914 23 15
#1 42 32 42 32 24 7 0:F:0 28 6 26 36 914 23 15
DIMM Geometry for channel #0
Slot Bank Rank Rows Columns Memory Size (MB)
#0
#1 16 1 32768 1024 4096 CMK32GX5M2B6000C40
DIMM Geometry for channel #1
Slot Bank Rank Rows Columns Memory Size (MB)
#0
#1 16 1 32768 1024 4096 CMK32GX5M2B6000C40Is it possible to find the DIMM temperatures somewhere?
cyring
commented
1 year ago @Jon0 Thank you very much, I'm processing your data.
Is it possible to find the DIMM temperatures somewhere?
It's not implemented in CoreFreq.
SuperIO appear to be the most straightforward to get them. But the number of Chips is huge, it's like rewriting hwmon lm_sensors
Although you may have noticed that CoreFreq can retrieved the joule/watt energy of Memory, because of the RAPL uniformed interface available on some Intel processor architectures. But no such nice interface for DIMM interface.
I'm remembered reading in Intel's datasheets, especially Xeon(s), some PCI space registers with DIMM Thermal data. Zen PPR specs list some Thermal SMU registers which are limited to privileged level, not even within Kernel I can access to them. Probably BIOS, SMI, and such rings
cyring
commented
1 year ago 7950x :
# zencli smu 0x50200 [0x00050200] READ(smu) = 0x80050bb8 (2147814328) 60 56 52 48 44 40 36 32 28 24 20 16 12 08 04 00 0000 0000 0000 0000 0000 0000 0000 0000 1000 0000 0000 0101 0000 1011 1011 1000Thanks to your dump, I'm attempting to better compute Memory Clocks. Can you please try the followings ?
pull the develop branch
Build with PMC counters
make ARCH_PMC=UMC clean allcorefreq-cli -t packageYou may or not get the CHA frequencies
Zen2 DDR4 case
Zen3+ DDR5 case
Uncore section from Processor window
MEM is the raw hardware value of Mem ClockCLK is the computed Data Fabric clock
Memory Controller window where Bus Rate, Bus Speed and DDR5 Speed have been fixed
Thank you!
Jon0
commented
1 year ago I had some issues with the develop branch when starting the daemon - compile works and insmod reported success:
sudo corefreqd
Driver connection error code 11
/dev/corefreqk: 'Resource temporarily unavailable' @ line 8791sudo dmesg | grep CoreFreq
[ 96.571073] CoreFreq: PCI_HSMP_Mailbox(1) Timeout
[ 96.700603] CoreFreq(9:25:-1): Processor [ AF_61] Architecture [Zen4/Raphael] SMT [32/32]Tested with stock arch kernel:
uname -a
Linux sapphire 6.0.12-arch1-1 #1 SMP PREEMPT_DYNAMIC Thu, 08 Dec 2022 11:03:38 +0000 x86_64 GNU/LinuxAlso note master does the same thing when I build with ARCH_PMC=UMC
cyring
commented
1 year ago I had some issues with the develop branch when starting the daemon - compile works and insmod reported success:
sudo corefreqd Driver connection error code 11 /dev/corefreqk: 'Resource temporarily unavailable' @ line 8791sudo dmesg | grep CoreFreq [ 96.571073] CoreFreq: PCI_HSMP_Mailbox(1) Timeout [ 96.700603] CoreFreq(9:25:-1): Processor [ AF_61] Architecture [Zen4/Raphael] SMT [32/32]Tested with stock arch kernel:
uname -a Linux sapphire 6.0.12-arch1-1 #1 SMP PREEMPT_DYNAMIC Thu, 08 Dec 2022 11:03:38 +0000 x86_64 GNU/LinuxAlso note master does the same thing when I build with
ARCH_PMC=UMC
Is this something you didn't have in your previous runs using the master branch ?
Do you have another driver which could also make use of HSMP through the SMU, and thus a resource conflict ? Can be a kernel change, patch, and so on.
PS: I'm back with the stock arch kernel [6.0.12-arch1-1] and I can't reproduce the issue.
So I will suggest you remove the HSMP capability for 7950X, changing this block as below. Then rebuild all, and run again.
https://github.com/cyring/CoreFreq/blob/1d9e27e72f5ffbaa97266ac80c46bc82ceac538c/corefreqk.h#L6663
{
.Brand = ZLIST("AMD Ryzen 9 7950X"),
.Boost = {+12, +1},
.Param.Offset = {0, 0, 0},
.CodeNameIdx = CN_RAPHAEL,
.TgtRatioUnlocked = 1,
.ClkRatioUnlocked = 0b10,
.TurboUnlocked = 1,
.UncoreUnlocked = 0,
.HSMP_Capable = 0,
.Latch=LATCH_TGT_RATIO_UNLOCK|LATCH_CLK_RATIO_UNLOCK|LATCH_TURBO_UNLOCK\
|LATCH_HSMP_CAPABLE
},I found the issue was I ran corefreqd which was installed on my system via AUR, and not ./corefreqd the one I just built...
Here is the screenshots:
cyring
commented
1 year ago 5599 MT/s does it match your current DRAM speed?
2800 for Data Fabric. Is this also matching with the BIOS ?
Jon0
commented
1 year ago Frequency is not quite right, I tested a few settings in bios:
Actual Bios Setting -> CoreFreq Display Freq 6000 -> 5600 (screenshot) 5600 -> 4800 5200 -> 4000
Don't see Data Fabric in bios unless its hidden somewhere...
cyring
commented
1 year ago Frequency is not quite right, I tested a few settings in bios:
Actual Bios Setting -> CoreFreq Display Freq 6000 -> 5600 (screenshot) 5600 -> 4800 5200 -> 4000
Don't see Data Fabric in bios unless its hidden somewhere...
Do CPU-Z, HWINFO, or OCCT reports the Mem Clock as left in BIOS : screenshots please ?
cyring
commented
1 year ago @Jon0 OK, going back to this dump
# zencli smu 0x50200
[0x00050200] READ(smu) = 0x80050bb8 (2147814328)
60 56 52 48 44 40 36 32 28 24 20 16 12 08 04 00
0000 0000 0000 0000 0000 0000 0000 0000 1000 0000 0000 0101 0000 1011 1011 1000The first 16 bits of hexadecimal value 0xbb8 is the frequency in MHz
3000 MHz when converted in decimal, multiplied by 2 equals the DRAM speed 6000 MT/s
This is the major change with Zen versions 1, 2, and 3 where DDR4 is encoded as a frequency ratio of 2 digits within bits [6-0] But why that 2 digits encoding is working with Rembrandt Zen version 3 Plus which comes with DDR5 !
cyring
commented
1 year ago # ./zencli smu 0x50200
[0x00050200] READ(smu) = 0x40010960 (1073809760)
60 56 52 48 44 40 36 32 28 24 20 16 12 08 04 00
0000 0000 0000 0000 0000 0000 0000 0000 0100 0000 0000 0001 0000 1001 0110 0000Mistake is mine: 0x960 converts to 2400 MHz
So we can use the same algorithm when DRAM is unconditionally of DDR5 kind.
Jon0
commented
1 year ago Yep heres another when I set 2000M/T in bios (lowest it can go)
zencli smu 0x50200
[0x00050200] READ(smu) = 0x000503e8 (328680)
60 56 52 48 44 40 36 32 28 24 20 16 12 08 04 00
0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0101 0000 0011 1110 1000I don't have a windows install available right now to check other software, but the above formula does look correct
cyring
commented
1 year ago Yep heres another when I set 2000M/T in bios (lowest it can go)
zencli smu 0x50200 [0x00050200] READ(smu) = 0x000503e8 (328680) 60 56 52 48 44 40 36 32 28 24 20 16 12 08 04 00 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0101 0000 0011 1110 1000I don't have a windows install available right now to check other software, but the above formula does look correct
Thanks,
You can now pull and try the latest code of develop branch
The impacted items are the followings
in "Processor" window:
in "Package cycles" view
in "Memory Controller" window
For your information, my Zen3+ decoded results
I have searched some 7900X BIOS screenshots and found that FCLK = MCLK / 3
KeithMyers
commented
1 year ago corefreq-cli -s -n -C 1 -n -MProcessor [AMD Ryzen 9 7950X 16-Core Processor]
|- Architecture [Zen4/Raphael]
|- Vendor ID [AuthenticAMD]
|- Microcode [0x0a601203]
|- Signature [ AF_61]
|- Stepping [ 2]
|- Online CPU [ 32/ 32]
|- Base Clock [100.005]
|- Frequency (MHz) Ratio
Min 3000.15 < 30 >
Max 4500.23 < 45 >
|- Factory [100.000]
4500 [ 45 ]
|- Performance
|- P-State
TGT 4500.23 < 45 >
|- CPPC
Min 3700.19 < 37 >
Max 1900.10 < 19 >
TGT 3700.19 < 37 >
|- Turbo Boost [ UNLOCK]
XFR 5800.29 [ 58 ]
CPB 5700.29 [ 57 ]
1C 3000.15 < 30 >
|- Uncore [ LOCK]
Instruction Set Extensions
|- 3DNow!/Ext [N/N] ADX [Y] AES [Y] AVX/AVX2 [Y/Y]
|- AVX512-F [Y] AVX512-DQ [Y] AVX512-IFMA [Y] AVX512-PF [N]
|- AVX512-ER [N] AVX512-CD [Y] AVX512-BW [Y] AVX512-VL [Y]
|- AVX512-VBMI [Y] AVX512-VBMI2 [Y] AVX512-VNNI [Y] AVX512-ALG [Y]
|- AVX512-VPOP [Y] AVX512-VNNIW [N] AVX512-FMAPS [N] AVX512-VP2I [N]
|- AVX512-BF16 [Y] AVX-VNNI-VEX [N] AVX-FP128 [N] AVX-FP256 [Y]
|- BMI1/BMI2 [Y/Y] CLWB [Y] CLFLUSH [Y] CLFLUSH-OPT [Y]
|- CLAC-STAC [Y] CMOV [Y] CMPXCHG8B [Y] CMPXCHG16B [Y]
|- F16C [Y] FPU [Y] FXSR [Y] LAHF-SAHF [Y]
|- MMX/Ext [Y/Y] MON/MWAITX [Y/Y] MOVBE [Y] PCLMULQDQ [Y]
|- POPCNT [Y] RDRAND [Y] RDSEED [Y] RDTSCP [Y]
|- SEP [Y] SHA [Y] SSE [Y] SSE2 [Y]
|- SSE3 [Y] SSSE3 [Y] SSE4.1/4A [Y/Y] SSE4.2 [Y]
|- SERIALIZE [N] SYSCALL [Y] RDPID [Y] UMIP [Y]
|- VAES [Y] VPCLMULQDQ [Y] PREFETCH/W [Y] LZCNT [Y]
Features
|- 1 GB Pages Support 1GB-PAGES [Capable]
|- 100 MHz multiplier Control 100MHzSteps [Missing]
|- Advanced Configuration & Power Interface ACPI [Capable]
|- Advanced Programmable Interrupt Controller APIC [Capable]
|- Advanced Virtual Interrupt Controller AVIC [Capable]
|- APIC Timer Invariance ARAT [Capable]
|- Clear Zero Instruction CLZERO [Capable]
|- Core Multi-Processing CMP Legacy [Capable]
|- L1 Data Cache Context ID CNXT-ID [Missing]
|- Collaborative Processor Performance Control CPPC [Capable]
|- Direct Cache Access DCA [Missing]
|- Debugging Extension DE [Capable]
|- Debug Store & Precise Event Based Sampling DS, PEBS [Missing]
|- CPL Qualified Debug Store DS-CPL [Missing]
|- 64-Bit Debug Store DTES64 [Missing]
|- Fast Short REP MOVSB FSRM [Capable]
|- Fast-String Operation ERMS [Capable]
|- Fused Multiply Add FMA | FMA4 [Capable]
|- Hardware Lock Elision HLE [Missing]
|- Hardware P-state control HwP [Capable]
|- Instruction Based Sampling IBS [Capable]
|- Instruction INVLPGB INVLPGB [Missing]
|- Instruction INVPCID INVPCID [Capable]
|- Long Mode 64 bits IA64 | LM [Capable]
|- LightWeight Profiling LWP [Missing]
|- Memory Bandwidth Enforcement MBE [Capable]
|- Machine-Check Architecture MCA [Capable]
|- Instruction MCOMMIT MCOMMIT [Missing]
|- Memory Protection Extensions MPX [Missing]
|- Model Specific Registers MSR [Capable]
|- Memory Type Range Registers MTRR [Capable]
|- No-Execute Page Protection NX [Capable]
|- OS-Enabled Ext. State Management OSXSAVE [Capable]
|- Physical Address Extension PAE [Capable]
|- Page Attribute Table PAT [Capable]
|- Pending Break Enable PBE [Missing]
|- Process Context Identifiers PCID [Missing]
|- Perfmon and Debug Capability PDCM [Missing]
|- Page Global Enable PGE [Capable]
|- Page Size Extension PSE [Capable]
|- 36-bit Page Size Extension PSE36 [Capable]
|- Processor Serial Number PSN [Missing]
|- Resource Director Technology/PQE RDT-A [Capable]
|- Resource Director Technology/PQM RDT-M [Capable]
|- Read Processor Register at User level RDPRU [Capable]
|- Restricted Transactional Memory RTM [Missing]
|- Safer Mode Extensions SMX [Missing]
|- Self-Snoop SS [Missing]
|- Supervisor-Mode Access Prevention SMAP [Capable]
|- Supervisor-Mode Execution Prevention SMEP [Capable]
|- Time Stamp Counter TSC [Invariant]
|- Time Stamp Counter Deadline TSC-DEADLINE [Missing]
|- TSX Force Abort MSR Register TSX-ABORT [Missing]
|- TSX Suspend Load Address Tracking TSX-LDTRK [Missing]
|- User-Mode Instruction Prevention UMIP [Capable]
|- Virtual Mode Extension VME [Capable]
|- Virtual Machine Extensions VMX [Missing]
|- Write Back & Do Not Invalidate Cache WBNOINVD [Capable]
|- Extended xAPIC Support x2APIC [ xAPIC]
|- AVIC controller for x2APIC x2AVIC [Capable]
|- XSAVE/XSTOR States XSAVE [Capable]
|- xTPR Update Control xTPR [Missing]
Mitigation mechanisms
|- Indirect Branch Restricted Speculation IBRS [Capable]
|- IBRS Always-On preferred by processor [ Unable]
|- IBRS preferred over software solution [Capable]
|- IBRS provides same speculation limits [Capable]
|- Indirect Branch Prediction Barrier IBPB [Capable]
|- Single Thread Indirect Branch Predictor STIBP [ Enable]
|- Speculative Store Bypass Disable SSBD [Capable]
|- SSBD use VIRT_SPEC_CTRL register [ Unable]
|- SSBD not needed on this processor [ Unable]
|- No Branch Type Confusion BTC_NO [ Unable]
|- BTC on Non-Branch instruction BTC-NOBR [Capable]
|- Arch - No Fast Predictive Store Forwarding PSFD [Capable]
Security Features
|- Secure Init and Jump with Attestation SKINIT [Capable]
|- Secure Encrypted Virtualization SEV [Missing]
|- SEV - Encrypted State SEV-ES [Missing]
|- SEV - Secure Nested Paging SEV-SNP [Missing]
|- Guest Mode Execute Trap GMET [Capable]
|- Supervisor Shadow Stack SSS [Capable]
|- VM Permission Levels VMPL [Missing]
|- VMPL Supervisor Shadow Stack VMPL-SSS [Missing]
|- Secure Multi-Key Memory Encryption SME-MK [Missing]
Technologies
|- Instruction Cache Unit
|- L1 IP Prefetcher L1 HW IP < ON>
|- Data Cache Unit
|- L1 Prefetcher L1 HW < ON>
|- L2 Prefetcher L2 HW < ON>
|- System Management Mode SMM-Lock [ ON]
|- Simultaneous Multithreading SMT [ ON]
|- PowerNow! CnQ [OFF]
|- Core C-States CCx [ ON]
|- Core Performance Boost CPB < ON>
|- Watchdog Timer WDT <OFF>
|- Virtualization SVM [OFF]
|- I/O MMU AMD-V [OFF]
|- Version [ N/A]
|- Hypervisor [OFF]
|- Vendor ID [ N/A]
Performance Monitoring
|- Version PM [ 2]
|- Counters: General Fixed
| { 6, 6, 16 } x 48 bits 3 x 64 bits
|- Enhanced Halt State C1E <OFF>
|- C2 UnDemotion C2U < ON>
|- C3 UnDemotion C3U < ON>
|- Core C6 State CC6 < ON>
|- Package C6 State PC6 < ON>
|- Legacy Frequency ID control FID [OFF]
|- Legacy Voltage ID control VID [OFF]
|- P-State Hardware Coordination Feedback MPERF/APERF [ ON]
|- Core C-States
|- C-States Base Address BAR [ 0x413 ]
|- MONITOR/MWAIT
|- State index: #0 #1 #2 #3 #4 #5 #6 #7
|- Sub C-State: 1 1 0 0 0 0 0 0
|- Core Cycles [Capable]
|- Instructions Retired [Capable]
|- Reference Cycles [Capable]
|- Last Level Cache References [Capable]
|- Global Time Stamp Counter [Missing]
|- Data Fabric Performance Counter [Capable]
|- Core Performance Counter [Capable]
|- Continuous Performance Control _CPC [OFF]
|- Collaborative Processor Performance Control CPPC < ON>
|- Capabilities Lowest Efficient Guaranteed Highest
|- CPU #0 300.02 ( 3) 1900.10 ( 19) 2800.14 ( 28) 4600.23 ( 46)
|- CPU #1 300.01 ( 3) 1900.08 ( 19) 2800.12 ( 28) 5300.22 ( 53)
|- CPU #2 300.01 ( 3) 1900.08 ( 19) 2800.12 ( 28) 4800.20 ( 48)
|- CPU #3 300.02 ( 3) 1900.10 ( 19) 2800.14 ( 28) 5200.26 ( 52)
|- CPU #4 300.02 ( 3) 1900.11 ( 19) 2800.17 ( 28) 4700.28 ( 47)
|- CPU #5 300.01 ( 3) 1900.08 ( 19) 2800.12 ( 28) 5100.21 ( 51)
|- CPU #6 300.01 ( 3) 1900.08 ( 19) 2800.12 ( 28) 4900.20 ( 49)
|- CPU #7 300.02 ( 3) 1900.10 ( 19) 2800.14 ( 28) 5300.27 ( 53)
|- CPU #8 300.01 ( 3) 1900.09 ( 19) 2800.14 ( 28) 3700.18 ( 37)
|- CPU #9 300.01 ( 3) 1900.08 ( 19) 2800.11 ( 28) 4300.18 ( 43)
|- CPU #10 300.02 ( 3) 1900.10 ( 19) 2800.14 ( 28) 4000.20 ( 40)
|- CPU #11 300.02 ( 3) 1900.10 ( 19) 2800.14 ( 28) 4200.21 ( 42)
|- CPU #12 300.01 ( 3) 1900.08 ( 19) 2800.11 ( 28) 3900.16 ( 39)
|- CPU #13 300.01 ( 3) 1900.08 ( 19) 2800.11 ( 28) 4500.18 ( 45)
|- CPU #14 300.02 ( 3) 1900.10 ( 19) 2800.14 ( 28) 3800.19 ( 38)
|- CPU #15 300.01 ( 3) 1900.08 ( 19) 2800.11 ( 28) 4400.18 ( 44)
|- CPU #16 300.02 ( 3) 1900.10 ( 19) 2800.14 ( 28) 4600.23 ( 46)
|- CPU #17 300.02 ( 3) 1900.10 ( 19) 2800.14 ( 28) 5300.27 ( 53)
|- CPU #18 300.01 ( 3) 1900.08 ( 19) 2800.12 ( 28) 4800.20 ( 48)
|- CPU #19 300.02 ( 3) 1900.10 ( 19) 2800.14 ( 28) 5200.26 ( 52)
|- CPU #20 300.02 ( 3) 1900.10 ( 19) 2800.14 ( 28) 4700.24 ( 47)
|- CPU #21 300.01 ( 3) 1900.09 ( 19) 2800.14 ( 28) 5100.25 ( 51)
|- CPU #22 300.02 ( 3) 1900.10 ( 19) 2800.14 ( 28) 4900.25 ( 49)
|- CPU #23 300.01 ( 3) 1900.08 ( 19) 2800.12 ( 28) 5300.22 ( 53)
|- CPU #24 300.01 ( 3) 1900.08 ( 19) 2800.11 ( 28) 3700.15 ( 37)
|- CPU #25 300.02 ( 3) 1900.10 ( 19) 2800.14 ( 28) 4300.22 ( 43)
|- CPU #26 300.02 ( 3) 1900.11 ( 19) 2800.17 ( 28) 4000.24 ( 40)
|- CPU #27 300.01 ( 3) 1900.08 ( 19) 2800.12 ( 28) 4200.17 ( 42)
|- CPU #28 300.02 ( 3) 1900.11 ( 19) 2800.17 ( 28) 3900.24 ( 39)
|- CPU #29 300.01 ( 3) 1900.08 ( 19) 2800.11 ( 28) 4500.18 ( 45)
|- CPU #30 300.02 ( 3) 1900.10 ( 19) 2800.14 ( 28) 3800.19 ( 38)
|- CPU #31 300.02 ( 3) 1900.10 ( 19) 2800.14 ( 28) 4400.22 ( 44)
Power, Current & Thermal
|- Temperature Offset:Junction TjMax [ 49: 0 C]
|- CPPC Energy Preference EPP < 0>
|- Digital Thermal Sensor DTS [Capable]
|- Power Limit Notification PLN [Missing]
|- Package Thermal Management PTM [Missing]
|- Thermal Monitor 1 TTP [ Enable]
|- Thermal Monitor 2 HTC [ Enable]
|- Thermal Design Power TDP [Missing]
|- Minimum Power Min [Missing]
|- Maximum Power Max [Missing]
|- Thermal Design Power Package [Disable]
|- Power Limit PL1 [ 0 W]
|- Time Window TW1 [ 0 ns]
|- Power Limit PL2 [ 0 W]
|- Time Window TW2 [ 0 ns]
|- Thermal Design Power Core [Disable]
|- Power Limit PL1 [ 0 W]
|- Time Window TW1 [ 0 ns]
|- Thermal Design Power Uncore [Disable]
|- Power Limit PL1 [ 0 W]
|- Time Window TW1 [ 0 ns]
|- Thermal Design Power DRAM [Disable]
|- Power Limit PL1 [ 0 W]
|- Time Window TW1 [ 0 ns]
|- Thermal Design Power Platform [Disable]
|- Power Limit PL1 [ 0 W]
|- Time Window TW1 [ 0 ns]
|- Power Limit PL2 [ 0 W]
|- Time Window TW2 [ 0 ns]
|- Package Power Tracking PPT [Missing]
|- Electrical Design Current EDC [Missing]
|- Thermal Design Current TDC [Missing]
|- Core Thermal Point
|- Package Thermal Point
|- Thermal Monitor Trip Limit [ 115 C]
|- HTC Temperature Limit Limit [ 127 C]
|- HTC Temperature Hysteresis Threshold [ 2 C]
|- Units
|- Power watt [ Missing]
|- Energy joule [ 0.000015259]
|- Window second [ 0.000976562]
CPU Freq(MHz) VID Vcore TMP(C) Accumulator Energy(J) Power(W)
000 3691.38 206 1.2875 91 000000000000793430 12.106781006 12.106781006
001 5400.22 206 1.2875 91 000000000000894499 13.648971558 13.648971558
002 4388.97 206 1.2875 91 000000000000889480 13.572387695 13.572387695
003 5234.78 206 1.2875 91 000000000001025309 15.644973755 15.644973755
004 4818.44 206 1.2875 91 000000000001014383 15.478256226 15.478256226
005 4281.98 206 1.2875 91 000000000000982964 14.998840332 14.998840332
006 4590.97 206 1.2875 91 000000000000960419 14.654830933 14.654830933
007 4861.11 206 1.2875 91 000000000000975095 14.878768921 14.878768921
008 2835.53 206 1.2875 82 000000000000607948 9.276550293 9.276550293
009 3420.50 201 1.2563 74 000000000000628237 9.586135864 9.586135864
010 5137.88 206 1.2875 82 000000000000686994 10.482696533 10.482696533
011 3677.52 206 1.2875 82 000000000000687033 10.483291626 10.483291626
012 5044.23 206 1.2875 82 000000000000748965 11.428298950 11.428298950
013 3835.39 206 1.2875 82 000000000000692026 10.559478760 10.559478760
014 4925.04 206 1.2875 82 000000000000689250 10.517120361 10.517120361
015 4688.24 206 1.2875 82 000000000000731564 11.162780762 11.162780762
016 4439.69 206 1.2875 91 000000000000000000 0.000000000 0.000000000
017 5400.27 206 1.2875 91 000000000000000000 0.000000000 0.000000000
018 4489.09 206 1.2875 91 000000000000000000 0.000000000 0.000000000
019 5399.89 206 1.2875 91 000000000000000000 0.000000000 0.000000000
020 5400.27 206 1.2875 91 000000000000000000 0.000000000 0.000000000
021 4393.13 206 1.2875 91 000000000000000000 0.000000000 0.000000000
022 5193.99 206 1.2875 91 000000000000000000 0.000000000 0.000000000
023 4948.42 206 1.2875 91 000000000000000000 0.000000000 0.000000000
024 4498.96 201 1.2563 74 000000000000000000 0.000000000 0.000000000
025 4483.12 206 1.2875 82 000000000000000000 0.000000000 0.000000000
026 2667.34 206 1.2875 81 000000000000000000 0.000000000 0.000000000
027 4855.26 206 1.2875 81 000000000000000000 0.000000000 0.000000000
028 4664.15 206 1.2875 81 000000000000000000 0.000000000 0.000000000
029 4921.33 206 1.2875 81 000000000000000000 0.000000000 0.000000000
030 4698.44 206 1.2875 81 000000000000000000 0.000000000 0.000000000
031 4454.73 206 1.2875 81 000000000000000000 0.000000000 0.000000000
Package[0] Cores Uncore Memory Platform
Energy(J): 208.999008179 197.947296143 0.000000000 0.000000000 0.000000000
Power(W) : 208.999008179 197.947296143 0.000000000 0.000000000 0.000000000
Zen UMC [14E0]
Controller #0 @KeithMyers
corefreq-cli -s -n -C 1 -n -M
I don't see the Memory Controller. It's working with @Jon0, same processor, same DID of 14E0 !
Can you please pull and run from the develop branch ?
All the Ryzen 9 7950X new code is available in this branch; it will be confirmed by version 1.94.0
KeithMyers
commented
1 year ago Sure. Here you go.
corefreq-cli -s -n -C 1 -n -MProcessor [AMD Ryzen 9 7950X 16-Core Processor]
|- Architecture [Zen4/Raphael]
|- Vendor ID [AuthenticAMD]
|- Microcode [0x0a601203]
|- Signature [ AF_61]
|- Stepping [ 2]
|- Online CPU [ 32/ 32]
|- Base Clock [ 99.997]
|- Frequency (MHz) Ratio
Min 2999.94 < 30 >
Max 4499.92 < 45 >
|- Factory [100.000]
4500 [ 45 ]
|- Performance
|- P-State
TGT 4499.92 < 45 >
|- CPPC
Min 3699.93 < 37 >
Max 1899.96 < 19 >
TGT 2099.96 < 21 >
|- Turbo Boost [ UNLOCK]
XFR 5799.89 [ 58 ]
CPB 5699.89 [ 57 ]
1C 2999.94 < 30 >
|- Uncore [ LOCK]
Instruction Set Extensions
|- 3DNow!/Ext [N/N] ADX [Y] AES [Y] AVX/AVX2 [Y/Y]
|- AVX512-F [Y] AVX512-DQ [Y] AVX512-IFMA [Y] AVX512-PF [N]
|- AVX512-ER [N] AVX512-CD [Y] AVX512-BW [Y] AVX512-VL [Y]
|- AVX512-VBMI [Y] AVX512-VBMI2 [Y] AVX512-VNNI [Y] AVX512-ALG [Y]
|- AVX512-VPOP [Y] AVX512-VNNIW [N] AVX512-FMAPS [N] AVX512-VP2I [N]
|- AVX512-BF16 [Y] AVX-VNNI-VEX [N] AVX-FP128 [N] AVX-FP256 [Y]
|- BMI1/BMI2 [Y/Y] CLWB [Y] CLFLUSH [Y] CLFLUSH-OPT [Y]
|- CLAC-STAC [Y] CMOV [Y] CMPXCHG8B [Y] CMPXCHG16B [Y]
|- F16C [Y] FPU [Y] FXSR [Y] LAHF-SAHF [Y]
|- MMX/Ext [Y/Y] MON/MWAITX [Y/Y] MOVBE [Y] PCLMULQDQ [Y]
|- POPCNT [Y] RDRAND [Y] RDSEED [Y] RDTSCP [Y]
|- SEP [Y] SHA [Y] SSE [Y] SSE2 [Y]
|- SSE3 [Y] SSSE3 [Y] SSE4.1/4A [Y/Y] SSE4.2 [Y]
|- SERIALIZE [N] SYSCALL [Y] RDPID [Y] UMIP [Y]
|- VAES [Y] VPCLMULQDQ [Y] PREFETCH/W [Y] LZCNT [Y]
Features
|- 1 GB Pages Support 1GB-PAGES [Capable]
|- 100 MHz multiplier Control 100MHzSteps [Missing]
|- Advanced Configuration & Power Interface ACPI [Capable]
|- Advanced Programmable Interrupt Controller APIC [Capable]
|- Advanced Virtual Interrupt Controller AVIC [Capable]
|- APIC Timer Invariance ARAT [Capable]
|- Clear Zero Instruction CLZERO [Capable]
|- Core Multi-Processing CMP Legacy [Capable]
|- L1 Data Cache Context ID CNXT-ID [Missing]
|- Collaborative Processor Performance Control CPPC [Capable]
|- Direct Cache Access DCA [Missing]
|- Debugging Extension DE [Capable]
|- Debug Store & Precise Event Based Sampling DS, PEBS [Missing]
|- CPL Qualified Debug Store DS-CPL [Missing]
|- 64-Bit Debug Store DTES64 [Missing]
|- Fast Short REP MOVSB FSRM [Capable]
|- Fast-String Operation ERMS [Capable]
|- Fused Multiply Add FMA | FMA4 [Capable]
|- Hardware Lock Elision HLE [Missing]
|- Hardware P-state control HwP [Capable]
|- Instruction Based Sampling IBS [Capable]
|- Instruction INVLPGB INVLPGB [Missing]
|- Instruction INVPCID INVPCID [Capable]
|- Long Mode 64 bits IA64 | LM [Capable]
|- LightWeight Profiling LWP [Missing]
|- Memory Bandwidth Enforcement MBE [Capable]
|- Machine-Check Architecture MCA [Capable]
|- Instruction MCOMMIT MCOMMIT [Missing]
|- Memory Protection Extensions MPX [Missing]
|- Model Specific Registers MSR [Capable]
|- Memory Type Range Registers MTRR [Capable]
|- No-Execute Page Protection NX [Capable]
|- OS-Enabled Ext. State Management OSXSAVE [Capable]
|- Physical Address Extension PAE [Capable]
|- Page Attribute Table PAT [Capable]
|- Pending Break Enable PBE [Missing]
|- Process Context Identifiers PCID [Missing]
|- Perfmon and Debug Capability PDCM [Missing]
|- Page Global Enable PGE [Capable]
|- Page Size Extension PSE [Capable]
|- 36-bit Page Size Extension PSE36 [Capable]
|- Processor Serial Number PSN [Missing]
|- Resource Director Technology/PQE RDT-A [Capable]
|- Resource Director Technology/PQM RDT-M [Capable]
|- Read Processor Register at User level RDPRU [Capable]
|- Restricted Transactional Memory RTM [Missing]
|- Safer Mode Extensions SMX [Missing]
|- Self-Snoop SS [Missing]
|- Supervisor-Mode Access Prevention SMAP [Capable]
|- Supervisor-Mode Execution Prevention SMEP [Capable]
|- Time Stamp Counter TSC [Invariant]
|- Time Stamp Counter Deadline TSC-DEADLINE [Missing]
|- TSX Force Abort MSR Register TSX-ABORT [Missing]
|- TSX Suspend Load Address Tracking TSX-LDTRK [Missing]
|- User-Mode Instruction Prevention UMIP [Capable]
|- Virtual Mode Extension VME [Capable]
|- Virtual Machine Extensions VMX [Missing]
|- Write Back & Do Not Invalidate Cache WBNOINVD [Capable]
|- Extended xAPIC Support x2APIC [ xAPIC]
|- AVIC controller for x2APIC x2AVIC [Capable]
|- XSAVE/XSTOR States XSAVE [Capable]
|- xTPR Update Control xTPR [Missing]
Mitigation mechanisms
|- Indirect Branch Restricted Speculation IBRS [Capable]
|- IBRS Always-On preferred by processor [ Unable]
|- IBRS preferred over software solution [Capable]
|- IBRS provides same speculation limits [Capable]
|- Indirect Branch Prediction Barrier IBPB [Capable]
|- Single Thread Indirect Branch Predictor STIBP [ Enable]
|- Speculative Store Bypass Disable SSBD [Capable]
|- SSBD use VIRT_SPEC_CTRL register [ Unable]
|- SSBD not needed on this processor [ Unable]
|- No Branch Type Confusion BTC_NO [ Unable]
|- BTC on Non-Branch instruction BTC-NOBR [Capable]
|- Arch - No Fast Predictive Store Forwarding PSFD [Capable]
Security Features
|- Secure Init and Jump with Attestation SKINIT [Capable]
|- Secure Encrypted Virtualization SEV [Missing]
|- SEV - Encrypted State SEV-ES [Missing]
|- SEV - Secure Nested Paging SEV-SNP [Missing]
|- Guest Mode Execute Trap GMET [Capable]
|- Supervisor Shadow Stack SSS [Capable]
|- VM Permission Levels VMPL [Missing]
|- VMPL Supervisor Shadow Stack VMPL-SSS [Missing]
|- Secure Multi-Key Memory Encryption SME-MK [Missing]
Technologies
|- Instruction Cache Unit
|- L1 IP Prefetcher L1 HW IP < ON>
|- Data Cache Unit
|- L1 Prefetcher L1 HW < ON>
|- L2 Prefetcher L2 HW < ON>
|- System Management Mode SMM-Lock [ ON]
|- Simultaneous Multithreading SMT [ ON]
|- PowerNow! CnQ [OFF]
|- Core C-States CCx [ ON]
|- Core Performance Boost CPB < ON>
|- Watchdog Timer WDT <OFF>
|- Virtualization SVM [OFF]
|- I/O MMU AMD-V [OFF]
|- Version [ N/A]
|- Hypervisor [OFF]
|- Vendor ID [ N/A]
Performance Monitoring
|- Version PM [ 2]
|- Counters: General Fixed
| { 6, 6, 16 } x 48 bits 3 x 64 bits
|- Enhanced Halt State C1E <OFF>
|- C2 UnDemotion C2U < ON>
|- C3 UnDemotion C3U < ON>
|- Core C6 State CC6 < ON>
|- Package C6 State PC6 < ON>
|- Legacy Frequency ID control FID [OFF]
|- Legacy Voltage ID control VID [OFF]
|- P-State Hardware Coordination Feedback MPERF/APERF [ ON]
|- Core C-States
|- C-States Base Address BAR [ 0x413 ]
|- MONITOR/MWAIT
|- State index: #0 #1 #2 #3 #4 #5 #6 #7
|- Sub C-State: 1 1 0 0 0 0 0 0
|- Core Cycles [Capable]
|- Instructions Retired [Capable]
|- Reference Cycles [Capable]
|- Last Level Cache References [Capable]
|- Global Time Stamp Counter [Missing]
|- Data Fabric Performance Counter [Capable]
|- Core Performance Counter [Capable]
|- Continuous Performance Control _CPC [OFF]
|- Collaborative Processor Performance Control CPPC < ON>
|- Capabilities Lowest Efficient Guaranteed Highest
|- CPU #0 299.99 ( 3) 1899.96 ( 19) 2799.95 ( 28) 4599.91 ( 46)
|- CPU #1 300.00 ( 3) 1899.98 ( 19) 2799.98 ( 28) 5299.96 ( 53)
|- CPU #2 299.99 ( 3) 1899.97 ( 19) 2799.95 ( 28) 4799.91 ( 48)
|- CPU #3 299.99 ( 3) 1899.97 ( 19) 2799.95 ( 28) 5199.91 ( 52)
|- CPU #4 299.99 ( 3) 1899.95 ( 19) 2799.92 ( 28) 4699.87 ( 47)
|- CPU #5 300.00 ( 3) 1899.98 ( 19) 2799.97 ( 28) 5099.95 ( 51)
|- CPU #6 299.99 ( 3) 1899.97 ( 19) 2799.95 ( 28) 4899.91 ( 49)
|- CPU #7 299.99 ( 3) 1899.97 ( 19) 2799.95 ( 28) 5299.90 ( 53)
|- CPU #8 299.99 ( 3) 1899.96 ( 19) 2799.95 ( 28) 3699.93 ( 37)
|- CPU #9 299.99 ( 3) 1899.95 ( 19) 2799.92 ( 28) 4299.88 ( 43)
|- CPU #10 299.99 ( 3) 1899.95 ( 19) 2799.92 ( 28) 3999.89 ( 40)
|- CPU #11 299.99 ( 3) 1899.97 ( 19) 2799.95 ( 28) 4199.92 ( 42)
|- CPU #12 299.99 ( 3) 1899.95 ( 19) 2799.92 ( 28) 3899.89 ( 39)
|- CPU #13 300.00 ( 3) 1899.97 ( 19) 2799.96 ( 28) 4499.94 ( 45)
|- CPU #14 300.00 ( 3) 1899.97 ( 19) 2799.95 ( 28) 3799.94 ( 38)
|- CPU #15 299.99 ( 3) 1899.95 ( 19) 2799.92 ( 28) 4399.88 ( 44)
|- CPU #16 299.99 ( 3) 1899.97 ( 19) 2799.95 ( 28) 4599.92 ( 46)
|- CPU #17 299.99 ( 3) 1899.97 ( 19) 2799.95 ( 28) 5299.90 ( 53)
|- CPU #18 300.00 ( 3) 1899.98 ( 19) 2799.98 ( 28) 4799.96 ( 48)
|- CPU #19 300.00 ( 3) 1899.97 ( 19) 2799.96 ( 28) 5199.92 ( 52)
|- CPU #20 299.99 ( 3) 1899.95 ( 19) 2799.92 ( 28) 4699.87 ( 47)
|- CPU #21 299.99 ( 3) 1899.97 ( 19) 2799.95 ( 28) 5099.91 ( 51)
|- CPU #22 299.99 ( 3) 1899.97 ( 19) 2799.95 ( 28) 4899.91 ( 49)
|- CPU #23 299.99 ( 3) 1899.95 ( 19) 2799.92 ( 28) 5299.85 ( 53)
|- CPU #24 300.00 ( 3) 1899.98 ( 19) 2799.98 ( 28) 3699.97 ( 37)
|- CPU #25 300.00 ( 3) 1899.97 ( 19) 2799.96 ( 28) 4299.94 ( 43)
|- CPU #26 299.99 ( 3) 1899.95 ( 19) 2799.92 ( 28) 3999.89 ( 40)
|- CPU #27 300.00 ( 3) 1899.98 ( 19) 2799.96 ( 28) 4199.95 ( 42)
|- CPU #28 299.99 ( 3) 1899.97 ( 19) 2799.95 ( 28) 3899.93 ( 39)
|- CPU #29 299.99 ( 3) 1899.97 ( 19) 2799.95 ( 28) 4499.92 ( 45)
|- CPU #30 300.00 ( 3) 1899.98 ( 19) 2799.97 ( 28) 3799.95 ( 38)
|- CPU #31 300.00 ( 3) 1899.98 ( 19) 2799.96 ( 28) 4399.94 ( 44)
Power, Current & Thermal
|- Temperature Offset:Junction TjMax [ 49: 0 C]
|- CPPC Energy Preference EPP < 0>
|- Digital Thermal Sensor DTS [Capable]
|- Power Limit Notification PLN [Missing]
|- Package Thermal Management PTM [Missing]
|- Thermal Monitor 1 TTP [ Enable]
|- Thermal Monitor 2 HTC [ Enable]
|- Thermal Design Power TDP [Missing]
|- Minimum Power Min [Missing]
|- Maximum Power Max [Missing]
|- Thermal Design Power Package [Disable]
|- Power Limit PL1 [ 0 W]
|- Time Window TW1 [ 0 ns]
|- Power Limit PL2 [ 0 W]
|- Time Window TW2 [ 0 ns]
|- Thermal Design Power Core [Disable]
|- Power Limit PL1 [ 0 W]
|- Time Window TW1 [ 0 ns]
|- Thermal Design Power Uncore [Disable]
|- Power Limit PL1 [ 0 W]
|- Time Window TW1 [ 0 ns]
|- Thermal Design Power DRAM [Disable]
|- Power Limit PL1 [ 0 W]
|- Time Window TW1 [ 0 ns]
|- Thermal Design Power Platform [Disable]
|- Power Limit PL1 [ 0 W]
|- Time Window TW1 [ 0 ns]
|- Power Limit PL2 [ 0 W]
|- Time Window TW2 [ 0 ns]
|- Package Power Tracking PPT [Missing]
|- Electrical Design Current EDC [Missing]
|- Thermal Design Current TDC [Missing]
|- Core Thermal Point
|- Package Thermal Point
|- Thermal Monitor Trip Limit [ 115 C]
|- HTC Temperature Limit Limit [ 127 C]
|- HTC Temperature Hysteresis Threshold [ 2 C]
|- Units
|- Power watt [ Missing]
|- Energy joule [ 0.000015259]
|- Window second [ 0.000976562]
CPU Freq(MHz) VID Vcore TMP(C) Accumulator Energy(J) Power(W)
000 5399.11 206 1.2875 93 000000000000918178 14.010284424 14.010284424
001 5220.56 206 1.2875 92 000000000000957523 14.610641479 14.610641479
002 5162.41 206 1.2875 92 000000000000999947 15.257980347 15.257980347
003 5332.21 206 1.2875 92 000000000000970235 14.804611206 14.804611206
004 4819.76 206 1.2875 92 000000000000962505 14.686660767 14.686660767
005 5332.03 206 1.2875 92 000000000001029904 15.715087891 15.715087891
006 5399.11 206 1.2875 93 000000000001052169 16.054824829 16.054824829
007 5259.03 206 1.2875 92 000000000000927810 14.157257080 14.157257080
008 4588.91 206 1.2875 83 000000000000773417 11.801406860 11.801406860
009 4904.72 206 1.2875 81 000000000000638982 9.750091553 9.750091553
010 2452.36 206 1.2875 81 000000000000602910 9.199676514 9.199676514
011 3652.40 206 1.2875 83 000000000000663486 10.123992920 10.123992920
012 4655.87 206 1.2875 83 000000000000691626 10.553375244 10.553375244
013 4494.26 206 1.2875 81 000000000000732537 11.177627563 11.177627563
014 4074.53 206 1.2875 81 000000000000669938 10.222442627 10.222442627
015 4358.82 206 1.2875 81 000000000000698536 10.658813477 10.658813477
016 5399.90 206 1.2875 93 000000000000000000 0.000000000 0.000000000
017 5172.89 206 1.2875 92 000000000000000000 0.000000000 0.000000000
018 5303.18 206 1.2875 92 000000000000000000 0.000000000 0.000000000
019 4808.93 206 1.2875 92 000000000000000000 0.000000000 0.000000000
020 5274.48 206 1.2875 92 000000000000000000 0.000000000 0.000000000
021 5399.90 206 1.2875 92 000000000000000000 0.000000000 0.000000000
022 5399.90 206 1.2875 93 000000000000000000 0.000000000 0.000000000
023 5399.85 206 1.2875 93 000000000000000000 0.000000000 0.000000000
024 5026.75 206 1.2875 83 000000000000000000 0.000000000 0.000000000
025 3939.37 206 1.2875 83 000000000000000000 0.000000000 0.000000000
026 4202.00 206 1.2875 81 000000000000000000 0.000000000 0.000000000
027 3716.54 206 1.2875 81 000000000000000000 0.000000000 0.000000000
028 3243.91 206 1.2875 81 000000000000000000 0.000000000 0.000000000
029 4669.26 206 1.2875 81 000000000000000000 0.000000000 0.000000000
030 3582.44 206 1.2875 81 000000000000000000 0.000000000 0.000000000
031 4033.24 206 1.2875 81 000000000000000000 0.000000000 0.000000000
Package[0] Cores Uncore Memory Platform
Energy(J): 208.384918213 200.727081299 0.000000000 0.000000000 0.000000000
Power(W) : 208.384918213 200.727081299 0.000000000 0.000000000 0.000000000
Zen UMC [14E0]
Controller #0 Disabled
corefreq-cli -v
1.94.0So is the primary terminal view supposed to show voltage? All mine shows is 0.0 in the bottom right corner.
cyring
commented
1 year ago So is the primary terminal view supposed to show voltage? All mine shows is 0.0 in the bottom right corner.
This voltage aggregation is not programmed yet for Zen4
Meanwhile you can switch to the Voltage view from menu.
About the UMC something is odd, it has been working with @Jon0 Not sure if it's a code regression but I don't find any.
@Jon0 : can you please pull latest develop branch and post the UMC ?
cyring
commented
1 year ago @KeithMyers : can you build as below and tell if UMC is showing up ? ... then reload CoreFreq from the working directory.
make ARCH_PMC=UMC clean allSo is the primary terminal view supposed to show voltage? All mine shows is 0.0 in the bottom right corner.
This voltage aggregation is not programmed yet for Zen4 Meanwhile you can switch to the
Voltageview from menu.About the UMC something is odd, it has been working with @Jon0 Not sure if it's a code regression but I don't find any.
@Jon0 : can you please pull latest
developbranch and post the UMC ?
I guess I need to go reread the docs.
What menu?? I don't see any menu or prompts for keystrokes to pull up a menu from the cli view. I know you can use a command parameter to show voltages. But haven't figured out how to do anything in the cli terminal "top"- like view.
KeithMyers
commented
1 year ago @KeithMyers : can you build as below and tell if UMC is showing up ? ... then reload CoreFreq from the working directory.
make ARCH_PMC=UMC clean all
Maybe doesn't work because of all the build errors?
root@Pipsqueek:/home/keith/Downloads/CoreFreq-develop# make ARCH_PMC=UMC clean all
rm -f corefreqd corefreq-cli
make -j1 -C /lib/modules/5.15.0-56-generic/build M=/home/keith/Downloads/CoreFreq-develop clean
make[1]: Entering directory '/usr/src/linux-headers-5.15.0-56-generic'
CLEAN /home/keith/Downloads/CoreFreq-develop/Module.symvers
make[1]: Leaving directory '/usr/src/linux-headers-5.15.0-56-generic'
cc -Wall -Wfatal-errors -pthread -c corefreqd.c \
-D CORE_COUNT=256 -D TASK_ORDER=5 -D MAX_FREQ_HZ=6575000000 -D UBENCH=0 -D DELAY_TSC=1 -D ARCH_PMC=UMC \
-o corefreqd.o
cc -Wall -Wfatal-errors -c corefreqm.c \
-D CORE_COUNT=256 -D TASK_ORDER=5 -D MAX_FREQ_HZ=6575000000 -D UBENCH=0 -D DELAY_TSC=1 -D ARCH_PMC=UMC \
-o corefreqm.o
cc -Wall -Wfatal-errors corefreqd.c corefreqm.c \
-D CORE_COUNT=256 -D TASK_ORDER=5 -D MAX_FREQ_HZ=6575000000 -D UBENCH=0 -D DELAY_TSC=1 -D ARCH_PMC=UMC \
-o corefreqd -lpthread -lm -lrt
cc -Wall -Wfatal-errors -c corefreq-cli.c \
-D CORE_COUNT=256 -D TASK_ORDER=5 -D MAX_FREQ_HZ=6575000000 -D UBENCH=0 -D DELAY_TSC=1 -D ARCH_PMC=UMC \
-o corefreq-cli.o
cc -Wall -Wfatal-errors -c corefreq-ui.c \
-D CORE_COUNT=256 -D TASK_ORDER=5 -D MAX_FREQ_HZ=6575000000 -D UBENCH=0 -D DELAY_TSC=1 -D ARCH_PMC=UMC \
-o corefreq-ui.o
cc -Wall -Wfatal-errors -c corefreq-cli-rsc.c \
-D CORE_COUNT=256 -D TASK_ORDER=5 -D MAX_FREQ_HZ=6575000000 -D UBENCH=0 -D DELAY_TSC=1 -D ARCH_PMC=UMC \
-o corefreq-cli-rsc.o
cc -Wall -Wfatal-errors -c corefreq-cli-json.c \
-D CORE_COUNT=256 -D TASK_ORDER=5 -D MAX_FREQ_HZ=6575000000 -D UBENCH=0 -D DELAY_TSC=1 -D ARCH_PMC=UMC \
-o corefreq-cli-json.o
cc -Wall -Wfatal-errors -c corefreq-cli-extra.c \
-D CORE_COUNT=256 -D TASK_ORDER=5 -D MAX_FREQ_HZ=6575000000 -D UBENCH=0 -D DELAY_TSC=1 -D ARCH_PMC=UMC \
-o corefreq-cli-extra.o
cc -Wall -Wfatal-errors \
corefreq-cli.c corefreq-ui.c corefreq-cli-rsc.c \
corefreq-cli-json.c corefreq-cli-extra.c \
-D CORE_COUNT=256 -D TASK_ORDER=5 -D MAX_FREQ_HZ=6575000000 -D UBENCH=0 -D DELAY_TSC=1 -D ARCH_PMC=UMC \
-o corefreq-cli -lm -lrt
make -j1 -C /lib/modules/5.15.0-56-generic/build M=/home/keith/Downloads/CoreFreq-develop modules
make[1]: Entering directory '/usr/src/linux-headers-5.15.0-56-generic'
CC [M] /home/keith/Downloads/CoreFreq-develop/corefreqk.o
MODPOST /home/keith/Downloads/CoreFreq-develop/Module.symvers
CC [M] /home/keith/Downloads/CoreFreq-develop/corefreqk.mod.o
LD [M] /home/keith/Downloads/CoreFreq-develop/corefreqk.ko
BTF [M] /home/keith/Downloads/CoreFreq-develop/corefreqk.ko
Skipping BTF generation for /home/keith/Downloads/CoreFreq-develop/corefreqk.ko due to unavailability of vmlinux
make[1]: Leaving directory '/usr/src/linux-headers-5.15.0-56-generic'@KeithMyers
Menus are opened using function keys F2 or F3 or F4 as direct entries.
Except the Skipping BTF warning, I don't see a building error.
Build is OK if you're getting the 3 binaries corefreqk.ko, corefreqd and corefreq-cli
To avoid API mismatch, you have to uninstall any previous CoreFreq package of your distribution, if any.
Using the develop branch, makes sure to run from the build directory.
Don't build as root.
For the driver
modprobe and use insmod ./corefreqk.koFor the daemon
./corefreqdFor the client
./corefreq-cliIn Github, use 3 anti-quotes before and after the code you're pasting.
KeithMyers
commented
1 year ago OK, I built the dev package as user first. Got the same errors so then tried as root to see if it made any difference.
No distro provided corefreq package provided or ever installed so no API mismatch.
I've built custom modules before and they normally build clean except for the skipping BTF warning.
I've been following the readme so using insmod for the module insertion.
Still not seeing my memory controller with the make ARCH_PMC=UMC clean all version of the build.
Thanks for the help on the menu commands. I accidentally brushed the F keys on the keyboard and voila a menu popped up. So good to go now in navigating the cli interface.
Jon0
commented
1 year ago Heres latest develop branch, BIOS set to 6000M/T
Processor [AMD Ryzen 9 7950X 16-Core Processor]
|- Architecture [Zen4/Raphael]
|- Vendor ID [AuthenticAMD]
|- Microcode [0x0a601203]
|- Signature [ AF_61]
|- Stepping [ 2]
|- Online CPU [ 32/ 32]
|- Base Clock [100.000]
|- Frequency (MHz) Ratio
Min 3000.00 < 30 >
Max 4500.00 < 45 >
|- Factory [100.000]
4500 [ 45 ]
|- Performance
|- P-State
TGT 4500.00 < 45 >
|- CPPC
Min 3700.00 < 37 >
Max 1900.00 < 19 >
TGT 1900.00 < 19 >
|- Turbo Boost [ UNLOCK]
XFR 5800.00 [ 58 ]
CPB 5700.00 [ 57 ]
1C 3000.00 < 30 >
|- Uncore [ LOCK]
CLK 1000.00 [ 10 ]
MEM 3000.00 [ 30 ]
Instruction Set Extensions
|- 3DNow!/Ext [N/N] ADX [Y] AES [Y] AVX/AVX2 [Y/Y]
|- AVX512-F [Y] AVX512-DQ [Y] AVX512-IFMA [Y] AVX512-PF [N]
|- AVX512-ER [N] AVX512-CD [Y] AVX512-BW [Y] AVX512-VL [Y]
|- AVX512-VBMI [Y] AVX512-VBMI2 [Y] AVX512-VNNI [Y] AVX512-ALG [Y]
|- AVX512-VPOP [Y] AVX512-VNNIW [N] AVX512-FMAPS [N] AVX512-VP2I [N]
|- AVX512-BF16 [Y] AVX-VNNI-VEX [N] AVX-FP128 [N] AVX-FP256 [Y]
|- BMI1/BMI2 [Y/Y] CLWB [Y] CLFLUSH [Y] CLFLUSH-OPT [Y]
|- CLAC-STAC [Y] CMOV [Y] CMPXCHG8B [Y] CMPXCHG16B [Y]
|- F16C [Y] FPU [Y] FXSR [Y] LAHF-SAHF [Y]
|- MMX/Ext [Y/Y] MON/MWAITX [Y/Y] MOVBE [Y] PCLMULQDQ [Y]
|- POPCNT [Y] RDRAND [Y] RDSEED [Y] RDTSCP [Y]
|- SEP [Y] SHA [Y] SSE [Y] SSE2 [Y]
|- SSE3 [Y] SSSE3 [Y] SSE4.1/4A [Y/Y] SSE4.2 [Y]
|- SERIALIZE [N] SYSCALL [Y] RDPID [Y] UMIP [Y]
|- VAES [Y] VPCLMULQDQ [Y] PREFETCH/W [Y] LZCNT [Y]
Features
|- 1 GB Pages Support 1GB-PAGES [Capable]
|- 100 MHz multiplier Control 100MHzSteps [Missing]
|- Advanced Configuration & Power Interface ACPI [Capable]
|- Advanced Programmable Interrupt Controller APIC [Capable]
|- Advanced Virtual Interrupt Controller AVIC [Capable]
|- APIC Timer Invariance ARAT [Capable]
|- Clear Zero Instruction CLZERO [Capable]
|- Core Multi-Processing CMP Legacy [Capable]
|- L1 Data Cache Context ID CNXT-ID [Missing]
|- Collaborative Processor Performance Control CPPC [Capable]
|- Direct Cache Access DCA [Missing]
|- Debugging Extension DE [Capable]
|- Debug Store & Precise Event Based Sampling DS, PEBS [Missing]
|- CPL Qualified Debug Store DS-CPL [Missing]
|- 64-Bit Debug Store DTES64 [Missing]
|- Fast Short REP MOVSB FSRM [Capable]
|- Fast-String Operation ERMS [Capable]
|- Fused Multiply Add FMA | FMA4 [Capable]
|- Hardware Lock Elision HLE [Missing]
|- Hardware P-state control HwP [Capable]
|- Instruction Based Sampling IBS [Capable]
|- Instruction INVLPGB INVLPGB [Missing]
|- Instruction INVPCID INVPCID [Capable]
|- Long Mode 64 bits IA64 | LM [Capable]
|- LightWeight Profiling LWP [Missing]
|- Memory Bandwidth Enforcement MBE [Capable]
|- Machine-Check Architecture MCA [Capable]
|- Instruction MCOMMIT MCOMMIT [Missing]
|- Memory Protection Extensions MPX [Missing]
|- Model Specific Registers MSR [Capable]
|- Memory Type Range Registers MTRR [Capable]
|- No-Execute Page Protection NX [Capable]
|- OS-Enabled Ext. State Management OSXSAVE [Capable]
|- Physical Address Extension PAE [Capable]
|- Page Attribute Table PAT [Capable]
|- Pending Break Enable PBE [Missing]
|- Process Context Identifiers PCID [Missing]
|- Perfmon and Debug Capability PDCM [Missing]
|- Page Global Enable PGE [Capable]
|- Page Size Extension PSE [Capable]
|- 36-bit Page Size Extension PSE36 [Capable]
|- Processor Serial Number PSN [Missing]
|- Resource Director Technology/PQE RDT-A [Capable]
|- Resource Director Technology/PQM RDT-M [Capable]
|- Read Processor Register at User level RDPRU [Capable]
|- Restricted Transactional Memory RTM [Missing]
|- Safer Mode Extensions SMX [Missing]
|- Self-Snoop SS [Missing]
|- Supervisor-Mode Access Prevention SMAP [Capable]
|- Supervisor-Mode Execution Prevention SMEP [Capable]
|- Time Stamp Counter TSC [Invariant]
|- Time Stamp Counter Deadline TSC-DEADLINE [Missing]
|- TSX Force Abort MSR Register TSX-ABORT [Missing]
|- TSX Suspend Load Address Tracking TSX-LDTRK [Missing]
|- User-Mode Instruction Prevention UMIP [Capable]
|- Virtual Mode Extension VME [Capable]
|- Virtual Machine Extensions VMX [Missing]
|- Write Back & Do Not Invalidate Cache WBNOINVD [Capable]
|- Extended xAPIC Support x2APIC [ xAPIC]
|- AVIC controller for x2APIC x2AVIC [Capable]
|- XSAVE/XSTOR States XSAVE [Capable]
|- xTPR Update Control xTPR [Missing]
Mitigation mechanisms
|- Indirect Branch Restricted Speculation IBRS [Capable]
|- IBRS Always-On preferred by processor [ Unable]
|- IBRS preferred over software solution [Capable]
|- IBRS provides same speculation limits [Capable]
|- Indirect Branch Prediction Barrier IBPB [Capable]
|- Single Thread Indirect Branch Predictor STIBP [ Enable]
|- Speculative Store Bypass Disable SSBD [Capable]
|- SSBD use VIRT_SPEC_CTRL register [ Unable]
|- SSBD not needed on this processor [ Unable]
|- No Branch Type Confusion BTC_NO [ Unable]
|- BTC on Non-Branch instruction BTC-NOBR [Capable]
|- Arch - No Fast Predictive Store Forwarding PSFD [Capable]
Security Features
|- Secure Init and Jump with Attestation SKINIT [Capable]
|- Secure Encrypted Virtualization SEV [Missing]
|- SEV - Encrypted State SEV-ES [Missing]
|- SEV - Secure Nested Paging SEV-SNP [Missing]
|- Guest Mode Execute Trap GMET [Capable]
|- Supervisor Shadow Stack SSS [Capable]
|- VM Permission Levels VMPL [Missing]
|- VMPL Supervisor Shadow Stack VMPL-SSS [Missing]
|- Secure Multi-Key Memory Encryption SME-MK [Missing]
Technologies
|- Instruction Cache Unit
|- L1 IP Prefetcher L1 HW IP < ON>
|- Data Cache Unit
|- L1 Prefetcher L1 HW < ON>
|- L2 Prefetcher L2 HW < ON>
|- System Management Mode SMM-Lock [ ON]
|- Simultaneous Multithreading SMT [ ON]
|- PowerNow! CnQ [ ON]
|- Core C-States CCx [ ON]
|- Core Performance Boost CPB < ON>
|- Watchdog Timer WDT <OFF>
|- Virtualization SVM [ ON]
|- I/O MMU AMD-V [ ON]
|- Version [ 0.1]
|- Hypervisor [OFF]
|- Vendor ID [ N/A]
Performance Monitoring
|- Version PM [ 2]
|- Counters: General Fixed
| { 6, 6, 16 } x 48 bits 3 x 64 bits
|- Enhanced Halt State C1E <OFF>
|- C2 UnDemotion C2U < ON>
|- C3 UnDemotion C3U < ON>
|- Core C6 State CC6 < ON>
|- Package C6 State PC6 < ON>
|- Legacy Frequency ID control FID [OFF]
|- Legacy Voltage ID control VID [OFF]
|- P-State Hardware Coordination Feedback MPERF/APERF [ ON]
|- Core C-States
|- C-States Base Address BAR [ 0x413 ]
|- ACPI Processor C-States _CST [ 3]
|- MONITOR/MWAIT
|- State index: #0 #1 #2 #3 #4 #5 #6 #7
|- Sub C-State: 1 1 0 0 0 0 0 0
|- Core Cycles [Capable]
|- Instructions Retired [Capable]
|- Reference Cycles [Capable]
|- Last Level Cache References [Capable]
|- Global Time Stamp Counter [Missing]
|- Data Fabric Performance Counter [Capable]
|- Core Performance Counter [Capable]
|- Processor Performance Control _PCT [ Enable]
|- Performance Supported States _PSS [ 2]
|- Performance Present Capabilities _PPC [ 0]
|- Continuous Performance Control _CPC [Missing]
|- Collaborative Processor Performance Control CPPC < ON>
|- Capabilities Lowest Efficient Guaranteed Highest
|- CPU #0 300.00 ( 3) 1900.00 ( 19) 2800.00 ( 28) 5300.00 ( 53)
|- CPU #1 300.00 ( 3) 1900.00 ( 19) 2800.00 ( 28) 5300.00 ( 53)
|- CPU #2 300.00 ( 3) 1900.00 ( 19) 2800.00 ( 28) 4900.00 ( 49)
|- CPU #3 300.00 ( 3) 1900.00 ( 19) 2800.00 ( 28) 4600.00 ( 46)
|- CPU #4 300.00 ( 3) 1900.00 ( 19) 2800.00 ( 28) 4700.00 ( 47)
|- CPU #5 300.00 ( 3) 1900.00 ( 19) 2800.00 ( 28) 4800.00 ( 48)
|- CPU #6 300.00 ( 3) 1900.00 ( 19) 2800.00 ( 28) 5200.00 ( 52)
|- CPU #7 300.00 ( 3) 1899.97 ( 19) 2799.96 ( 28) 5099.93 ( 51)
|- CPU #8 300.00 ( 3) 1899.99 ( 19) 2799.98 ( 28) 4299.97 ( 43)
|- CPU #9 300.00 ( 3) 1899.99 ( 19) 2799.98 ( 28) 4399.97 ( 44)
|- CPU #10 300.00 ( 3) 1899.99 ( 19) 2799.98 ( 28) 3799.98 ( 38)
|- CPU #11 300.00 ( 3) 1899.99 ( 19) 2799.98 ( 28) 3999.98 ( 40)
|- CPU #12 300.00 ( 3) 1899.99 ( 19) 2799.99 ( 28) 4499.98 ( 45)
|- CPU #13 300.00 ( 3) 1899.99 ( 19) 2799.99 ( 28) 4199.98 ( 42)
|- CPU #14 300.00 ( 3) 1899.99 ( 19) 2799.99 ( 28) 3699.98 ( 37)
|- CPU #15 300.00 ( 3) 1899.99 ( 19) 2799.98 ( 28) 3899.98 ( 39)
|- CPU #16 300.00 ( 3) 1899.97 ( 19) 2799.96 ( 28) 5299.92 ( 53)
|- CPU #17 300.00 ( 3) 1900.01 ( 19) 2800.01 ( 28) 5300.02 ( 53)
|- CPU #18 300.00 ( 3) 1899.97 ( 19) 2799.96 ( 28) 4899.93 ( 49)
|- CPU #19 300.00 ( 3) 1899.99 ( 19) 2799.99 ( 28) 4599.98 ( 46)
|- CPU #20 300.00 ( 3) 1899.99 ( 19) 2799.98 ( 28) 4699.97 ( 47)
|- CPU #21 300.00 ( 3) 1900.01 ( 19) 2800.01 ( 28) 4800.02 ( 48)
|- CPU #22 300.00 ( 3) 1899.99 ( 19) 2799.98 ( 28) 5199.97 ( 52)
|- CPU #23 300.00 ( 3) 1899.97 ( 19) 2799.96 ( 28) 5099.93 ( 51)
|- CPU #24 300.00 ( 3) 1899.99 ( 19) 2799.99 ( 28) 4299.98 ( 43)
|- CPU #25 300.00 ( 3) 1899.99 ( 19) 2799.99 ( 28) 4399.98 ( 44)
|- CPU #26 300.00 ( 3) 1899.99 ( 19) 2799.99 ( 28) 3799.98 ( 38)
|- CPU #27 300.00 ( 3) 1899.99 ( 19) 2799.99 ( 28) 3999.98 ( 40)
|- CPU #28 300.00 ( 3) 1899.99 ( 19) 2799.99 ( 28) 4499.98 ( 45)
|- CPU #29 300.00 ( 3) 1899.99 ( 19) 2799.99 ( 28) 4199.99 ( 42)
|- CPU #30 300.00 ( 3) 1899.99 ( 19) 2799.99 ( 28) 3699.98 ( 37)
|- CPU #31 300.00 ( 3) 1899.99 ( 19) 2799.99 ( 28) 3899.98 ( 39)
Power, Current & Thermal
|- Temperature Offset:Junction TjMax [ 49: 0 C]
|- CPPC Energy Preference EPP < 0>
|- Digital Thermal Sensor DTS [Capable]
|- Power Limit Notification PLN [Missing]
|- Package Thermal Management PTM [Missing]
|- Thermal Monitor 1 TTP [ Enable]
|- Thermal Monitor 2 HTC [ Enable]
|- Thermal Design Power TDP [Missing]
|- Minimum Power Min [Missing]
|- Maximum Power Max [Missing]
|- Thermal Design Power Package [Disable]
|- Power Limit PL1 [ 0 W]
|- Time Window TW1 [ 0 ns]
|- Power Limit PL2 [ 0 W]
|- Time Window TW2 [ 0 ns]
|- Thermal Design Power Core [Disable]
|- Power Limit PL1 [ 0 W]
|- Time Window TW1 [ 0 ns]
|- Thermal Design Power Uncore [Disable]
|- Power Limit PL1 [ 0 W]
|- Time Window TW1 [ 0 ns]
|- Thermal Design Power DRAM [Disable]
|- Power Limit PL1 [ 0 W]
|- Time Window TW1 [ 0 ns]
|- Thermal Design Power Platform [Disable]
|- Power Limit PL1 [ 0 W]
|- Time Window TW1 [ 0 ns]
|- Power Limit PL2 [ 0 W]
|- Time Window TW2 [ 0 ns]
|- Package Power Tracking PPT [Missing]
|- Electrical Design Current EDC [Missing]
|- Thermal Design Current TDC [Missing]
|- Core Thermal Point
|- Package Thermal Point
|- Thermal Monitor Trip Limit [ 115 C]
|- HTC Temperature Limit Limit [ 127 C]
|- HTC Temperature Hysteresis Threshold [ 2 C]
|- Units
|- Power watt [ Missing]
|- Energy joule [ 0.000015259]
|- Window second [ 0.000976562]
CPU Freq(MHz) VID Vcore TMP(C) Accumulator Energy(J) Power(W)
000 5.83 98 0.6125 24 000000000000002191 0.033432007 0.033432007
001 3.23 99 0.6188 24 000000000000002369 0.036148071 0.036148071
002 1.62 99 0.6188 24 000000000000001082 0.016510010 0.016510010
003 1.50 99 0.6188 23 000000000000001898 0.028961182 0.028961182
004 8.08 99 0.6188 24 000000000000003872 0.059082031 0.059082031
005 25.76 99 0.6188 24 000000000000006548 0.099914551 0.099914551
006 14.26 99 0.6188 23 000000000000004693 0.071609497 0.071609497
007 1.22 99 0.6188 23 000000000000001559 0.023788452 0.023788452
008 2.20 99 0.6188 25 000000000000001234 0.018829346 0.018829346
009 3.13 100 0.6250 25 000000000000002575 0.039291382 0.039291382
010 6.43 100 0.6250 25 000000000000003591 0.054794312 0.054794312
011 20.80 100 0.6250 25 000000000000003723 0.056808472 0.056808472
012 5.14 99 0.6188 25 000000000000006868 0.104797363 0.104797363
013 3.73 100 0.6250 25 000000000000007801 0.119033813 0.119033813
014 2.60 100 0.6250 25 000000000000001557 0.023757935 0.023757935
015 9.06 100 0.6250 25 000000000000006944 0.105957031 0.105957031
016 1.71 98 0.6125 24 000000000000000000 0.000000000 0.000000000
017 1.45 99 0.6188 24 000000000000000000 0.000000000 0.000000000
018 1.18 99 0.6188 24 000000000000000000 0.000000000 0.000000000
019 3.32 99 0.6188 24 000000000000000000 0.000000000 0.000000000
020 2.43 99 0.6188 23 000000000000000000 0.000000000 0.000000000
021 1.23 79 0.4938 23 000000000000000000 0.000000000 0.000000000
022 1.96 99 0.6188 24 000000000000000000 0.000000000 0.000000000
023 1.14 99 0.6188 23 000000000000000000 0.000000000 0.000000000
024 1.23 99 0.6188 25 000000000000000000 0.000000000 0.000000000
025 2.13 100 0.6250 25 000000000000000000 0.000000000 0.000000000
026 1.24 100 0.6250 25 000000000000000000 0.000000000 0.000000000
027 2.15 100 0.6250 25 000000000000000000 0.000000000 0.000000000
028 8.04 99 0.6188 25 000000000000000000 0.000000000 0.000000000
029 25.89 100 0.6250 25 000000000000000000 0.000000000 0.000000000
030 1.20 100 0.6250 25 000000000000000000 0.000000000 0.000000000
031 8.49 100 0.6250 25 000000000000000000 0.000000000 0.000000000
Package[0] Cores Uncore Memory Platform
Energy(J): 28.682907104 0.892715454 0.000000000 0.000000000 0.000000000
Power(W) : 28.682907104 0.892715454 0.000000000 0.000000000 0.000000000
Zen UMC [14E0]
Controller #0 Dual Channel
Bus Rate 3000 MHz Bus Speed 3000 MHz DDR5 Speed 6000 MT/s
Cha CL RCDr RCDw RP RAS RC RRDs RRDl FAW WTRs WTRl WR clRR clWW
#0 40 40 40 40 77 146 8 15 32 8 30 90 8 23
#1 40 40 40 40 77 146 8 15 32 8 30 90 8 23
CWL RTP RdWr WrRd scWW sdWW ddWW scRR sdRR ddRR drRR drWW drWR drRRD
#0 38 23 21 8 1 15 15 1 8 8 0 0 0 0
#1 38 23 22 8 1 15 15 1 8 8 0 0 0 0
REFI RFC1 RFC2 RFC4 RCPB RPPB BGS:Alt Ban Page CKE CMD GDM ECC
#0 11677 312 192 0 0 0 ON OFF R0W0 0 0 1T ON 0
#1 11677 312 192 0 0 0 ON OFF R0W0 0 0 1T ON 0
MRD:PDA MOD:PDA WRMPR STAG PDM RDDATA WRD WRL RDL XS XP CPDED
#0 42 32 42 32 24 7 0:F:0 28 6 26 36 914 23 15
#1 42 32 42 32 24 7 0:F:0 28 6 26 36 914 23 15
DIMM Geometry for channel #0
Slot Bank Rank Rows Columns Memory Size (MB)
#0
#1 16 1 32768 1024 4096 CMK32GX5M2B6000C40
DIMM Geometry for channel #1
Slot Bank Rank Rows Columns Memory Size (MB)
#0
#1 16 1 32768 1024 4096 CMK32GX5M2B6000C40Just in case it wasn't running the dev version. Here is the output of version 1.94.0 again
keith@Pipsqueek:~/Downloads/CoreFreq-develop$ ./corefreq-cli -s -n -C 1 -n -M
Processor [AMD Ryzen 9 7950X 16-Core Processor]
|- Architecture [Zen4/Raphael]
|- Vendor ID [AuthenticAMD]
|- Microcode [0x0a601203]
|- Signature [ AF_61]
|- Stepping [ 2]
|- Online CPU [ 32/ 32]
|- Base Clock [ 99.949]
|- Frequency (MHz) Ratio
Min 2998.46 < 30 >
Max 4497.69 < 45 >
|- Factory [100.000]
4500 [ 45 ]
|- Performance
|- P-State
TGT 4497.69 < 45 >
|- CPPC
Min 3698.10 < 37 >
Max 1899.02 < 19 >
TGT 1899.02 < 19 >
|- Turbo Boost [ UNLOCK]
XFR 5797.02 [ 58 ]
CPB 5697.07 [ 57 ]
1C 2998.46 < 30 >
|- Uncore [ LOCK]
Instruction Set Extensions
|- 3DNow!/Ext [N/N] ADX [Y] AES [Y] AVX/AVX2 [Y/Y]
|- AVX512-F [Y] AVX512-DQ [Y] AVX512-IFMA [Y] AVX512-PF [N]
|- AVX512-ER [N] AVX512-CD [Y] AVX512-BW [Y] AVX512-VL [Y]
|- AVX512-VBMI [Y] AVX512-VBMI2 [Y] AVX512-VNNI [Y] AVX512-ALG [Y]
|- AVX512-VPOP [Y] AVX512-VNNIW [N] AVX512-FMAPS [N] AVX512-VP2I [N]
|- AVX512-BF16 [Y] AVX-VNNI-VEX [N] AVX-FP128 [N] AVX-FP256 [Y]
|- BMI1/BMI2 [Y/Y] CLWB [Y] CLFLUSH [Y] CLFLUSH-OPT [Y]
|- CLAC-STAC [Y] CMOV [Y] CMPXCHG8B [Y] CMPXCHG16B [Y]
|- F16C [Y] FPU [Y] FXSR [Y] LAHF-SAHF [Y]
|- MMX/Ext [Y/Y] MON/MWAITX [Y/Y] MOVBE [Y] PCLMULQDQ [Y]
|- POPCNT [Y] RDRAND [Y] RDSEED [Y] RDTSCP [Y]
|- SEP [Y] SHA [Y] SSE [Y] SSE2 [Y]
|- SSE3 [Y] SSSE3 [Y] SSE4.1/4A [Y/Y] SSE4.2 [Y]
|- SERIALIZE [N] SYSCALL [Y] RDPID [Y] UMIP [Y]
|- VAES [Y] VPCLMULQDQ [Y] PREFETCH/W [Y] LZCNT [Y]
Features
|- 1 GB Pages Support 1GB-PAGES [Capable]
|- 100 MHz multiplier Control 100MHzSteps [Missing]
|- Advanced Configuration & Power Interface ACPI [Capable]
|- Advanced Programmable Interrupt Controller APIC [Capable]
|- Advanced Virtual Interrupt Controller AVIC [Capable]
|- APIC Timer Invariance ARAT [Capable]
|- Clear Zero Instruction CLZERO [Capable]
|- Core Multi-Processing CMP Legacy [Capable]
|- L1 Data Cache Context ID CNXT-ID [Missing]
|- Collaborative Processor Performance Control CPPC [Capable]
|- Direct Cache Access DCA [Missing]
|- Debugging Extension DE [Capable]
|- Debug Store & Precise Event Based Sampling DS, PEBS [Missing]
|- CPL Qualified Debug Store DS-CPL [Missing]
|- 64-Bit Debug Store DTES64 [Missing]
|- Fast Short REP MOVSB FSRM [Capable]
|- Fast-String Operation ERMS [Capable]
|- Fused Multiply Add FMA | FMA4 [Capable]
|- Hardware Lock Elision HLE [Missing]
|- Hardware P-state control HwP [Capable]
|- Instruction Based Sampling IBS [Capable]
|- Instruction INVLPGB INVLPGB [Missing]
|- Instruction INVPCID INVPCID [Capable]
|- Long Mode 64 bits IA64 | LM [Capable]
|- LightWeight Profiling LWP [Missing]
|- Memory Bandwidth Enforcement MBE [Capable]
|- Machine-Check Architecture MCA [Capable]
|- Instruction MCOMMIT MCOMMIT [Missing]
|- Memory Protection Extensions MPX [Missing]
|- Model Specific Registers MSR [Capable]
|- Memory Type Range Registers MTRR [Capable]
|- No-Execute Page Protection NX [Capable]
|- OS-Enabled Ext. State Management OSXSAVE [Capable]
|- Physical Address Extension PAE [Capable]
|- Page Attribute Table PAT [Capable]
|- Pending Break Enable PBE [Missing]
|- Process Context Identifiers PCID [Missing]
|- Perfmon and Debug Capability PDCM [Missing]
|- Page Global Enable PGE [Capable]
|- Page Size Extension PSE [Capable]
|- 36-bit Page Size Extension PSE36 [Capable]
|- Processor Serial Number PSN [Missing]
|- Resource Director Technology/PQE RDT-A [Capable]
|- Resource Director Technology/PQM RDT-M [Capable]
|- Read Processor Register at User level RDPRU [Capable]
|- Restricted Transactional Memory RTM [Missing]
|- Safer Mode Extensions SMX [Missing]
|- Self-Snoop SS [Missing]
|- Supervisor-Mode Access Prevention SMAP [Capable]
|- Supervisor-Mode Execution Prevention SMEP [Capable]
|- Time Stamp Counter TSC [Invariant]
|- Time Stamp Counter Deadline TSC-DEADLINE [Missing]
|- TSX Force Abort MSR Register TSX-ABORT [Missing]
|- TSX Suspend Load Address Tracking TSX-LDTRK [Missing]
|- User-Mode Instruction Prevention UMIP [Capable]
|- Virtual Mode Extension VME [Capable]
|- Virtual Machine Extensions VMX [Missing]
|- Write Back & Do Not Invalidate Cache WBNOINVD [Capable]
|- Extended xAPIC Support x2APIC [ xAPIC]
|- AVIC controller for x2APIC x2AVIC [Capable]
|- XSAVE/XSTOR States XSAVE [Capable]
|- xTPR Update Control xTPR [Missing]
Mitigation mechanisms
|- Indirect Branch Restricted Speculation IBRS [Capable]
|- IBRS Always-On preferred by processor [ Unable]
|- IBRS preferred over software solution [Capable]
|- IBRS provides same speculation limits [Capable]
|- Indirect Branch Prediction Barrier IBPB [Capable]
|- Single Thread Indirect Branch Predictor STIBP [ Enable]
|- Speculative Store Bypass Disable SSBD [Capable]
|- SSBD use VIRT_SPEC_CTRL register [ Unable]
|- SSBD not needed on this processor [ Unable]
|- No Branch Type Confusion BTC_NO [ Unable]
|- BTC on Non-Branch instruction BTC-NOBR [Capable]
|- Arch - No Fast Predictive Store Forwarding PSFD [Capable]
Security Features
|- Secure Init and Jump with Attestation SKINIT [Capable]
|- Secure Encrypted Virtualization SEV [Missing]
|- SEV - Encrypted State SEV-ES [Missing]
|- SEV - Secure Nested Paging SEV-SNP [Missing]
|- Guest Mode Execute Trap GMET [Capable]
|- Supervisor Shadow Stack SSS [Capable]
|- VM Permission Levels VMPL [Missing]
|- VMPL Supervisor Shadow Stack VMPL-SSS [Missing]
|- Secure Multi-Key Memory Encryption SME-MK [Missing]
Technologies
|- Instruction Cache Unit
|- L1 IP Prefetcher L1 HW IP < ON>
|- Data Cache Unit
|- L1 Prefetcher L1 HW < ON>
|- L2 Prefetcher L2 HW < ON>
|- System Management Mode SMM-Lock [ ON]
|- Simultaneous Multithreading SMT [ ON]
|- PowerNow! CnQ [OFF]
|- Core C-States CCx [ ON]
|- Core Performance Boost CPB < ON>
|- Watchdog Timer WDT <OFF>
|- Virtualization SVM [OFF]
|- I/O MMU AMD-V [OFF]
|- Version [ N/A]
|- Hypervisor [OFF]
|- Vendor ID [ N/A]
Performance Monitoring
|- Version PM [ 2]
|- Counters: General Fixed
| { 6, 6, 16 } x 48 bits 3 x 64 bits
|- Enhanced Halt State C1E <OFF>
|- C2 UnDemotion C2U < ON>
|- C3 UnDemotion C3U < ON>
|- Core C6 State CC6 < ON>
|- Package C6 State PC6 < ON>
|- Legacy Frequency ID control FID [OFF]
|- Legacy Voltage ID control VID [OFF]
|- P-State Hardware Coordination Feedback MPERF/APERF [ ON]
|- Core C-States
|- C-States Base Address BAR [ 0x413 ]
|- MONITOR/MWAIT
|- State index: #0 #1 #2 #3 #4 #5 #6 #7
|- Sub C-State: 1 1 0 0 0 0 0 0
|- Core Cycles [Capable]
|- Instructions Retired [Capable]
|- Reference Cycles [Capable]
|- Last Level Cache References [Capable]
|- Global Time Stamp Counter [Missing]
|- Data Fabric Performance Counter [Capable]
|- Core Performance Counter [Capable]
|- Continuous Performance Control _CPC [OFF]
|- Collaborative Processor Performance Control CPPC < ON>
|- Capabilities Lowest Efficient Guaranteed Highest
|- CPU #0 299.85 ( 3) 1899.02 ( 19) 2798.56 ( 28) 4597.64 ( 46)
|- CPU #1 299.85 ( 3) 1899.02 ( 19) 2798.56 ( 28) 5297.28 ( 53)
|- CPU #2 299.85 ( 3) 1899.03 ( 19) 2798.56 ( 28) 4797.54 ( 48)
|- CPU #3 299.85 ( 3) 1899.07 ( 19) 2798.63 ( 28) 5197.46 ( 52)
|- CPU #4 299.85 ( 3) 1899.03 ( 19) 2798.56 ( 28) 4697.59 ( 47)
|- CPU #5 299.85 ( 3) 1899.02 ( 19) 2798.56 ( 28) 5097.38 ( 51)
|- CPU #6 299.85 ( 3) 1899.02 ( 19) 2798.56 ( 28) 4897.48 ( 49)
|- CPU #7 299.85 ( 3) 1899.03 ( 19) 2798.56 ( 28) 5297.28 ( 53)
|- CPU #8 299.85 ( 3) 1899.02 ( 19) 2798.56 ( 28) 3698.10 ( 37)
|- CPU #9 299.85 ( 3) 1899.02 ( 19) 2798.56 ( 28) 4297.79 ( 43)
|- CPU #10 299.85 ( 3) 1899.03 ( 19) 2798.57 ( 28) 3997.95 ( 40)
|- CPU #11 299.85 ( 3) 1899.02 ( 19) 2798.56 ( 28) 4197.84 ( 42)
|- CPU #12 299.84 ( 3) 1899.01 ( 19) 2798.53 ( 28) 3897.96 ( 39)
|- CPU #13 299.85 ( 3) 1899.02 ( 19) 2798.56 ( 28) 4497.68 ( 45)
|- CPU #14 299.85 ( 3) 1899.02 ( 19) 2798.56 ( 28) 3798.05 ( 38)
|- CPU #15 299.84 ( 3) 1899.01 ( 19) 2798.54 ( 28) 4397.71 ( 44)
|- CPU #16 299.85 ( 3) 1899.02 ( 19) 2798.56 ( 28) 4597.64 ( 46)
|- CPU #17 299.85 ( 3) 1899.02 ( 19) 2798.56 ( 28) 5297.28 ( 53)
|- CPU #18 299.85 ( 3) 1899.02 ( 19) 2798.56 ( 28) 4797.53 ( 48)
|- CPU #19 299.85 ( 3) 1899.02 ( 19) 2798.56 ( 28) 5197.33 ( 52)
|- CPU #20 299.84 ( 3) 1899.01 ( 19) 2798.54 ( 28) 4697.54 ( 47)
|- CPU #21 299.85 ( 3) 1899.04 ( 19) 2798.58 ( 28) 5097.42 ( 51)
|- CPU #22 299.85 ( 3) 1899.02 ( 19) 2798.56 ( 28) 4897.48 ( 49)
|- CPU #23 299.85 ( 3) 1899.02 ( 19) 2798.56 ( 28) 5297.28 ( 53)
|- CPU #24 299.85 ( 3) 1899.02 ( 19) 2798.56 ( 28) 3698.10 ( 37)
|- CPU #25 299.85 ( 3) 1899.02 ( 19) 2798.56 ( 28) 4297.79 ( 43)
|- CPU #26 299.85 ( 3) 1899.02 ( 19) 2798.56 ( 28) 3997.95 ( 40)
|- CPU #27 299.84 ( 3) 1899.00 ( 19) 2798.52 ( 28) 4197.78 ( 42)
|- CPU #28 299.85 ( 3) 1899.02 ( 19) 2798.56 ( 28) 3898.00 ( 39)
|- CPU #29 299.85 ( 3) 1899.03 ( 19) 2798.57 ( 28) 4497.70 ( 45)
|- CPU #30 299.84 ( 3) 1899.01 ( 19) 2798.53 ( 28) 3798.01 ( 38)
|- CPU #31 299.85 ( 3) 1899.02 ( 19) 2798.56 ( 28) 4397.74 ( 44)
Power, Current & Thermal
|- Temperature Offset:Junction TjMax [ 49: 0 C]
|- CPPC Energy Preference EPP < 0>
|- Digital Thermal Sensor DTS [Capable]
|- Power Limit Notification PLN [Missing]
|- Package Thermal Management PTM [Missing]
|- Thermal Monitor 1 TTP [ Enable]
|- Thermal Monitor 2 HTC [ Enable]
|- Thermal Design Power TDP [Missing]
|- Minimum Power Min [Missing]
|- Maximum Power Max [Missing]
|- Thermal Design Power Package [Disable]
|- Power Limit PL1 [ 0 W]
|- Time Window TW1 [ 0 ns]
|- Power Limit PL2 [ 0 W]
|- Time Window TW2 [ 0 ns]
|- Thermal Design Power Core [Disable]
|- Power Limit PL1 [ 0 W]
|- Time Window TW1 [ 0 ns]
|- Thermal Design Power Uncore [Disable]
|- Power Limit PL1 [ 0 W]
|- Time Window TW1 [ 0 ns]
|- Thermal Design Power DRAM [Disable]
|- Power Limit PL1 [ 0 W]
|- Time Window TW1 [ 0 ns]
|- Thermal Design Power Platform [Disable]
|- Power Limit PL1 [ 0 W]
|- Time Window TW1 [ 0 ns]
|- Power Limit PL2 [ 0 W]
|- Time Window TW2 [ 0 ns]
|- Package Power Tracking PPT [Missing]
|- Electrical Design Current EDC [Missing]
|- Thermal Design Current TDC [Missing]
|- Core Thermal Point
|- Package Thermal Point
|- Thermal Monitor Trip Limit [ 115 C]
|- HTC Temperature Limit Limit [ 127 C]
|- HTC Temperature Hysteresis Threshold [ 2 C]
|- Units
|- Power watt [ Missing]
|- Energy joule [ 0.000015259]
|- Window second [ 0.000976562]
CPU Freq(MHz) VID Vcore TMP(C) Accumulator Energy(J) Power(W)
000 3688.00 207 1.2938 92 000000000000845904 12.907470703 12.907470703
001 5197.73 207 1.2938 92 000000000000925840 14.127197266 14.127197266
002 4625.62 207 1.2938 92 000000000000902063 13.764389038 13.764389038
003 4231.63 207 1.2938 92 000000000000969049 14.786514282 14.786514282
004 4296.83 207 1.2938 92 000000000000923249 14.087661743 14.087661743
005 5051.28 207 1.2938 92 000000000000938286 14.317108154 14.317108154
006 5197.74 207 1.2938 92 000000000000960346 14.653717041 14.653717041
007 5197.74 207 1.2938 92 000000000000997062 15.213958740 15.213958740
008 3505.03 207 1.2938 75 000000000000615235 9.387741089 9.387741089
009 3648.62 207 1.2938 75 000000000000582072 8.881713867 8.881713867
010 3723.62 207 1.2938 75 000000000000633924 9.672912598 9.672912598
011 2906.78 207 1.2938 75 000000000000558667 8.524581909 8.524581909
012 3065.57 207 1.2938 75 000000000000589475 8.994674683 8.994674683
013 4341.37 207 1.2938 75 000000000000612112 9.340087891 9.340087891
014 3464.36 207 1.2938 75 000000000000602458 9.192779541 9.192779541
015 3875.99 207 1.2938 75 000000000000577036 8.804870605 8.804870605
016 5197.74 207 1.2938 92 000000000000000000 0.000000000 0.000000000
017 5197.74 207 1.2938 92 000000000000000000 0.000000000 0.000000000
018 4016.58 207 1.2938 92 000000000000000000 0.000000000 0.000000000
019 5197.75 207 1.2938 92 000000000000000000 0.000000000 0.000000000
020 5197.71 207 1.2938 92 000000000000000000 0.000000000 0.000000000
021 3690.35 207 1.2938 92 000000000000000000 0.000000000 0.000000000
022 5197.74 207 1.2938 92 000000000000000000 0.000000000 0.000000000
023 5197.74 207 1.2938 92 000000000000000000 0.000000000 0.000000000
024 4507.04 207 1.2938 75 000000000000000000 0.000000000 0.000000000
025 3348.30 207 1.2938 75 000000000000000000 0.000000000 0.000000000
026 3942.06 207 1.2938 75 000000000000000000 0.000000000 0.000000000
027 3956.37 207 1.2938 75 000000000000000000 0.000000000 0.000000000
028 4702.22 207 1.2938 75 000000000000000000 0.000000000 0.000000000
029 3845.26 207 1.2938 75 000000000000000000 0.000000000 0.000000000
030 4096.15 207 1.2938 75 000000000000000000 0.000000000 0.000000000
031 4158.51 207 1.2938 75 000000000000000000 0.000000000 0.000000000
Package[0] Cores Uncore Memory Platform
Energy(J): 203.519165039 186.657379150 0.000000000 0.000000000 0.000000000
Power(W) : 203.519165039 186.657379150 0.000000000 0.000000000 0.000000000
Zen UMC [14E0]
Controller #0 Disabled Still no sign of an enable memory controller.
cyring
commented
1 year ago Really, I have a hard time to find a difference.
@Jon0 :
Processor [AMD Ryzen 9 7950X 16-Core Processor]
|- Architecture [Zen4/Raphael]
|- Vendor ID [AuthenticAMD]
|- Microcode [0x0a601203]
|- Signature [ AF_61]
|- Stepping [ 2]
|- Online CPU [ 32/ 32]@KeithMyers :
Processor [AMD Ryzen 9 7950X 16-Core Processor]
|- Architecture [Zen4/Raphael]
|- Vendor ID [AuthenticAMD]
|- Microcode [0x0a601203]
|- Signature [ AF_61]
|- Stepping [ 2]
|- Online CPU [ 32/ 32]Both, ASUS, not same model, but same X670E Chipset. But the Crosshair does not want to play well with the DID of UMC and the DID of IOMMU (unless disabled in BIOS)
@KeithMyers can you please post the output of :
corefreq-cli -Blspci -nndmidecode -t memoryKeithMyers
commented
1 year ago Yes, I have IOMMU disabled in the BIOS. Is that affecting the issue?
$ ./corefreq-cli -B
[ 0] American Megatrends Inc.
[ 1] 0805
[ 2] 11/04/2022
[ 3] ASUS
[ 4] System Product Name
[ 5] System Version
[ 6] S---e---e---l---m---
[ 7] SKU
[ 8] To be filled by O.E.M.
[ 9] ASUSTeK COMPUTER INC.
[10] ROG CROSSHAIR X670E HERO
[11] Rev 1.xx
[12] 2---0---7---4--
[13] Number Of Devices:4\Maximum Capacity:134217728 bytes
[14]
[15] DIMM 1\P0 CHANNEL A
[16]
[17] DIMM 1\P0 CHANNEL B
[18]
[19] Unknown
[20]
[21] Unknown
[22]
[23] F5-6000J3636F16G
[24]
[25] F5-6000J3636F16G
$ lspci -nn
00:00.0 Host bridge [0600]: Advanced Micro Devices, Inc. [AMD] Device [1022:14d8]
00:01.0 Host bridge [0600]: Advanced Micro Devices, Inc. [AMD] Device [1022:14da]
00:01.1 PCI bridge [0604]: Advanced Micro Devices, Inc. [AMD] Device [1022:14db]
00:01.2 PCI bridge [0604]: Advanced Micro Devices, Inc. [AMD] Device [1022:14db]
00:01.3 PCI bridge [0604]: Advanced Micro Devices, Inc. [AMD] Device [1022:14db]
00:02.0 Host bridge [0600]: Advanced Micro Devices, Inc. [AMD] Device [1022:14da]
00:02.1 PCI bridge [0604]: Advanced Micro Devices, Inc. [AMD] Device [1022:14db]
00:03.0 Host bridge [0600]: Advanced Micro Devices, Inc. [AMD] Device [1022:14da]
00:04.0 Host bridge [0600]: Advanced Micro Devices, Inc. [AMD] Device [1022:14da]
00:08.0 Host bridge [0600]: Advanced Micro Devices, Inc. [AMD] Device [1022:14da]
00:08.1 PCI bridge [0604]: Advanced Micro Devices, Inc. [AMD] Device [1022:14dd]
00:08.3 PCI bridge [0604]: Advanced Micro Devices, Inc. [AMD] Device [1022:14dd]
00:14.0 SMBus [0c05]: Advanced Micro Devices, Inc. [AMD] FCH SMBus Controller [1022:790b] (rev 71)
00:14.3 ISA bridge [0601]: Advanced Micro Devices, Inc. [AMD] FCH LPC Bridge [1022:790e] (rev 51)
00:18.0 Host bridge [0600]: Advanced Micro Devices, Inc. [AMD] Device [1022:14e0]
00:18.1 Host bridge [0600]: Advanced Micro Devices, Inc. [AMD] Device [1022:14e1]
00:18.2 Host bridge [0600]: Advanced Micro Devices, Inc. [AMD] Device [1022:14e2]
00:18.3 Host bridge [0600]: Advanced Micro Devices, Inc. [AMD] Device [1022:14e3]
00:18.4 Host bridge [0600]: Advanced Micro Devices, Inc. [AMD] Device [1022:14e4]
00:18.5 Host bridge [0600]: Advanced Micro Devices, Inc. [AMD] Device [1022:14e5]
00:18.6 Host bridge [0600]: Advanced Micro Devices, Inc. [AMD] Device [1022:14e6]
00:18.7 Host bridge [0600]: Advanced Micro Devices, Inc. [AMD] Device [1022:14e7]
01:00.0 VGA compatible controller [0300]: NVIDIA Corporation GA102 [GeForce RTX 3080 Lite Hash Rate] [10de:2216] (rev a1)
01:00.1 Audio device [0403]: NVIDIA Corporation GA102 High Definition Audio Controller [10de:1aef] (rev a1)
02:00.0 Non-Volatile memory controller [0108]: Shenzhen Longsys Electronics Co., Ltd. Device [1d97:5236] (rev 01)
03:00.0 VGA compatible controller [0300]: NVIDIA Corporation GA102 [GeForce RTX 3080 12GB] [10de:220a] (rev a1)
03:00.1 Audio device [0403]: NVIDIA Corporation GA102 High Definition Audio Controller [10de:1aef] (rev a1)
04:00.0 PCI bridge [0604]: Advanced Micro Devices, Inc. [AMD] Device [1022:43f4] (rev 01)
05:00.0 PCI bridge [0604]: Advanced Micro Devices, Inc. [AMD] Device [1022:43f5] (rev 01)
05:08.0 PCI bridge [0604]: Advanced Micro Devices, Inc. [AMD] Device [1022:43f5] (rev 01)
05:0c.0 PCI bridge [0604]: Advanced Micro Devices, Inc. [AMD] Device [1022:43f5] (rev 01)
05:0d.0 PCI bridge [0604]: Advanced Micro Devices, Inc. [AMD] Device [1022:43f5] (rev 01)
07:00.0 PCI bridge [0604]: Advanced Micro Devices, Inc. [AMD] Device [1022:43f4] (rev 01)
08:01.0 PCI bridge [0604]: Advanced Micro Devices, Inc. [AMD] Device [1022:43f5] (rev 01)
08:02.0 PCI bridge [0604]: Advanced Micro Devices, Inc. [AMD] Device [1022:43f5] (rev 01)
08:03.0 PCI bridge [0604]: Advanced Micro Devices, Inc. [AMD] Device [1022:43f5] (rev 01)
08:04.0 PCI bridge [0604]: Advanced Micro Devices, Inc. [AMD] Device [1022:43f5] (rev 01)
08:08.0 PCI bridge [0604]: Advanced Micro Devices, Inc. [AMD] Device [1022:43f5] (rev 01)
08:0c.0 PCI bridge [0604]: Advanced Micro Devices, Inc. [AMD] Device [1022:43f5] (rev 01)
08:0d.0 PCI bridge [0604]: Advanced Micro Devices, Inc. [AMD] Device [1022:43f5] (rev 01)
09:00.0 Ethernet controller [0200]: Intel Corporation Ethernet Controller I225-V [8086:15f3] (rev 03)
0b:00.0 SATA controller [0106]: ASMedia Technology Inc. ASM1062 Serial ATA Controller [1b21:0612] (rev 02)
0c:00.0 PCI bridge [0604]: Intel Corporation Thunderbolt 4 Bridge [Maple Ridge 4C 2020] [8086:1136] (rev 02)
0d:00.0 PCI bridge [0604]: Intel Corporation Thunderbolt 4 Bridge [Maple Ridge 4C 2020] [8086:1136] (rev 02)
0d:01.0 PCI bridge [0604]: Intel Corporation Thunderbolt 4 Bridge [Maple Ridge 4C 2020] [8086:1136] (rev 02)
0d:02.0 PCI bridge [0604]: Intel Corporation Thunderbolt 4 Bridge [Maple Ridge 4C 2020] [8086:1136] (rev 02)
0d:03.0 PCI bridge [0604]: Intel Corporation Thunderbolt 4 Bridge [Maple Ridge 4C 2020] [8086:1136] (rev 02)
0e:00.0 USB controller [0c03]: Intel Corporation Thunderbolt 4 NHI [Maple Ridge 4C 2020] [8086:1137]
3a:00.0 USB controller [0c03]: Intel Corporation Thunderbolt 4 USB Controller [Maple Ridge 4C 2020] [8086:1138]
67:00.0 USB controller [0c03]: Advanced Micro Devices, Inc. [AMD] Device [1022:43f7] (rev 01)
68:00.0 SATA controller [0106]: Advanced Micro Devices, Inc. [AMD] Device [1022:43f6] (rev 01)
69:00.0 USB controller [0c03]: Advanced Micro Devices, Inc. [AMD] Device [1022:43f7] (rev 01)
6a:00.0 SATA controller [0106]: Advanced Micro Devices, Inc. [AMD] Device [1022:43f6] (rev 01)
6b:00.0 Non-Essential Instrumentation [1300]: Advanced Micro Devices, Inc. [AMD] Device [1022:14de] (rev c1)
6b:00.2 Encryption controller [1080]: Advanced Micro Devices, Inc. [AMD] VanGogh PSP/CCP [1022:1649]
6b:00.3 USB controller [0c03]: Advanced Micro Devices, Inc. [AMD] Device [1022:15b6]
6b:00.4 USB controller [0c03]: Advanced Micro Devices, Inc. [AMD] Device [1022:15b7]
6c:00.0 USB controller [0c03]: Advanced Micro Devices, Inc. [AMD] Device [1022:15b8]
$ sudo dmidecode -t memory
[sudo] password for keith:
# dmidecode 3.3
Getting SMBIOS data from sysfs.
SMBIOS 3.5.0 present.
Handle 0x0010, DMI type 16, 23 bytes
Physical Memory Array
Location: System Board Or Motherboard
Use: System Memory
Error Correction Type: None
Maximum Capacity: 128 GB
Error Information Handle: 0x000F
Number Of Devices: 4
Handle 0x0013, DMI type 17, 92 bytes
Memory Device
Array Handle: 0x0010
Error Information Handle: 0x0012
Total Width: Unknown
Data Width: Unknown
Size: No Module Installed
Form Factor: Unknown
Set: None
Locator: DIMM 0
Bank Locator: P0 CHANNEL A
Type: Unknown
Type Detail: Unknown
Speed: Unknown
Manufacturer: Unknown
Serial Number: Unknown
Asset Tag: Not Specified
Part Number: Unknown
Rank: Unknown
Configured Memory Speed: Unknown
Minimum Voltage: Unknown
Maximum Voltage: Unknown
Configured Voltage: Unknown
Memory Technology: Unknown
Memory Operating Mode Capability: Unknown
Firmware Version: Unknown
Module Manufacturer ID: Unknown
Module Product ID: Unknown
Memory Subsystem Controller Manufacturer ID: Unknown
Memory Subsystem Controller Product ID: Unknown
Non-Volatile Size: None
Volatile Size: None
Cache Size: None
Logical Size: None
Handle 0x0015, DMI type 17, 92 bytes
Memory Device
Array Handle: 0x0010
Error Information Handle: 0x0014
Total Width: 64 bits
Data Width: 64 bits
Size: 16 GB
Form Factor: DIMM
Set: None
Locator: DIMM 1
Bank Locator: P0 CHANNEL A
Type: DDR5
Type Detail: Synchronous Unbuffered (Unregistered)
Speed: 4800 MT/s
Manufacturer: Unknown
Serial Number: 00000000
Asset Tag: Not Specified
Part Number: F5-6000J3636F16G
Rank: 1
Configured Memory Speed: 6000 MT/s
Minimum Voltage: 1.1 V
Maximum Voltage: 1.1 V
Configured Voltage: 1.1 V
Memory Technology: DRAM
Memory Operating Mode Capability: Volatile memory
Firmware Version:
Module Manufacturer ID: Bank 5, Hex 0xCD
Module Product ID: Unknown
Memory Subsystem Controller Manufacturer ID: Unknown
Memory Subsystem Controller Product ID: Unknown
Non-Volatile Size: None
Volatile Size: 16 GB
Cache Size: None
Logical Size: None
Handle 0x0018, DMI type 17, 92 bytes
Memory Device
Array Handle: 0x0010
Error Information Handle: 0x0017
Total Width: Unknown
Data Width: Unknown
Size: No Module Installed
Form Factor: Unknown
Set: None
Locator: DIMM 0
Bank Locator: P0 CHANNEL B
Type: Unknown
Type Detail: Unknown
Speed: Unknown
Manufacturer: Unknown
Serial Number: Unknown
Asset Tag: Not Specified
Part Number: Unknown
Rank: Unknown
Configured Memory Speed: Unknown
Minimum Voltage: Unknown
Maximum Voltage: Unknown
Configured Voltage: Unknown
Memory Technology: Unknown
Memory Operating Mode Capability: Unknown
Firmware Version: Unknown
Module Manufacturer ID: Unknown
Module Product ID: Unknown
Memory Subsystem Controller Manufacturer ID: Unknown
Memory Subsystem Controller Product ID: Unknown
Non-Volatile Size: None
Volatile Size: None
Cache Size: None
Logical Size: None
Handle 0x001A, DMI type 17, 92 bytes
Memory Device
Array Handle: 0x0010
Error Information Handle: 0x0019
Total Width: 64 bits
Data Width: 64 bits
Size: 16 GB
Form Factor: DIMM
Set: None
Locator: DIMM 1
Bank Locator: P0 CHANNEL B
Type: DDR5
Type Detail: Synchronous Unbuffered (Unregistered)
Speed: 4800 MT/s
Manufacturer: Unknown
Serial Number: 00000000
Asset Tag: Not Specified
Part Number: F5-6000J3636F16G
Rank: 1
Configured Memory Speed: 6000 MT/s
Minimum Voltage: 1.1 V
Maximum Voltage: 1.1 V
Configured Voltage: 1.1 V
Memory Technology: DRAM
Memory Operating Mode Capability: Volatile memory
Firmware Version:
Module Manufacturer ID: Bank 5, Hex 0xCD
Module Product ID: Unknown
Memory Subsystem Controller Manufacturer ID: Unknown
Memory Subsystem Controller Product ID: Unknown
Non-Volatile Size: None
Volatile Size: 16 GB
Cache Size: None
Logical Size: None@KeithMyers
Yes, I have IOMMU disabled in the BIOS. Is that affecting the issue?
No but it explains why it is not reported.
Probably BIOS implementation is making the difference and I would like to try the previous set of UMC registers
Can you edit this source line of code https://github.com/cyring/CoreFreq/blob/6d8594acc55ec39bfbf7d63b8c038ace79f640a0/corefreqk.h#L2057
... and replace with this:
#define AMD_DataFabric_Raphael AMD_DataFabric_Vermeer... then rebuild, run, and test the UMC
KeithMyers
commented
1 year ago OK, modified the header file and rebuilt. Still no memory controller. Enabled the IOMMU in the BIOS.
$ ./corefreq-cli -s -n -C 1 -n -M
Processor [AMD Ryzen 9 7950X 16-Core Processor]
|- Architecture [Zen4/Raphael]
|- Vendor ID [AuthenticAMD]
|- Microcode [0x0a601203]
|- Signature [ AF_61]
|- Stepping [ 2]
|- Online CPU [ 32/ 32]
|- Base Clock [100.037]
|- Frequency (MHz) Ratio
Min 3001.12 < 30 >
Max 4501.68 < 45 >
|- Factory [100.000]
4500 [ 45 ]
|- Performance
|- P-State
TGT 4501.68 < 45 >
|- CPPC
Min 3701.38 < 37 >
Max 1900.71 < 19 >
TGT 1900.71 < 19 >
|- Turbo Boost [ UNLOCK]
XFR 5802.16 [ 58 ]
CPB 5702.13 [ 57 ]
1C 3001.12 < 30 >
|- Uncore [ LOCK]
Instruction Set Extensions
|- 3DNow!/Ext [N/N] ADX [Y] AES [Y] AVX/AVX2 [Y/Y]
|- AVX512-F [Y] AVX512-DQ [Y] AVX512-IFMA [Y] AVX512-PF [N]
|- AVX512-ER [N] AVX512-CD [Y] AVX512-BW [Y] AVX512-VL [Y]
|- AVX512-VBMI [Y] AVX512-VBMI2 [Y] AVX512-VNNI [Y] AVX512-ALG [Y]
|- AVX512-VPOP [Y] AVX512-VNNIW [N] AVX512-FMAPS [N] AVX512-VP2I [N]
|- AVX512-BF16 [Y] AVX-VNNI-VEX [N] AVX-FP128 [N] AVX-FP256 [Y]
|- BMI1/BMI2 [Y/Y] CLWB [Y] CLFLUSH [Y] CLFLUSH-OPT [Y]
|- CLAC-STAC [Y] CMOV [Y] CMPXCHG8B [Y] CMPXCHG16B [Y]
|- F16C [Y] FPU [Y] FXSR [Y] LAHF-SAHF [Y]
|- MMX/Ext [Y/Y] MON/MWAITX [Y/Y] MOVBE [Y] PCLMULQDQ [Y]
|- POPCNT [Y] RDRAND [Y] RDSEED [Y] RDTSCP [Y]
|- SEP [Y] SHA [Y] SSE [Y] SSE2 [Y]
|- SSE3 [Y] SSSE3 [Y] SSE4.1/4A [Y/Y] SSE4.2 [Y]
|- SERIALIZE [N] SYSCALL [Y] RDPID [Y] UMIP [Y]
|- VAES [Y] VPCLMULQDQ [Y] PREFETCH/W [Y] LZCNT [Y]
Features
|- 1 GB Pages Support 1GB-PAGES [Capable]
|- 100 MHz multiplier Control 100MHzSteps [Missing]
|- Advanced Configuration & Power Interface ACPI [Capable]
|- Advanced Programmable Interrupt Controller APIC [Capable]
|- Advanced Virtual Interrupt Controller AVIC [Capable]
|- APIC Timer Invariance ARAT [Capable]
|- Clear Zero Instruction CLZERO [Capable]
|- Core Multi-Processing CMP Legacy [Capable]
|- L1 Data Cache Context ID CNXT-ID [Missing]
|- Collaborative Processor Performance Control CPPC [Capable]
|- Direct Cache Access DCA [Missing]
|- Debugging Extension DE [Capable]
|- Debug Store & Precise Event Based Sampling DS, PEBS [Missing]
|- CPL Qualified Debug Store DS-CPL [Missing]
|- 64-Bit Debug Store DTES64 [Missing]
|- Fast Short REP MOVSB FSRM [Capable]
|- Fast-String Operation ERMS [Capable]
|- Fused Multiply Add FMA | FMA4 [Capable]
|- Hardware Lock Elision HLE [Missing]
|- Hardware P-state control HwP [Capable]
|- Instruction Based Sampling IBS [Capable]
|- Instruction INVLPGB INVLPGB [Missing]
|- Instruction INVPCID INVPCID [Capable]
|- Long Mode 64 bits IA64 | LM [Capable]
|- LightWeight Profiling LWP [Missing]
|- Memory Bandwidth Enforcement MBE [Capable]
|- Machine-Check Architecture MCA [Capable]
|- Instruction MCOMMIT MCOMMIT [Missing]
|- Memory Protection Extensions MPX [Missing]
|- Model Specific Registers MSR [Capable]
|- Memory Type Range Registers MTRR [Capable]
|- No-Execute Page Protection NX [Capable]
|- OS-Enabled Ext. State Management OSXSAVE [Capable]
|- Physical Address Extension PAE [Capable]
|- Page Attribute Table PAT [Capable]
|- Pending Break Enable PBE [Missing]
|- Process Context Identifiers PCID [Missing]
|- Perfmon and Debug Capability PDCM [Missing]
|- Page Global Enable PGE [Capable]
|- Page Size Extension PSE [Capable]
|- 36-bit Page Size Extension PSE36 [Capable]
|- Processor Serial Number PSN [Missing]
|- Resource Director Technology/PQE RDT-A [Capable]
|- Resource Director Technology/PQM RDT-M [Capable]
|- Read Processor Register at User level RDPRU [Capable]
|- Restricted Transactional Memory RTM [Missing]
|- Safer Mode Extensions SMX [Missing]
|- Self-Snoop SS [Missing]
|- Supervisor-Mode Access Prevention SMAP [Capable]
|- Supervisor-Mode Execution Prevention SMEP [Capable]
|- Time Stamp Counter TSC [Invariant]
|- Time Stamp Counter Deadline TSC-DEADLINE [Missing]
|- TSX Force Abort MSR Register TSX-ABORT [Missing]
|- TSX Suspend Load Address Tracking TSX-LDTRK [Missing]
|- User-Mode Instruction Prevention UMIP [Capable]
|- Virtual Mode Extension VME [Capable]
|- Virtual Machine Extensions VMX [Missing]
|- Write Back & Do Not Invalidate Cache WBNOINVD [Capable]
|- Extended xAPIC Support x2APIC [ xAPIC]
|- AVIC controller for x2APIC x2AVIC [Capable]
|- XSAVE/XSTOR States XSAVE [Capable]
|- xTPR Update Control xTPR [Missing]
Mitigation mechanisms
|- Indirect Branch Restricted Speculation IBRS [Capable]
|- IBRS Always-On preferred by processor [ Unable]
|- IBRS preferred over software solution [Capable]
|- IBRS provides same speculation limits [Capable]
|- Indirect Branch Prediction Barrier IBPB [Capable]
|- Single Thread Indirect Branch Predictor STIBP [ Enable]
|- Speculative Store Bypass Disable SSBD [Capable]
|- SSBD use VIRT_SPEC_CTRL register [ Unable]
|- SSBD not needed on this processor [ Unable]
|- No Branch Type Confusion BTC_NO [ Unable]
|- BTC on Non-Branch instruction BTC-NOBR [Capable]
|- Arch - No Fast Predictive Store Forwarding PSFD [Capable]
Security Features
|- Secure Init and Jump with Attestation SKINIT [Capable]
|- Secure Encrypted Virtualization SEV [Missing]
|- SEV - Encrypted State SEV-ES [Missing]
|- SEV - Secure Nested Paging SEV-SNP [Missing]
|- Guest Mode Execute Trap GMET [Capable]
|- Supervisor Shadow Stack SSS [Capable]
|- VM Permission Levels VMPL [Missing]
|- VMPL Supervisor Shadow Stack VMPL-SSS [Missing]
|- Secure Multi-Key Memory Encryption SME-MK [Missing]
Technologies
|- Instruction Cache Unit
|- L1 IP Prefetcher L1 HW IP < ON>
|- Data Cache Unit
|- L1 Prefetcher L1 HW < ON>
|- L2 Prefetcher L2 HW < ON>
|- System Management Mode SMM-Lock [ ON]
|- Simultaneous Multithreading SMT [ ON]
|- PowerNow! CnQ [OFF]
|- Core C-States CCx [ ON]
|- Core Performance Boost CPB < ON>
|- Watchdog Timer WDT <OFF>
|- Virtualization SVM [OFF]
|- I/O MMU AMD-V [ ON]
|- Version [ 0.1]
|- Hypervisor [OFF]
|- Vendor ID [ N/A]
Performance Monitoring
|- Version PM [ 2]
|- Counters: General Fixed
| { 6, 6, 16 } x 48 bits 3 x 64 bits
|- Enhanced Halt State C1E <OFF>
|- C2 UnDemotion C2U < ON>
|- C3 UnDemotion C3U < ON>
|- Core C6 State CC6 < ON>
|- Package C6 State PC6 < ON>
|- Legacy Frequency ID control FID [OFF]
|- Legacy Voltage ID control VID [OFF]
|- P-State Hardware Coordination Feedback MPERF/APERF [ ON]
|- Core C-States
|- C-States Base Address BAR [ 0x413 ]
|- MONITOR/MWAIT
|- State index: #0 #1 #2 #3 #4 #5 #6 #7
|- Sub C-State: 1 1 0 0 0 0 0 0
|- Core Cycles [Capable]
|- Instructions Retired [Capable]
|- Reference Cycles [Capable]
|- Last Level Cache References [Capable]
|- Global Time Stamp Counter [Missing]
|- Data Fabric Performance Counter [Capable]
|- Core Performance Counter [Capable]
|- Continuous Performance Control _CPC [OFF]
|- Collaborative Processor Performance Control CPPC < ON>
|- Capabilities Lowest Efficient Guaranteed Highest
|- CPU #0 300.11 ( 3) 1900.71 ( 19) 2801.04 ( 28) 4601.72 ( 46)
|- CPU #1 300.11 ( 3) 1900.71 ( 19) 2801.04 ( 28) 5301.98 ( 53)
|- CPU #2 300.11 ( 3) 1900.71 ( 19) 2801.04 ( 28) 4801.79 ( 48)
|- CPU #3 300.11 ( 3) 1900.71 ( 19) 2801.04 ( 28) 5201.94 ( 52)
|- CPU #4 300.11 ( 3) 1900.69 ( 19) 2801.02 ( 28) 4701.71 ( 47)
|- CPU #5 300.11 ( 3) 1900.71 ( 19) 2801.05 ( 28) 5101.90 ( 51)
|- CPU #6 300.11 ( 3) 1900.71 ( 19) 2801.04 ( 28) 4901.82 ( 49)
|- CPU #7 300.11 ( 3) 1900.71 ( 19) 2801.04 ( 28) 5301.98 ( 53)
|- CPU #8 300.11 ( 3) 1900.71 ( 19) 2801.04 ( 28) 3701.38 ( 37)
|- CPU #9 300.11 ( 3) 1900.71 ( 19) 2801.04 ( 28) 4301.60 ( 43)
|- CPU #10 300.11 ( 3) 1900.71 ( 19) 2801.04 ( 28) 4001.49 ( 40)
|- CPU #11 300.11 ( 3) 1900.71 ( 19) 2801.04 ( 28) 4201.56 ( 42)
|- CPU #12 300.11 ( 3) 1900.72 ( 19) 2801.07 ( 28) 3901.49 ( 39)
|- CPU #13 300.11 ( 3) 1900.71 ( 19) 2801.04 ( 28) 4501.68 ( 45)
|- CPU #14 300.11 ( 3) 1900.71 ( 19) 2801.04 ( 28) 3801.42 ( 38)
|- CPU #15 300.11 ( 3) 1900.71 ( 19) 2801.04 ( 28) 4401.64 ( 44)
|- CPU #16 300.11 ( 3) 1900.71 ( 19) 2801.04 ( 28) 4601.71 ( 46)
|- CPU #17 300.11 ( 3) 1900.71 ( 19) 2801.04 ( 28) 5301.98 ( 53)
|- CPU #18 300.11 ( 3) 1900.71 ( 19) 2801.04 ( 28) 4801.79 ( 48)
|- CPU #19 300.11 ( 3) 1900.71 ( 19) 2801.04 ( 28) 5201.94 ( 52)
|- CPU #20 300.11 ( 3) 1900.71 ( 19) 2801.04 ( 28) 4701.75 ( 47)
|- CPU #21 300.11 ( 3) 1900.71 ( 19) 2801.05 ( 28) 5101.91 ( 51)
|- CPU #22 300.11 ( 3) 1900.71 ( 19) 2801.05 ( 28) 4901.83 ( 49)
|- CPU #23 300.11 ( 3) 1900.69 ( 19) 2801.02 ( 28) 5301.92 ( 53)
|- CPU #24 300.11 ( 3) 1900.71 ( 19) 2801.05 ( 28) 3701.39 ( 37)
|- CPU #25 300.11 ( 3) 1900.71 ( 19) 2801.04 ( 28) 4301.60 ( 43)
|- CPU #26 300.11 ( 3) 1900.71 ( 19) 2801.04 ( 28) 4001.49 ( 40)
|- CPU #27 300.11 ( 3) 1900.71 ( 19) 2801.04 ( 28) 4201.57 ( 42)
|- CPU #28 300.11 ( 3) 1900.71 ( 19) 2801.05 ( 28) 3901.46 ( 39)
|- CPU #29 300.11 ( 3) 1900.71 ( 19) 2801.05 ( 28) 4501.69 ( 45)
|- CPU #30 300.11 ( 3) 1900.71 ( 19) 2801.04 ( 28) 3801.42 ( 38)
|- CPU #31 300.11 ( 3) 1900.71 ( 19) 2801.04 ( 28) 4401.64 ( 44)
Power, Current & Thermal
|- Temperature Offset:Junction TjMax [ 49: 0 C]
|- CPPC Energy Preference EPP < 0>
|- Digital Thermal Sensor DTS [Capable]
|- Power Limit Notification PLN [Missing]
|- Package Thermal Management PTM [Missing]
|- Thermal Monitor 1 TTP [ Enable]
|- Thermal Monitor 2 HTC [ Enable]
|- Thermal Design Power TDP [Missing]
|- Minimum Power Min [Missing]
|- Maximum Power Max [Missing]
|- Thermal Design Power Package [Disable]
|- Power Limit PL1 [ 0 W]
|- Time Window TW1 [ 0 ns]
|- Power Limit PL2 [ 0 W]
|- Time Window TW2 [ 0 ns]
|- Thermal Design Power Core [Disable]
|- Power Limit PL1 [ 0 W]
|- Time Window TW1 [ 0 ns]
|- Thermal Design Power Uncore [Disable]
|- Power Limit PL1 [ 0 W]
|- Time Window TW1 [ 0 ns]
|- Thermal Design Power DRAM [Disable]
|- Power Limit PL1 [ 0 W]
|- Time Window TW1 [ 0 ns]
|- Thermal Design Power Platform [Disable]
|- Power Limit PL1 [ 0 W]
|- Time Window TW1 [ 0 ns]
|- Power Limit PL2 [ 0 W]
|- Time Window TW2 [ 0 ns]
|- Package Power Tracking PPT [Missing]
|- Electrical Design Current EDC [Missing]
|- Thermal Design Current TDC [Missing]
|- Core Thermal Point
|- Package Thermal Point
|- Thermal Monitor Trip Limit [ 115 C]
|- HTC Temperature Limit Limit [ 127 C]
|- HTC Temperature Hysteresis Threshold [ 2 C]
|- Units
|- Power watt [ Missing]
|- Energy joule [ 0.000015259]
|- Window second [ 0.000976562]
CPU Freq(MHz) VID Vcore TMP(C) Accumulator Energy(J) Power(W)
000 0.29 104 0.6500 34 000000000000094310 1.439056396 1.439056396
001 2.44 104 0.6500 34 000000000000095933 1.463821411 1.463821411
002 0.36 104 0.6500 34 000000000000099305 1.515274048 1.515274048
003 0.65 104 0.6500 34 000000000000100261 1.529861450 1.529861450
004 1.78 104 0.6500 34 000000000000100068 1.526916504 1.526916504
005 18.93 104 0.6500 34 000000000000107808 1.645019531 1.645019531
006 3.66 104 0.6500 34 000000000000100598 1.535003662 1.535003662
007 1.03 104 0.6500 34 000000000000102677 1.566726685 1.566726685
008 0.31 104 0.6500 32 000000000000051050 0.778961182 0.778961182
009 0.24 104 0.6500 32 000000000000049315 0.752487183 0.752487183
010 0.24 104 0.6500 31 000000000000051555 0.786666870 0.786666870
011 0.33 104 0.6500 31 000000000000050678 0.773284912 0.773284912
012 1.50 104 0.6500 31 000000000000052847 0.806381226 0.806381226
013 0.24 104 0.6500 31 000000000000051511 0.785995483 0.785995483
014 0.25 104 0.6500 32 000000000000052214 0.796722412 0.796722412
015 0.92 104 0.6500 31 000000000000050208 0.766113281 0.766113281
016 0.22 104 0.6500 34 000000000000000000 0.000000000 0.000000000
017 0.66 104 0.6500 34 000000000000000000 0.000000000 0.000000000
018 4.64 104 0.6500 34 000000000000000000 0.000000000 0.000000000
019 1.11 104 0.6500 34 000000000000000000 0.000000000 0.000000000
020 1.27 104 0.6500 34 000000000000000000 0.000000000 0.000000000
021 30.50 104 0.6500 34 000000000000000000 0.000000000 0.000000000
022 1.56 104 0.6500 34 000000000000000000 0.000000000 0.000000000
023 3.56 104 0.6500 34 000000000000000000 0.000000000 0.000000000
024 1.09 104 0.6500 31 000000000000000000 0.000000000 0.000000000
025 1.80 104 0.6500 31 000000000000000000 0.000000000 0.000000000
026 1.29 104 0.6500 31 000000000000000000 0.000000000 0.000000000
027 0.82 104 0.6500 31 000000000000000000 0.000000000 0.000000000
028 11.74 104 0.6500 31 000000000000000000 0.000000000 0.000000000
029 11.35 104 0.6500 31 000000000000000000 0.000000000 0.000000000
030 8.76 104 0.6500 31 000000000000000000 0.000000000 0.000000000
031 0.23 104 0.6500 31 000000000000000000 0.000000000 0.000000000
Package[0] Cores Uncore Memory Platform
Energy(J): 63.906158447 18.468292236 0.000000000 0.000000000 0.000000000
Power(W) : 63.906158447 18.468292236 0.000000000 0.000000000 0.000000000
Zen UMC [14E0]
Controller #0 Disabled
$ ./corefreq-cli -B
[ 0] American Megatrends Inc.
[ 1] 0805
[ 2] 11/04/2022
[ 3] ASUS
[ 4] System Product Name
[ 5] System Version
[ 6] S---e---e---l---m---
[ 7] SKU
[ 8] To be filled by O.E.M.
[ 9] ASUSTeK COMPUTER INC.
[10] ROG CROSSHAIR X670E HERO
[11] Rev 1.xx
[12] 2---0---7---4--
[13] Number Of Devices:4\Maximum Capacity:134217728 bytes
[14]
[15] DIMM 1\P0 CHANNEL A
[16]
[17] DIMM 1\P0 CHANNEL B
[18]
[19] Unknown
[20]
[21] Unknown
[22]
[23] F5-6000J3636F16G
[24]
[25] F5-6000J3636F16G
$ sudo lspci -nn
00:00.0 Host bridge [0600]: Advanced Micro Devices, Inc. [AMD] Device [1022:14d8]
00:00.2 IOMMU [0806]: Advanced Micro Devices, Inc. [AMD] Device [1022:14d9]
00:01.0 Host bridge [0600]: Advanced Micro Devices, Inc. [AMD] Device [1022:14da]
00:01.1 PCI bridge [0604]: Advanced Micro Devices, Inc. [AMD] Device [1022:14db]
00:01.2 PCI bridge [0604]: Advanced Micro Devices, Inc. [AMD] Device [1022:14db]
00:01.3 PCI bridge [0604]: Advanced Micro Devices, Inc. [AMD] Device [1022:14db]
00:02.0 Host bridge [0600]: Advanced Micro Devices, Inc. [AMD] Device [1022:14da]
00:02.1 PCI bridge [0604]: Advanced Micro Devices, Inc. [AMD] Device [1022:14db]
00:03.0 Host bridge [0600]: Advanced Micro Devices, Inc. [AMD] Device [1022:14da]
00:04.0 Host bridge [0600]: Advanced Micro Devices, Inc. [AMD] Device [1022:14da]
00:08.0 Host bridge [0600]: Advanced Micro Devices, Inc. [AMD] Device [1022:14da]
00:08.1 PCI bridge [0604]: Advanced Micro Devices, Inc. [AMD] Device [1022:14dd]
00:08.3 PCI bridge [0604]: Advanced Micro Devices, Inc. [AMD] Device [1022:14dd]
00:14.0 SMBus [0c05]: Advanced Micro Devices, Inc. [AMD] FCH SMBus Controller [1022:790b] (rev 71)
00:14.3 ISA bridge [0601]: Advanced Micro Devices, Inc. [AMD] FCH LPC Bridge [1022:790e] (rev 51)
00:18.0 Host bridge [0600]: Advanced Micro Devices, Inc. [AMD] Device [1022:14e0]
00:18.1 Host bridge [0600]: Advanced Micro Devices, Inc. [AMD] Device [1022:14e1]
00:18.2 Host bridge [0600]: Advanced Micro Devices, Inc. [AMD] Device [1022:14e2]
00:18.3 Host bridge [0600]: Advanced Micro Devices, Inc. [AMD] Device [1022:14e3]
00:18.4 Host bridge [0600]: Advanced Micro Devices, Inc. [AMD] Device [1022:14e4]
00:18.5 Host bridge [0600]: Advanced Micro Devices, Inc. [AMD] Device [1022:14e5]
00:18.6 Host bridge [0600]: Advanced Micro Devices, Inc. [AMD] Device [1022:14e6]
00:18.7 Host bridge [0600]: Advanced Micro Devices, Inc. [AMD] Device [1022:14e7]
01:00.0 VGA compatible controller [0300]: NVIDIA Corporation GA102 [GeForce RTX 3080 Lite Hash Rate] [10de:2216] (rev a1)
01:00.1 Audio device [0403]: NVIDIA Corporation GA102 High Definition Audio Controller [10de:1aef] (rev a1)
02:00.0 Non-Volatile memory controller [0108]: Shenzhen Longsys Electronics Co., Ltd. Device [1d97:5236] (rev 01)
03:00.0 VGA compatible controller [0300]: NVIDIA Corporation GA102 [GeForce RTX 3080 12GB] [10de:220a] (rev a1)
03:00.1 Audio device [0403]: NVIDIA Corporation GA102 High Definition Audio Controller [10de:1aef] (rev a1)
04:00.0 PCI bridge [0604]: Advanced Micro Devices, Inc. [AMD] Device [1022:43f4] (rev 01)
05:00.0 PCI bridge [0604]: Advanced Micro Devices, Inc. [AMD] Device [1022:43f5] (rev 01)
05:08.0 PCI bridge [0604]: Advanced Micro Devices, Inc. [AMD] Device [1022:43f5] (rev 01)
05:0c.0 PCI bridge [0604]: Advanced Micro Devices, Inc. [AMD] Device [1022:43f5] (rev 01)
05:0d.0 PCI bridge [0604]: Advanced Micro Devices, Inc. [AMD] Device [1022:43f5] (rev 01)
07:00.0 PCI bridge [0604]: Advanced Micro Devices, Inc. [AMD] Device [1022:43f4] (rev 01)
08:01.0 PCI bridge [0604]: Advanced Micro Devices, Inc. [AMD] Device [1022:43f5] (rev 01)
08:02.0 PCI bridge [0604]: Advanced Micro Devices, Inc. [AMD] Device [1022:43f5] (rev 01)
08:03.0 PCI bridge [0604]: Advanced Micro Devices, Inc. [AMD] Device [1022:43f5] (rev 01)
08:04.0 PCI bridge [0604]: Advanced Micro Devices, Inc. [AMD] Device [1022:43f5] (rev 01)
08:08.0 PCI bridge [0604]: Advanced Micro Devices, Inc. [AMD] Device [1022:43f5] (rev 01)
08:0c.0 PCI bridge [0604]: Advanced Micro Devices, Inc. [AMD] Device [1022:43f5] (rev 01)
08:0d.0 PCI bridge [0604]: Advanced Micro Devices, Inc. [AMD] Device [1022:43f5] (rev 01)
09:00.0 Ethernet controller [0200]: Intel Corporation Ethernet Controller I225-V [8086:15f3] (rev 03)
0b:00.0 SATA controller [0106]: ASMedia Technology Inc. ASM1062 Serial ATA Controller [1b21:0612] (rev 02)
0c:00.0 PCI bridge [0604]: Intel Corporation Thunderbolt 4 Bridge [Maple Ridge 4C 2020] [8086:1136] (rev 02)
0d:00.0 PCI bridge [0604]: Intel Corporation Thunderbolt 4 Bridge [Maple Ridge 4C 2020] [8086:1136] (rev 02)
0d:01.0 PCI bridge [0604]: Intel Corporation Thunderbolt 4 Bridge [Maple Ridge 4C 2020] [8086:1136] (rev 02)
0d:02.0 PCI bridge [0604]: Intel Corporation Thunderbolt 4 Bridge [Maple Ridge 4C 2020] [8086:1136] (rev 02)
0d:03.0 PCI bridge [0604]: Intel Corporation Thunderbolt 4 Bridge [Maple Ridge 4C 2020] [8086:1136] (rev 02)
0e:00.0 USB controller [0c03]: Intel Corporation Thunderbolt 4 NHI [Maple Ridge 4C 2020] [8086:1137]
3a:00.0 USB controller [0c03]: Intel Corporation Thunderbolt 4 USB Controller [Maple Ridge 4C 2020] [8086:1138]
67:00.0 USB controller [0c03]: Advanced Micro Devices, Inc. [AMD] Device [1022:43f7] (rev 01)
68:00.0 SATA controller [0106]: Advanced Micro Devices, Inc. [AMD] Device [1022:43f6] (rev 01)
69:00.0 USB controller [0c03]: Advanced Micro Devices, Inc. [AMD] Device [1022:43f7] (rev 01)
6a:00.0 SATA controller [0106]: Advanced Micro Devices, Inc. [AMD] Device [1022:43f6] (rev 01)
6b:00.0 Non-Essential Instrumentation [1300]: Advanced Micro Devices, Inc. [AMD] Device [1022:14de] (rev c1)
6b:00.2 Encryption controller [1080]: Advanced Micro Devices, Inc. [AMD] VanGogh PSP/CCP [1022:1649]
6b:00.3 USB controller [0c03]: Advanced Micro Devices, Inc. [AMD] Device [1022:15b6]
6b:00.4 USB controller [0c03]: Advanced Micro Devices, Inc. [AMD] Device [1022:15b7]
6c:00.0 USB controller [0c03]: Advanced Micro Devices, Inc. [AMD] Device [1022:15b8]
$ sudo dmidecode -t memory
# dmidecode 3.3
Getting SMBIOS data from sysfs.
SMBIOS 3.5.0 present.
Handle 0x0010, DMI type 16, 23 bytes
Physical Memory Array
Location: System Board Or Motherboard
Use: System Memory
Error Correction Type: None
Maximum Capacity: 128 GB
Error Information Handle: 0x000F
Number Of Devices: 4
Handle 0x0013, DMI type 17, 92 bytes
Memory Device
Array Handle: 0x0010
Error Information Handle: 0x0012
Total Width: Unknown
Data Width: Unknown
Size: No Module Installed
Form Factor: Unknown
Set: None
Locator: DIMM 0
Bank Locator: P0 CHANNEL A
Type: Unknown
Type Detail: Unknown
Speed: Unknown
Manufacturer: Unknown
Serial Number: Unknown
Asset Tag: Not Specified
Part Number: Unknown
Rank: Unknown
Configured Memory Speed: Unknown
Minimum Voltage: Unknown
Maximum Voltage: Unknown
Configured Voltage: Unknown
Memory Technology: Unknown
Memory Operating Mode Capability: Unknown
Firmware Version: Unknown
Module Manufacturer ID: Unknown
Module Product ID: Unknown
Memory Subsystem Controller Manufacturer ID: Unknown
Memory Subsystem Controller Product ID: Unknown
Non-Volatile Size: None
Volatile Size: None
Cache Size: None
Logical Size: None
Handle 0x0015, DMI type 17, 92 bytes
Memory Device
Array Handle: 0x0010
Error Information Handle: 0x0014
Total Width: 64 bits
Data Width: 64 bits
Size: 16 GB
Form Factor: DIMM
Set: None
Locator: DIMM 1
Bank Locator: P0 CHANNEL A
Type: DDR5
Type Detail: Synchronous Unbuffered (Unregistered)
Speed: 4800 MT/s
Manufacturer: Unknown
Serial Number: 00000000
Asset Tag: Not Specified
Part Number: F5-6000J3636F16G
Rank: 1
Configured Memory Speed: 6000 MT/s
Minimum Voltage: 1.1 V
Maximum Voltage: 1.1 V
Configured Voltage: 1.1 V
Memory Technology: DRAM
Memory Operating Mode Capability: Volatile memory
Firmware Version:
Module Manufacturer ID: Bank 5, Hex 0xCD
Module Product ID: Unknown
Memory Subsystem Controller Manufacturer ID: Unknown
Memory Subsystem Controller Product ID: Unknown
Non-Volatile Size: None
Volatile Size: 16 GB
Cache Size: None
Logical Size: None
Handle 0x0018, DMI type 17, 92 bytes
Memory Device
Array Handle: 0x0010
Error Information Handle: 0x0017
Total Width: Unknown
Data Width: Unknown
Size: No Module Installed
Form Factor: Unknown
Set: None
Locator: DIMM 0
Bank Locator: P0 CHANNEL B
Type: Unknown
Type Detail: Unknown
Speed: Unknown
Manufacturer: Unknown
Serial Number: Unknown
Asset Tag: Not Specified
Part Number: Unknown
Rank: Unknown
Configured Memory Speed: Unknown
Minimum Voltage: Unknown
Maximum Voltage: Unknown
Configured Voltage: Unknown
Memory Technology: Unknown
Memory Operating Mode Capability: Unknown
Firmware Version: Unknown
Module Manufacturer ID: Unknown
Module Product ID: Unknown
Memory Subsystem Controller Manufacturer ID: Unknown
Memory Subsystem Controller Product ID: Unknown
Non-Volatile Size: None
Volatile Size: None
Cache Size: None
Logical Size: None
Handle 0x001A, DMI type 17, 92 bytes
Memory Device
Array Handle: 0x0010
Error Information Handle: 0x0019
Total Width: 64 bits
Data Width: 64 bits
Size: 16 GB
Form Factor: DIMM
Set: None
Locator: DIMM 1
Bank Locator: P0 CHANNEL B
Type: DDR5
Type Detail: Synchronous Unbuffered (Unregistered)
Speed: 4800 MT/s
Manufacturer: Unknown
Serial Number: 00000000
Asset Tag: Not Specified
Part Number: F5-6000J3636F16G
Rank: 1
Configured Memory Speed: 6000 MT/s
Minimum Voltage: 1.1 V
Maximum Voltage: 1.1 V
Configured Voltage: 1.1 V
Memory Technology: DRAM
Memory Operating Mode Capability: Volatile memory
Firmware Version:
Module Manufacturer ID: Bank 5, Hex 0xCD
Module Product ID: Unknown
Memory Subsystem Controller Manufacturer ID: Unknown
Memory Subsystem Controller Product ID: Unknown
Non-Volatile Size: None
Volatile Size: 16 GB
Cache Size: None
Logical Size: None@KeithMyers
OK, modified the header file and rebuilt. Still no memory controller. Enabled the IOMMU in the BIOS.
I/O-MMU is now probed by CoreFreq. Thank you very much
Zen UMC [14E0]
Controller #0 DisabledController disabled means channels count is zero
I have no clue. Code, especially the driver, needs to be traced out.
cyring
commented
1 year ago @KeithMyers
I think more controllers need to be probed. I have encountered this issue with Intel Tiger Lake where the controller is the second
Can you restore original code of develop branch, and replace the below function
https://github.com/cyring/CoreFreq/blob/e41ec49b5f3ff9085f5c4396ce236182fc8f2711/corefreqk.c#L6558
... with this code:
static PCI_CALLBACK AMD_DataFabric_Rembrandt(struct pci_dev *pdev)
{
return AMD_17h_DataFabric( pdev,
(const unsigned int[2][2]) {
{ 0x0, 0x20},
{0x10, 0x30}
},
0x40, 0x90,
MC_MAX_CTRL, MC_MAX_CHA,
(const unsigned short[]) {0x18} );
}(Rembrandt, like Raphael are both for DDR5. That's why this common function)
Rebuild and run CoreFreq, I just need the output of the UMC
Thank you
KeithMyers
commented
1 year ago I won't make any changes until you verify your last post.
I believe you made a mistake and are referencing both the wrong file and the wrong line number.
You say to make changes in corefreqk.c at line number 6558 and make changes to
static PCI_CALLBACK AMD_DataFabric_Rembrandt(struct pci_dev *pdev)
at line number 6558 in this file is just {
I believe you want me to make changes to corefreqk.h at line number 2056 which does have the
static PCI_CALLBACK AMD_DataFabric_Rembrandt(struct pci_dev *pdev) code
KeithMyers
commented
1 year ago Best thing to do is pull the new dev branch code release commit e41ec49 The filename, line number and code matches your post then. On Tuesday, December 20, 2022 at 06:43:50 PM PST, CyrIng @.***> wrote:
@KeithMyers
I think more controllers need to be probed. I have encountered this issue with Intel Tiger Lake where the controller is the second
Can you restore original code of develop branch, and replace the below function https://github.com/cyring/CoreFreq/blob/e41ec49b5f3ff9085f5c4396ce236182fc8f2711/corefreqk.c#L6558
... with this code: static PCI_CALLBACK AMD_DataFabric_Rembrandt(struct pci_dev *pdev) { return AMD_17h_DataFabric( pdev, (const unsigned int[2][2]) { { 0x0, 0x20}, {0x10, 0x30} }, 0x40, 0x90, MC_MAX_CTRL, MC_MAX_CHA, (const unsigned short[]) {0x18} ); } (Rembrandt, like Raphael are both for DDR5. That's why this common function)
Rebuild and run CoreFreq, I just need the output of the UMC
Thank you
— Reply to this email directly, view it on GitHub, or unsubscribe. You are receiving this because you were mentioned.Message ID: @.***>
cyring
commented
1 year ago @KeithMyers Hello,
I just want to try AMD_17h_DataFabric with a max umc of 8 (aka MC_MAX_CTRL)
Sorry if my instructions were messed up by all the previous changes. You have to pull the develop branch again and go to AMD_DataFabric_Rembrandt function to make the change.
KeithMyers
commented
1 year ago Going to bed. I'll tackle the new build tomorrow morning. On Tuesday, December 20, 2022 at 11:46:20 PM PST, CyrIng @.***> wrote:
@KeithMyers Hello,
I just want to try AMD_17h_DataFabric with a max umc of 8 (aka MC_MAX_CTRL)
Sorry if my instructions were messed up by all the previous changes. You have to pull the develop branch again and go to AMD_DataFabric_Rembrandt function to make the change.
— Reply to this email directly, view it on GitHub, or unsubscribe. You are receiving this because you were mentioned.Message ID: @.***>
cyring
commented
1 year ago @Jon0
Heres latest
developbranch, BIOS set to 6000M/T... Zen UMC [14E0] Controller #0 Dual Channel Bus Rate 3000 MHz Bus Speed 3000 MHz DDR5 Speed 6000 MT/s Cha CL RCDr RCDw RP RAS RC RRDs RRDl FAW WTRs WTRl WR clRR clWW #0 40 40 40 40 77 146 8 15 32 8 30 90 8 23 #1 40 40 40 40 77 146 8 15 32 8 30 90 8 23 CWL RTP RdWr WrRd scWW sdWW ddWW scRR sdRR ddRR drRR drWW drWR drRRD #0 38 23 21 8 1 15 15 1 8 8 0 0 0 0 #1 38 23 22 8 1 15 15 1 8 8 0 0 0 0 REFI RFC1 RFC2 RFC4 RCPB RPPB BGS:Alt Ban Page CKE CMD GDM ECC #0 11677 312 192 0 0 0 ON OFF R0W0 0 0 1T ON 0 #1 11677 312 192 0 0 0 ON OFF R0W0 0 0 1T ON 0 MRD:PDA MOD:PDA WRMPR STAG PDM RDDATA WRD WRL RDL XS XP CPDED #0 42 32 42 32 24 7 0:F:0 28 6 26 36 914 23 15 #1 42 32 42 32 24 7 0:F:0 28 6 26 36 914 23 15 DIMM Geometry for channel #0 Slot Bank Rank Rows Columns Memory Size (MB) #0 #1 16 1 32768 1024 4096 CMK32GX5M2B6000C40 DIMM Geometry for channel #1 Slot Bank Rank Rows Columns Memory Size (MB) #0 #1 16 1 32768 1024 4096 CMK32GX5M2B6000C40
To fix the missing RFC4, can you please peek the following addresses:
./zencli smu 0x502c0
./zencli smu 0x502c4
./zencli smu 0x502c8
./zencli smu 0x502ccFyi RCPB and RPPB are empty on all Zen generations tested so far.
KeithMyers
commented
1 year ago No luck still.
$ corefreq-cli -M
Zen UMC [14E0]
Controller #0 Disabled
Controller #1 Disabled
Controller #2 Disabled
Controller #3 Disabled
Controller #4 Disabled @KeithMyers
No luck still.
$ corefreq-cli -M Zen UMC [14E0] Controller #0 Disabled Controller #1 Disabled Controller #2 Disabled Controller #3 Disabled Controller #4 Disabled
Did you have such error message in the kernel log ?
CoreFreq: AMD_17h_DataFabric() Break UMC(%hu) probing @ PCI(0x%x:0x0:0x%x)Yes, I have something similar
Dec 21 09:35:55 Pipsqueek kernel: [ 1169.389122] CoreFreq: AMD_SMN_Read(0, b50d6c) TryLock
Dec 21 09:35:55 Pipsqueek kernel: [ 1169.389127] CoreFreq: AMD_17h_DataFabric() Break UMC(5) probing @ PCI(0x0:0x0:0x80)00:18.0 Host bridge [0600]: Advanced Micro Devices, Inc. [AMD] Device [1022:14e0] 00:18.1 Host bridge [0600]: Advanced Micro Devices, Inc. [AMD] Device [1022:14e1] 00:18.2 Host bridge [0600]: Advanced Micro Devices, Inc. [AMD] Device [1022:14e2] 00:18.3 Host bridge [0600]: Advanced Micro Devices, Inc. [AMD] Device [1022:14e3] 00:18.4 Host bridge [0600]: Advanced Micro Devices, Inc. [AMD] Device [1022:14e4] 00:18.5 Host bridge [0600]: Advanced Micro Devices, Inc. [AMD] Device [1022:14e5] 00:18.6 Host bridge [0600]: Advanced Micro Devices, Inc. [AMD] Device [1022:14e6] 00:18.7 Host bridge [0600]: Advanced Micro Devices, Inc. [AMD] Device [1022:14e7]
@KeithMyers Can you try the attached archive ? The on-going development is to scan the eight possible controllers.
Jon0
commented
1 year ago Looks like something is at 0x502c8:
zencli smu 0x502c0
[0x000502c0] READ(smu) = 0x00000000 (0)
60 56 52 48 44 40 36 32 28 24 20 16 12 08 04 00
0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000
zencli smu 0x502c4
[0x000502c4] READ(smu) = 0x00000000 (0)
60 56 52 48 44 40 36 32 28 24 20 16 12 08 04 00
0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000
zencli smu 0x502c8
[0x000502c8] READ(smu) = 0x005a0186 (5898630)
60 56 52 48 44 40 36 32 28 24 20 16 12 08 04 00
0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0101 1010 0000 0001 1000 0110
zencli smu 0x502cc
[0x000502cc] READ(smu) = 0x00000000 (0)
60 56 52 48 44 40 36 32 28 24 20 16 12 08 04 00
0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 000000:18.0 Host bridge [0600]: Advanced Micro Devices, Inc. [AMD] Device [1022:14e0] 00:18.1 Host bridge [0600]: Advanced Micro Devices, Inc. [AMD] Device [1022:14e1] 00:18.2 Host bridge [0600]: Advanced Micro Devices, Inc. [AMD] Device [1022:14e2] 00:18.3 Host bridge [0600]: Advanced Micro Devices, Inc. [AMD] Device [1022:14e3] 00:18.4 Host bridge [0600]: Advanced Micro Devices, Inc. [AMD] Device [1022:14e4] 00:18.5 Host bridge [0600]: Advanced Micro Devices, Inc. [AMD] Device [1022:14e5] 00:18.6 Host bridge [0600]: Advanced Micro Devices, Inc. [AMD] Device [1022:14e6] 00:18.7 Host bridge [0600]: Advanced Micro Devices, Inc. [AMD] Device [1022:14e7]@KeithMyers Can you try the attached archive ? The on-going development is to scan the eight possible controllers.
Got a weird error for just doing make. My time is correct.
$ make
cc -Wall -Wfatal-errors -pthread -c corefreqd.c \
-D CORE_COUNT=256 -D TASK_ORDER=5 -D MAX_FREQ_HZ=6575000000 -D UBENCH=0 -D DELAY_TSC=1 \
-o corefreqd.o
cc -Wall -Wfatal-errors -c corefreqm.c \
-D CORE_COUNT=256 -D TASK_ORDER=5 -D MAX_FREQ_HZ=6575000000 -D UBENCH=0 -D DELAY_TSC=1 \
-o corefreqm.o
cc -Wall -Wfatal-errors corefreqd.c corefreqm.c \
-D CORE_COUNT=256 -D TASK_ORDER=5 -D MAX_FREQ_HZ=6575000000 -D UBENCH=0 -D DELAY_TSC=1 \
-o corefreqd -lpthread -lm -lrt
cc -Wall -Wfatal-errors -c corefreq-cli.c \
-D CORE_COUNT=256 -D TASK_ORDER=5 -D MAX_FREQ_HZ=6575000000 -D UBENCH=0 -D DELAY_TSC=1 \
-o corefreq-cli.o
cc -Wall -Wfatal-errors -c corefreq-ui.c \
-D CORE_COUNT=256 -D TASK_ORDER=5 -D MAX_FREQ_HZ=6575000000 -D UBENCH=0 -D DELAY_TSC=1 \
-o corefreq-ui.o
cc -Wall -Wfatal-errors -c corefreq-cli-rsc.c \
-D CORE_COUNT=256 -D TASK_ORDER=5 -D MAX_FREQ_HZ=6575000000 -D UBENCH=0 -D DELAY_TSC=1 \
-o corefreq-cli-rsc.o
cc -Wall -Wfatal-errors -c corefreq-cli-json.c \
-D CORE_COUNT=256 -D TASK_ORDER=5 -D MAX_FREQ_HZ=6575000000 -D UBENCH=0 -D DELAY_TSC=1 \
-o corefreq-cli-json.o
cc -Wall -Wfatal-errors -c corefreq-cli-extra.c \
-D CORE_COUNT=256 -D TASK_ORDER=5 -D MAX_FREQ_HZ=6575000000 -D UBENCH=0 -D DELAY_TSC=1 \
-o corefreq-cli-extra.o
cc -Wall -Wfatal-errors \
corefreq-cli.c corefreq-ui.c corefreq-cli-rsc.c \
corefreq-cli-json.c corefreq-cli-extra.c \
-D CORE_COUNT=256 -D TASK_ORDER=5 -D MAX_FREQ_HZ=6575000000 -D UBENCH=0 -D DELAY_TSC=1 \
-o corefreq-cli -lm -lrt
make -j1 -C /lib/modules/5.15.0-56-generic/build M=/home/keith/Downloads/CoreFreq modules
make[1]: Entering directory '/usr/src/linux-headers-5.15.0-56-generic'
make[2]: ```Warning: File '/home/keith/Downloads/CoreFreq/corefreqk.c' has modification time 1101 s in the future
CC [M] /home/keith/Downloads/CoreFreq/corefreqk.o
make[2]: warning: Clock skew detected. Your build may be incomplete.```
MODPOST /home/keith/Downloads/CoreFreq/Module.symvers
CC [M] /home/keith/Downloads/CoreFreq/corefreqk.mod.o
LD [M] /home/keith/Downloads/CoreFreq/corefreqk.ko
BTF [M] /home/keith/Downloads/CoreFreq/corefreqk.ko
Skipping BTF generation for /home/keith/Downloads/CoreFreq/corefreqk.ko due to unavailability of vmlinux
make[1]: Leaving directory '/usr/src/linux-headers-5.15.0-56-generic'Still no luck.
q$ ./corefreq-cli -M
Zen UMC [14E0]
Controller #0 Disabled
Controller #1 Disabled
Controller #2 Disabled
Controller #3 Disabled
Controller #4 Disabled
Controller #5 Disabled
Controller #6 Disabled
Controller #7 Disabled@Jon0
First 16 bits https://github.com/cyring/CoreFreq/blob/87976c73d11deb58b00875d1716575f6451c2ec8/amd_reg.h#L1889
In decimal tRFC4 = 390
zerofixed.Architecture is Zen4