To do list

[cyring]

Source	Issue	State	Comments
#399	[Airmont][SMBIOS] Wrong offset	Unsolved / Closed	Past manufacturer_id field
#389	[Intel][Gemini Lake] MCHBAR	Unsolved / Closed	Registers are empty
#378	[AMD][Raphael] SVI voltage	Closed	Workaround released
#378	[AMD][Raphael] HSMP unreachable	Opened	Protocol timeout
#378	[AMD][Raphael] Kernel symbols	Closed	kernel updated
#374	[Intel][Skylake/X] Non regression	Closed	Need processor
#366	[Intel][Airmont] Z8000 IMC	Closed	#399
#313	[Intel][Cascade Lake/X] IMC	Canceled	Need to develop on processor
#410	[Intel] Hardware Duty Cycling	Unsolved / Closed	No HDC cycles on TGL
#418	zen-kernel incompatible	Closed	Possible SMU conflict

[antermin]

Regarding #366, I have Celeron(R) CPU N3150, architecture shows Atom/Airmont.

Is there anything that I can help?

[cyring]

Regarding #366, I have Celeron(R) CPU N3150, architecture shows Atom/Airmont.

Is there anything that I can help?

I believe we should rather read "Braswell" ?

EDIT: Fixed and available in the develop branch for your testings.

Can you create a new issue Celeron(R) CPU N3150 then post details from CoreFreq:

corefreq-cli -s -n -m -n -B -n -M -n -C 1

[cyring]

Spreadtrum SC9853I CPUID 06_75 perhaps Airmont compatible ?

[cyring]

13th Gen MCHBAR Memory Controller

(part 3) (part 4) (part 5)

• impacts RPL, probably ADL, decoder: https://github.com/cyring/CoreFreq/blob/34efe5d3e6c79e5fddf78350da6fe4b7de0a63a8/corefreqk.c#L6145
• sub-channels are defined as a function of DDR Type