AMD Ryzen 5 7600 - Githubissues

chendo commented 1 month ago

Thank you for this project.

I've supplied the corefreq-cli -s for a Ryzen 5 7600G. Let me know if you'd like any other output.

Processor                                    [AMD Ryzen 5 7600 6-Core Processor]
|- Architecture                                                   [Zen4/Raphael]
|- Vendor ID                                                      [AuthenticAMD]
|- Microcode                                                        [0x0a601206]
|- Signature                                                           [  AF_61]
|- Stepping                                                            [      2]
|- Online CPU                                                          [ 12/ 12]
|- Base Clock                                                          [100.001]
|- Frequency            (MHz)                      Ratio                        
                 Min   3000.04                    <  30 >                       
                 Max   3800.05                    <  38 >                       
|- Factory                                                             [100.000]
                       3800                       [  38 ]                       
|- Performance                                                                  
                 TGT   3800.05                    <  38 >                       
   |- CPPC                                                                      
                 Min   3300.05                    <  33 >                       
                 Max    300.00                    <   3 >                       
                 TGT    300.00                    <   3 >                       
   |- Boost                                                            [ UNLOCK]
                 XFR   5100.07                    [  51 ]                       
                 CPB   5000.07                    [  50 ]                       
   |- P-State                                                                   
                 P1    3000.04                    <  30 >                       
|- Uncore                                                              [   LOCK]
                 CLK   1200.02                    [  12 ]                       
                 MEM   2400.03                    [  24 ]                       

Instruction Set Extensions                                                      
|- 3DNow!/Ext [N/N]          ADX [Y]          AES [Y]  AVX/AVX2 [Y/Y] 
|- AVX512-F     [Y]    AVX512-DQ [Y]  AVX512-IFMA [Y]   AVX512-PF [N] 
|- AVX512-ER    [N]    AVX512-CD [Y]    AVX512-BW [Y]   AVX512-VL [Y] 
|- AVX512-VBMI  [Y] AVX512-VBMI2 [Y]  AVX512-VNNI [Y]  AVX512-ALG [Y] 
|- AVX512-VPOP  [Y] AVX512-VNNIW [N] AVX512-FMAPS [N] AVX512-VP2I [N] 
|- AVX512-BF16  [Y] AVX-VNNI-VEX [N]    AVX-FP128 [N]   AVX-FP256 [Y] 
|- BMI1/BMI2  [Y/Y]         CLWB [Y]      CLFLUSH [Y] CLFLUSH-OPT [Y] 
|- CLAC-STAC    [Y]         CMOV [Y]    CMPXCHG8B [Y]  CMPXCHG16B [Y] 
|- F16C         [Y]          FPU [Y]         FXSR [Y]   LAHF-SAHF [Y] 
|- MMX/Ext    [Y/Y] MON/MWAITX [Y/Y]        MOVBE [Y]   PCLMULQDQ [Y] 
|- POPCNT       [Y]       RDRAND [Y]       RDSEED [Y]      RDTSCP [Y] 
|- SEP          [Y]          SHA [Y]          SSE [Y]        SSE2 [Y] 
|- SSE3         [Y]        SSSE3 [Y]  SSE4.1/4A [Y/Y]      SSE4.2 [Y] 
|- SERIALIZE    [N]      SYSCALL [Y]        RDPID [Y]        UMIP [Y] 
|- VAES         [Y]   VPCLMULQDQ [Y]   PREFETCH/W [Y]       LZCNT [Y] 

Features                                                                        
|- 1 GB Pages Support                                      1GB-PAGES   [Capable]
|- 100 MHz multiplier Control                            100MHzSteps   [Missing]
|- Advanced Configuration & Power Interface                     ACPI   [Capable]
|- Advanced Programmable Interrupt Controller                   APIC   [Capable]
|- Advanced Virtual Interrupt Controller                        AVIC   [Capable]
|- APIC Timer Invariance                                        ARAT   [Capable]
|- LOCK prefix to read CR8                                    AltMov   [Capable]
|- Clear Zero Instruction                                     CLZERO   [Capable]
|- Core Multi-Processing                                  CMP Legacy   [Capable]
|- L1 Data Cache Context ID                                  CNXT-ID   [Missing]
|- Collaborative Processor Performance Control                  CPPC   [Capable]
|- Direct Cache Access                                           DCA   [Missing]
|- Debugging Extension                                            DE   [Capable]
|- Debug Store & Precise Event Based Sampling               DS, PEBS   [Missing]
|- CPL Qualified Debug Store                                  DS-CPL   [Missing]
|- 64-Bit Debug Store                                         DTES64   [Missing]
|- Fast Short REP MOVSB                                         FSRM   [Capable]
|- Fast-String Operation                                        ERMS   [Capable]
|- Fused Multiply Add                                           FMA4   [Missing]
|- Fused Multiply Add                                            FMA   [Capable]
|- Hardware Lock Elision                                         HLE   [Missing]
|- Hyper-Threading Technology                                    HTT   [Capable]
|- Hardware P-state control                                      HwP   [Capable]
|- Instruction Based Sampling                                    IBS   [Capable]
|- Instruction INVLPGB                                       INVLPGB   [Missing]
|- Instruction INVPCID                                       INVPCID   [Capable]
|- Long Mode 64 bits                                       IA64 | LM   [Capable]
|- LightWeight Profiling                                         LWP   [Missing]
|- Memory Bandwidth Enforcement                                  MBE   [Capable]
|- Machine-Check Architecture                                    MCA   [Capable]
|- Instruction MCOMMIT                                       MCOMMIT   [Missing]
|- Model Specific Registers                                      MSR   [Capable]
|- Memory Type Range Registers                                  MTRR   [Capable]
|- No-Execute Page Protection                                     NX   [Capable]
|- OS-Enabled Ext. State Management                          OSXSAVE   [Capable]
|- OS Visible Work-around                                       OSVW   [Capable]
|- Physical Address Extension                                    PAE   [Capable]
|- Page Attribute Table                                          PAT   [Capable]
|- Pending Break Enable                                          PBE   [Missing]
|- Process Context Identifiers                                  PCID   [Missing]
|- Perfmon and Debug Capability                                 PDCM   [Missing]
|- Page Global Enable                                            PGE   [Capable]
|- Page Size Extension                                           PSE   [Capable]
|- 36-bit Page Size Extension                                  PSE36   [Capable]
|- Processor Serial Number                                       PSN   [Missing]
|- Resource Director Technology/PQE                            RDT-A   [Capable]
|- Resource Director Technology/PQM                            RDT-M   [Capable]
|- Read Processor Register at User level                       RDPRU   [Capable]
|- Restricted Transactional Memory                               RTM   [Missing]
|- Safer Mode Extensions                                         SMX   [Missing]
|- Self-Snoop                                                     SS   [Missing]
|- Supervisor-Mode Access Prevention                            SMAP   [Capable]
|- Supervisor-Mode Execution Prevention                         SMEP   [Capable]
|- Trailing Bit Manipulation                                     TBM   [Missing]
|- Translation Cache Extension                                   TCE   [Capable]
|- Time Stamp Counter                                            TSC [Invariant]
|- Time Stamp Counter Deadline                          TSC-DEADLINE   [Missing]
|- TSX Force Abort MSR Register                            TSX-ABORT   [Missing]
|- TSX Suspend Load Address Tracking                       TSX-LDTRK   [Missing]
|- User-Mode Instruction Prevention                             UMIP   [Capable]
|- Virtual Mode Extension                                        VME   [Capable]
|- Virtual Machine Extensions                                    VMX   [Missing]
|- Write Back & Do Not Invalidate Cache                     WBNOINVD   [Capable]
|- Extended xAPIC Support                                     x2APIC   [  xAPIC]
|- AVIC controller for x2APIC                                 x2AVIC   [Capable]
|- XSAVE/XSTOR States                                          XSAVE   [Capable]
|- xTPR Update Control                                          xTPR   [Missing]
|- Extended Operation Support                                    XOP   [Missing]
Mitigation mechanisms                                                           
|- Indirect Branch Restricted Speculation                       IBRS   [Capable]
   |- IBRS Always-On preferred by processor                            [ Unable]
   |- IBRS preferred over software solution                            [Capable]
   |- IBRS provides same speculation limits                            [Capable]
|- Indirect Branch Prediction Barrier                           IBPB   [Capable]
|- Single Thread Indirect Branch Predictor                     STIBP   [ Enable]
|- Speculative Store Bypass Disable                             SSBD   [Capable]
   |- SSBD use VIRT_SPEC_CTRL register                                 [ Unable]
   |- SSBD not needed on this processor                                [ Unable]
|- No Branch Type Confusion                                   BTC_NO   [Capable]
|- BTC on Non-Branch instruction                            BTC-NOBR   [Capable]
|- Limited Early Redirect Window                            AGENPICK   [ Unable]
|- Arch - No Fast Predictive Store Forwarding                   PSFD   [Capable]
|- Arch - Enhanced Predictive Store Forwarding                  EPSF   [Capable]
|- Arch - Cross Processor Information Leak                XPROC_LEAK   [ Unable]
Security Features                                                               
|- CET Shadow Stack features                                  CET-SS   [Capable]
|- Secure Init and Jump with Attestation                      SKINIT   [Capable]
|- Secure Encrypted Virtualization                               SEV   [Missing]
|- SEV - Encrypted State                                      SEV-ES   [Missing]
|- SEV - Secure Nested Paging                                SEV-SNP   [Missing]
|- Guest Mode Execute Trap                                      GMET   [Capable]
|- Supervisor Shadow Stack                                       SSS   [Capable]
|- VM Permission Levels                                         VMPL   [Missing]
|- VMPL Supervisor Shadow Stack                             VMPL-SSS   [Missing]
|- Secure Memory Encryption                                      SME   [Capable]
|- Transparent SME                                              TSME   [ Enable]
|- Secure Multi-Key Memory Encryption                         SME-MK   [Missing]
|- DRAM Data Scrambling                                    Scrambler   [ Enable]

Technologies                                                                    
|- Instruction Cache Unit                                                       
   |- L1 IP Prefetcher                                          L1 HW IP   < ON>
|- Data Cache Unit                                                              
   |- L1 Prefetcher                                                L1 HW   < ON>
|- Cache Prefetchers                                                            
   |- L2 Prefetcher                                                L2 HW   < ON>
   |- L1 Stride Prefetcher                                     L1 Stride   < ON>
   |- L1 Region Prefetcher                                     L1 Region   < ON>
   |- L1 Burst Prefetch Mode                                    L1 Burst   < ON>
   |- L2 Stream HW Prefetcher                                  L2 Stream   < ON>
   |- L2 Up/Down Prefetcher                                   L2 Up/Down   < ON>
|- System Management Mode                                       SMM-Lock   [ ON]
|- Simultaneous Multithreading                                       SMT   [ ON]
|- PowerNow!                                                         CnQ   [ ON]
|- Core C-States                                                     CCx   [ ON]
|- Core Performance Boost                                            CPB   < ON>
|- Watchdog Timer                                                    WDT   < ON>
|- Virtualization                                                    SVM   [ ON]
   |- I/O MMU                                                      AMD-V   [ ON]
   |- Version                                                     [         0.1]
   |- Hypervisor                                                           [OFF]
   |- Vendor ID                                                   [         N/A]

Performance Monitoring                                                          
|- Version                                                        PM       [  2]
|- Counters:          General                   Fixed                           
|           {  6,  6, 16 } x 48 bits            3 x 64 bits                     
|- Enhanced Halt State                                           C1E       <OFF>
|- C2 UnDemotion                                                 C2U       < ON>
|- C3 UnDemotion                                                 C3U       < ON>
|- Core C6 State                                                 CC6       < ON>
|- Package C6 State                                              PC6       < ON>
|- Legacy Frequency ID control                                   FID       [OFF]
|- Legacy Voltage ID control                                     VID       [OFF]
|- P-State Hardware Coordination Feedback                MPERF/APERF       [ ON]
|- Core C-States                                                                
   |- C-States Base Address                                      BAR   [ 0x413 ]
|- ACPI Processor C-States                                      _CST   [      3]
|- MONITOR/MWAIT                                                                
   |- State index:    #0    #1    #2    #3    #4    #5    #6    #7              
   |- Sub C-State:     1     1     0     0     0     0     0     0              
   |- Monitor-Mwait Extensions                                   EMX   [Capable]
   |- Interrupt Break-Event                                      IBE   [Capable]
|- Core Cycles                                                         [Capable]
|- Instructions Retired                                                [Capable]
|- Reference Cycles                                                    [Capable]
|- Last Level Cache References                                         [Capable]
|- Global Time Stamp Counter                                           [Missing]
|- Data Fabric Performance Counter                                     [Capable]
|- Core Performance Counter                                            [Capable]
|- Processor Performance Control                                _PCT   [ Enable]
|- Performance Supported States                                 _PSS   [      2]
|- Performance Present Capabilities                             _PPC   [      0]
|- Continuous Performance Control                               _CPC   [Missing]

Power, Current & Thermal                                                        
|- Temperature Offset:Junction                                 TjMax [ 49: 95 C]
|- CPPC Energy Preference                                        EPP   <      0>
|- Digital Thermal Sensor                                        DTS   [Capable]
|- Power Limit Notification                                      PLN   [Missing]
|- Package Thermal Management                                    PTM   [Missing]
|- Thermal Monitor 1                                             TTP   [ Enable]
|- Thermal Monitor 2                                             HTC   [ Enable]
|- Thermal Design Power                                          TDP   [Missing]
   |- Minimum Power                                              Min   [Missing]
   |- Maximum Power                                              Max   [Missing]
|- Thermal Design Power                                      Package   [Disable]
   |- Power Limit                                                PL1   [    0 W]
   |- Time Window                                                TW1   [   0 ns]
   |- Power Limit                                                PL2   [    0 W]
   |- Time Window                                                TW2   [   0 ns]
|- Thermal Design Power                                         Core   [Disable]
   |- Power Limit                                                PL1   [    0 W]
   |- Time Window                                                TW1   [   0 ns]
|- Thermal Design Power                                       Uncore   [Disable]
   |- Power Limit                                                PL1   [    0 W]
   |- Time Window                                                TW1   [   0 ns]
|- Thermal Design Power                                         DRAM   [Disable]
   |- Power Limit                                                PL1   [    0 W]
   |- Time Window                                                TW1   [   0 ns]
|- Thermal Design Power                                     Platform   [Disable]
   |- Power Limit                                                PL1   [    0 W]
   |- Time Window                                                TW1   [   0 ns]
   |- Power Limit                                                PL2   [    0 W]
   |- Time Window                                                TW2   [   0 ns]
|- Package Power Tracking                                        PPT   [Missing]
|- Electrical Design Current                                     EDC   [Missing]
|- Thermal Design Current                                        TDC   [Missing]
|- Core Thermal Point                                                           
|- Package Thermal Point                                                        
   |- Thermal Monitor Trip                                     Limit   [  115 C]
   |- HTC Temperature Limit                                    Limit   [  127 C]
   |- HTC Temperature Hysteresis                           Threshold   [    2 C]
|- Units                                                                        
   |- Power                                               watt   [      Missing]
   |- Energy                                             joule   [  0.000015259]
   |- Window                                            second   [  0.000976562]

cyring commented 1 month ago

Hi Thank you very much for your help.

Can you provide screenshots of the Sensors view (Vcore, Power, Temperature) when system is idle; single core stressed; all cores stressed ? Please use one of the integrated Tools > Atomic and Tools > Conics

I would like also to check the Memory Controller and other results:

corefreq-cli -k -n -B -n -M

Also various Caches and CPPC

corefreq-cli -m -n -Z

cyring commented 1 month ago

Also some new feature bits are pending in the develop branch. Can you please show results of corefreq-cli -s -n -m

cyring commented 1 month ago

By the way 7600G with a G letter is a very mysterious processor name. I don't find its reference at AMD !

cyring commented 4 weeks ago

+1

chendo commented 3 weeks ago

Apologies for late reply, it's been a busy week!

Under Atomic load:

Under Conics load:

# corefreq-cli -k -n -B -n -M
Linux:                                                                          
|- Release                                                      [6.1.106-Unraid]
|- Version                 [#1 SMP PREEMPT_DYNAMIC Wed Aug 21 23:36:07 PDT 2024]
|- Machine                                                              [x86_64]
Memory:                                                                         
|- Total RAM                                                         31987648 KB
|- Shared RAM                                                          407348 KB
|- Free RAM                                                          28458664 KB
|- Buffer RAM                                                           13424 KB
|- Total High                                                               0 KB
|- Free High                                                                0 KB
Clock Source                                                  <            hpet>
CPU-Freq driver                                               [      amd-pstate]
Governor                                                      [    conservative]
CPU-Idle driver                                               [         Missing]
|- Idle Limit                                                 [             N/A]

[ 0] American Megatrends Inc.                                                   
[ 1] 3056                                                                       
[ 2] 10/26/2024                                                                 
[ 3] ASUS                                                                       
[ 4] System Product Name                                                        
[ 5] System Version                                                             
[ 6] S---e---e---l---m---                                                       
[ 7] SKU                                                                        
[ 8] To be filled by O.E.M.                                                     
[ 9] ASUSTeK COMPUTER INC.                                                      
[10] PRIME X670-P WIFI                                                          
[11] Rev 1.xx                                                                   
[12] 2---3---9---1--                                                            
[13] Number Of Devices:4\Maximum Capacity:134217728 kilobytes                   
[14]                                                                            
[15] DIMM 1\P0 CHANNEL A                                                        
[16]                                                                            
[17]                                                                            
[18]                                                                            
[19] Kingston                                                                   
[20]                                                                            
[21]                                                                            
[22]                                                                            
[23] 9965794-016.A00G                                                           
[24]                                                                            
[25]                                                                            

                              Zen UMC  [14E0]                              
Controller #0                                               Single Channel 
 Bus Rate  2400 MHz       Bus Speed 2396 MHz           DDR5 Speed 4792 MT/s

 Cha   CL  RCDr RCDw  RP  RAS   RC  RRDs RRDl FAW  WTRs WTRl  WR  clRR clWW
  #0   40   39   39   39   77  116    8   12   32    6   24   72    5   17 
      CWL  RTP RdWr WrRd scWW sdWW ddWW scRR sdRR ddRR drRR drWW drWR drRRD
  #0   38   18   20    7    1    9    9    1    9    9    0    0    0    0 
      REFI RFC1 RFC2 RFCsb RCPB RPPB BGS:Alt  Ban  Page  CKE  CMD  GDM  ECC
  #0  9347  312  192  312   0    0    ON OFF  R0W0   0    0   1T    ON   0 
      MRD:PDA   MOD:PDA  WRMPR STAG PDM RDDATA WRD  WRL  RDL  XS   XP CPDED
  #0   34  32    34  32    24    7 0:F:1   28   6   26   34  732   18   12 

 DIMM Geometry for channel #0                                              
      Slot Bank Rank     Rows   Columns    Memory Size (MB)                
       #0                                                                  
       #1    32    1     65536      1024          16384    9965794-016.A00G

# corefreq-cli -m -n -Z
CPU Pkg  Apic  Core/Thread  Caches      (w)rite-Back (i)nclusive              
 #   ID   ID CCD CCX ID/ID L1-Inst Way  L1-Data Way      L2  Way      L3  Way 
000:BSP    0   0  0   0  0      32  8        32  8      1024  8 i   32768 16w 
001:  0    2   0  0   1  0      32  8        32  8      1024  8 i   32768 16w 
002:  0    4   0  0   2  0      32  8        32  8      1024  8 i   32768 16w 
003:  0    6   0  0   3  0      32  8        32  8      1024  8 i   32768 16w 
004:  0    8   0  1   4  0      32  8        32  8      1024  8 i   32768 16w 
005:  0   10   0  1   5  0      32  8        32  8      1024  8 i   32768 16w 
006:  0    1   0  0   0  1      32  8        32  8      1024  8 i   32768 16w 
007:  0    3   0  0   1  1      32  8        32  8      1024  8 i   32768 16w 
008:  0    5   0  0   2  1      32  8        32  8      1024  8 i   32768 16w 
009:  0    7   0  0   3  1      32  8        32  8      1024  8 i   32768 16w 
010:  0    9   0  1   4  1      32  8        32  8      1024  8 i   32768 16w 
011:  0   11   0  1   5  1      32  8        32  8      1024  8 i   32768 16w 

CoreFreq.  Copyright (C) 2015-2024 CYRIL COURTIAT

Usage:  corefreq-cli [-Option <argument>] [-Command <argument>]

    Interface options
        -Oa     Absolute frequency
        -Op     Show Package C-States
        -Ok     Memory unit in kilobyte
        -Om     Memory unit in megabyte
        -Og     Memory unit in gigabyte
        -OW     Toggle Energy units
        -OF     Temperature in Fahrenheit
        -OJ #   SMBIOS string index number
        -OE #   Color theme index number
        -OY     Show Secret Data

    Command options
        -t <v>  Show Top (default) with optional <v>iew:
                {       frequency, instructions, core, idle, package, tasks,
                        interrupts, sensors, voltage, power, slices, custom }
        -d      Show Dashboard
        -C <#>  Monitor Sensors
        -V <#>  Monitor Voltage
        -W <#>  Monitor Power
        -g <#>  Monitor Package
        -c <#>  Monitor Counters
        -i <#>  Monitor Instructions
        -s      Print System Information
        -j      Print System Information (json-encoded)
        -z      Print Performance Capabilities
        -M      Print Memory Controller
        -R      Print System Registers
        -m      Print Topology
        -u      Print CPUID
        -B      Print SMBIOS
        -k      Print Kernel
        -n      New line
        -h      Print out this message
        -v      Print the version number

Exit status:
        0       SUCCESS         Successful execution
        3       CMD_SYNTAX      Command syntax error
        4       SHM_FILE        Shared memory file error
        5       SHM_MMAP        Shared memory mapping error
        6       PERM_ERR        Execution not permitted
        7       MEM_ERR         Memory operation error
        8       EXEC_ERR        General execution error
        9       SYS_CALL        System call error

Report bugs to labs[at]cyring.fr

I'm on Unraid so no easy way for me to get develop I don't think.

My bad, I thought G is meant to signify onboard GPU. Could have sworn it was part of the model number at least some generations ago.

cyring commented 3 weeks ago

Thank you very much

Sorry for the command line mistake to read the CPPC which uses a lower z

corefreq-cli -m -n -z

You may also have noticed the wrong DIMM size decoded

 DIMM Geometry for channel #0                                              
      Slot Bank Rank     Rows   Columns    Memory Size (MB)                
       #0                                                                  
       #1    32    1     65536      1024          16384    9965794-016.A00G

Size has to be 32 GB and according to Kingston datasheet I should have decoded 2 ranks rather than 1

I need to dump your 7600 Memory Controller Registers to understand things about DDR5 based on AMD Family 1A specification 57238_C1_pub_4.pdf chapter 9.3 UMC Registers

I made zencli to read such registers.

Can you please compile and dump those addresses ?

## Compilation
cc zencli.c -o zencli

## Read as root
## (up to 4 theorical channels)

### DRAM Address Configuration 
./zencli smu 0x50040
./zencli smu 0x50044
./zencli smu 0x50048
./zencli smu 0x5004c

### DIMM Configuration
./zencli smu 0x50090
./zencli smu 0x50094

### UMC Configuration
./zencli smu 0x50100

### SDP Control
./zencli smu 0x50104

### DRAM ECC Control
./zencli smu 0x5014c

chendo commented 3 weeks ago

# corefreq-cli -m -n -z
CPU Pkg  Apic  Core/Thread  Caches      (w)rite-Back (i)nclusive              
 #   ID   ID CCD CCX ID/ID L1-Inst Way  L1-Data Way      L2  Way      L3  Way 
000:BSP    0   0  0   0  0      32  8        32  8      1024  8 i   32768 16w 
001:  0    2   0  0   1  0      32  8        32  8      1024  8 i   32768 16w 
002:  0    4   0  0   2  0      32  8        32  8      1024  8 i   32768 16w 
003:  0    6   0  0   3  0      32  8        32  8      1024  8 i   32768 16w 
004:  0    8   0  1   4  0      32  8        32  8      1024  8 i   32768 16w 
005:  0   10   0  1   5  0      32  8        32  8      1024  8 i   32768 16w 
006:  0    1   0  0   0  1      32  8        32  8      1024  8 i   32768 16w 
007:  0    3   0  0   1  1      32  8        32  8      1024  8 i   32768 16w 
008:  0    5   0  0   2  1      32  8        32  8      1024  8 i   32768 16w 
009:  0    7   0  0   3  1      32  8        32  8      1024  8 i   32768 16w 
010:  0    9   0  1   4  1      32  8        32  8      1024  8 i   32768 16w 
011:  0   11   0  1   5  1      32  8        32  8      1024  8 i   32768 16w 

|- Collaborative Processor Performance Control                  CPPC       < ON>
   |- Capabilities     Lowest      Efficient     Guaranteed        Highest      
   |- CPU #0     299.35 (  3)  1895.89 ( 19)  2394.80 ( 24)  3492.42 ( 35)      
   |- CPU #1     299.36 (  3)  1895.93 ( 19)  2394.86 ( 24)  3592.30 ( 36)      
   |- CPU #2     299.44 (  3)  1896.45 ( 19)  2395.51 ( 24)  3593.26 ( 36)      
   |- CPU #3     299.37 (  3)  1895.99 ( 19)  2394.94 ( 24)  3492.62 ( 35)      
   |- CPU #4     299.37 (  3)  1896.02 ( 19)  2394.97 ( 24)  3293.08 ( 33)      
   |- CPU #5     299.44 (  3)  1896.44 ( 19)  2395.50 ( 24)  3393.63 ( 34)      
   |- CPU #6     299.40 (  3)  1896.20 ( 19)  2395.20 ( 24)  3493.00 ( 35)      
   |- CPU #7     299.40 (  3)  1896.22 ( 19)  2395.23 ( 24)  3592.84 ( 36)      
   |- CPU #8     299.44 (  3)  1896.46 ( 19)  2395.53 ( 24)  3593.30 ( 36)      
   |- CPU #9     299.41 (  3)  1896.25 ( 19)  2395.26 ( 24)  3493.09 ( 35)      
   |- CPU #10    299.41 (  3)  1896.24 ( 19)  2395.25 ( 24)  3293.47 ( 33)      
   |- CPU #11    299.44 (  3)  1896.46 ( 19)  2395.53 ( 24)  3393.67 ( 34)

Yeah, the RAM is meant to be 32GB. I'll have a crack at compiling zencli another time when I'm not fighting Docker

cyring commented 3 weeks ago

Thank you. Fyi, your outputs are listed at Ryzen 5 7600 in the Wiki/CPU-support

cyring commented 3 weeks ago

Could you please print the CPUID using corefreq-cli -u The tree of CPU #0 will be enough

_Because I want to decode the CPUID_Fn80000026_ECX_x0[0...3] [Extended CPU Topology] for CCX enumeration_

chendo commented 3 weeks ago

CPU #0   function         EAX          EBX          ECX          EDX            
|- 00000000:00000000    00000010     68747541     444d4163     69746e65         
   |- Largest Standard Function=00000010                                        
|- 80000000:00000000    80000028     68747541     444d4163     69746e65         
   |- Largest Extended Function=80000028                                        
|- 00000001:00000000    00a60f12     000c0800     7ed8320b     178bfbff         
|- 00000002:00000000    00000000     00000000     00000000     00000000         
|- 00000003:00000000    00000000     00000000     00000000     00000000         
|- 00000004:00000000    00000000     00000000     00000000     00000000         
|- 00000004:00000001    00000000     00000000     00000000     00000000         
|- 00000004:00000002    00000000     00000000     00000000     00000000         
|- 00000004:00000003    00000000     00000000     00000000     00000000         
|- 00000005:00000000    00000040     00000040     00000003     00000011         
|- 00000006:00000000    00000004     00000000     00000001     00000000         
|- 00000007:00000000    00000001     f1bf97a9     00405fde     10000010         
|- 00000007:00000001    00000020     00000000     00000000     00000000         
|- 00000007:00000002    00000000     00000000     00000000     00000000         
|- 00000009:00000000    00000000     00000000     00000000     00000000         
|- 0000000a:00000000    00000000     00000000     00000000     00000000         
|- 0000000b:00000000    00000001     00000002     00000100     00000000         
|- 0000000d:00000000    000002e7     00000988     00000988     00000000         
|- 0000000d:00000001    0000000f     00000988     00001800     00000000         
|- 0000000d:00000002    00000100     00000240     00000000     00000000         
|- 0000000d:00000003    00000000     00000000     00000000     00000000         
|- 0000000d:00000004    00000000     00000000     00000000     00000000         
|- 0000000d:00000009    00000008     00000980     00000000     00000000         
|- 0000000d:0000000b    00000010     00000000     00000001     00000000         
|- 0000000d:0000000c    00000018     00000000     00000001     00000000         
|- 0000000d:0000003e    00000000     00000000     00000000     00000000         
|- 0000000f:00000000    00000000     000000ff     00000000     00000002         
|- 0000000f:00000001    00000014     00000040     000000ff     00000007         
|- 00000010:00000000    00000000     00000002     00000000     00000000         
|- 00000010:00000001    0000000f     00000000     00000004     0000000f         
|- 00000010:00000002    00000000     00000000     00000000     00000000         
|- 00000010:00000003    00000000     00000000     00000000     00000000         
|- 00000012:00000000    00000000     00000000     00000000     00000000         
|- 00000012:00000001    00000000     00000000     00000000     00000000         
|- 00000012:00000002    00000000     00000000     00000000     00000000         
|- 00000014:00000000    00000000     00000000     00000000     00000000         
|- 00000014:00000001    00000000     00000000     00000000     00000000         
|- 00000015:00000000    00000000     00000000     00000000     00000000         
|- 00000016:00000000    00000000     00000000     00000000     00000000         
|- 00000017:00000000    00000000     00000000     00000000     00000000         
|- 00000017:00000001    00000000     00000000     00000000     00000000         
|- 00000017:00000002    00000000     00000000     00000000     00000000         
|- 00000017:00000003    00000000     00000000     00000000     00000000         
|- 00000018:00000000    00000000     00000000     00000000     00000000         
|- 00000018:00000001    00000000     00000000     00000000     00000000         
|- 00000018:00000002    00000000     00000000     00000000     00000000         
|- 00000018:00000003    00000000     00000000     00000000     00000000         
|- 00000018:00000004    00000000     00000000     00000000     00000000         
|- 00000019:00000000    00000000     00000000     00000000     00000000         
|- 0000001a:00000000    00000000     00000000     00000000     00000000         
|- 0000001b:00000000    00000000     00000000     00000000     00000000         
|- 0000001c:00000000    00000000     00000000     00000000     00000000         
|- 0000001d:00000000    00000000     00000000     00000000     00000000         
|- 0000001d:00000001    00000000     00000000     00000000     00000000         
|- 0000001e:00000000    00000000     00000000     00000000     00000000         
|- 0000001f:00000000    00000000     00000000     00000000     00000000         
|- 00000020:00000000    00000000     00000000     00000000     00000000         
|- 00000023:00000000    00000000     00000000     00000000     00000000         
|- 00000023:00000001    00000000     00000000     00000000     00000000         
|- 00000023:00000002    00000000     00000000     00000000     00000000         
|- 00000023:00000003    00000000     00000000     00000000     00000000         
|- 80000001:00000000    00a60f12     00000000     75c237ff     2fd3fbff         
|- 80000002:00000000    20444d41     657a7952     2035206e     30303637         
|- 80000003:00000000    432d3620     2065726f     636f7250     6f737365         
|- 80000004:00000000    20202072     20202020     20202020     00202020         
|- 80000005:00000000    ff48ff40     ff48ff40     20080140     20080140         
|- 80000006:00000000    5c002200     6c004200     04006140     01009140         
|- 80000007:00000000    00000000     0000003b     00000000     00006799         
|- 80000008:00000000    00003030     791ef257     0000400b     00010000         
|- 8000000a:00000000    00000001     00008000     00000000     1ebfbcff         
|- 80000019:00000000    f048f040     f0400000     00000000     00000000         
|- 8000001a:00000000    00000006     00000000     00000000     00000000         
|- 8000001b:00000000    00000bff     00000000     00000000     00000000         
|- 8000001c:00000000    00000000     00000000     00000000     00000000         
|- 8000001d:00000000    00004121     01c0003f     0000003f     00000000         
|- 8000001d:00000001    00004122     01c0003f     0000003f     00000000         
|- 8000001d:00000002    00004143     01c0003f     000007ff     00000002         
|- 8000001d:00000003    0002c163     03c0003f     00007fff     00000001         
|- 8000001d:00000004    00000000     00000000     00000000     00000000         
|- 8000001e:00000000    00000000     00000100     00000000     00000000         
|- 8000001f:00000000    00000001     000000b3     00000000     00000000         
|- 80000020:00000000    00000000     0000001e     00000000     00000000         
|- 80000020:00000001    0000000b     00000000     00000000     0000000f         
|- 80000020:00000002    0000000b     00000000     00000000     0000000f         
|- 80000020:00000003    00000000     00000002     0000007f     00000000         
|- 80000021:00000000    00062fcf     0000015c     00000000     00000000         
|- 80000022:00000000    00000007     00044106     00000001     00000000         
|- 80000023:00000000    00000000     00000000     00000000     00000000         
|- 80000026:00000000    00000001     00000002     00000100     00000000         
|- 80000026:00000001    00000004     0000000c     00000201     00000000         
|- 80000026:00000002    00000004     0000000c     00000302     00000000         
|- 80000026:00000003    00000004     0000000c     00000403     00000000         
|- 40000000:00000000    00000000     00000000     00000000     00000000         
|- 40000001:00000000    00000000     00000000     00000000     00000000         
|- 40000002:00000000    00000000     00000000     00000000     00000000         
|- 40000003:00000000    00000000     00000000     00000000     00000000         
|- 40000004:00000000    00000000     00000000     00000000     00000000         
|- 40000005:00000000    00000000     00000000     00000000     00000000         
|- 40000006:00000000    00000000     00000000     00000000     00000000

cyring commented 3 weeks ago

Thank you. May ask you CPUID for all CPUs ?

cyring commented 3 weeks ago

" how to determine the number of CCD " question has been asked at community.amd.com

Refer to CPUID Fn8000_0026 specs 1 2

cyring commented 3 weeks ago

My understanding is that Core Complex in Raphael is available with 7950X but not with 7600

@tofurky and @amfern : can you please post all CPUID dump from your 7950X ?

corefreq-cli -u

tofurky commented 3 weeks ago

My understanding is that Core Complex in Raphael is available with 7950X but not with 7600

@tofurky and @amfern : can you please post all CPUID dump from your 7950X ?
corefreq-cli -u

corefreq-cli_-u_7950x.txt

amfern commented 3 weeks ago

corefreq-cli_-u_7950x.txt

cyring commented 2 weeks ago

@chendo Hello, I really need the whole CPUID of your 7600 to debug the CPU cluster map

corefreq-cli -u

Thank you

cyring commented 1 week ago

Since first Zen families (Ryzen, TR, EPYC) with less than 256 CPUs, I could simply compute CCD = (APIC_ID & 0xf0) >> 4

In wiki, especially among EPYC, I don't have samples with more than 256 CPUs to evaluate the APIC ID, but if it relies in a range mask of [0xfff - 0x100] then CCD = (APIC_ID & 0xf00) >> 8

CCX should be derived from something. So far code is employing the Core ID but CCD would be more appropriated to derive cases of 4 or 8 cluster size.

I don't see how I can introduce code changes without those EPYC for non regression or improvement tests ?

cyring commented 1 week ago

@amfern @tofurky @chendo Can you please have a try to the branch develop_amd_ext_apic_id and post the output of corefreq-cli -m

tofurky commented 1 week ago

@amfern @tofurky @chendo Can you please have a try to the branch develop_amd_ext_apic_id and post the output of corefreq-cli -m

root@aquos:/usr/src/corefreqk-1.98# corefreq-cli -m
CPU Pkg  Apic  Core/Thread  Caches      (w)rite-Back (i)nclusive              
 #   ID   ID CCD CCX ID/ID L1-Inst Way  L1-Data Way      L2  Way      L3  Way 
000:BSP    0   0  0   0  0      32  8        32  8      1024  8 i   65536 16w 
001:  0    2   0  0   1  0      32  8        32  8      1024  8 i   65536 16w 
002:  0    4   0  0   2  0      32  8        32  8      1024  8 i   65536 16w 
003:  0    6   0  0   3  0      32  8        32  8      1024  8 i   65536 16w 
004:  0    8   0  1   4  0      32  8        32  8      1024  8 i   65536 16w 
005:  0   10   0  1   5  0      32  8        32  8      1024  8 i   65536 16w 
006:  0   12   0  1   6  0      32  8        32  8      1024  8 i   65536 16w 
007:  0   14   0  1   7  0      32  8        32  8      1024  8 i   65536 16w 
008:  0   16   1  2   8  0      32  8        32  8      1024  8 i   65536 16w 
009:  0   18   1  2   9  0      32  8        32  8      1024  8 i   65536 16w 
010:  0   20   1  2  10  0      32  8        32  8      1024  8 i   65536 16w 
011:  0   22   1  2  11  0      32  8        32  8      1024  8 i   65536 16w 
012:  0   24   1  3  12  0      32  8        32  8      1024  8 i   65536 16w 
013:  0   26   1  3  13  0      32  8        32  8      1024  8 i   65536 16w 
014:  0   28   1  3  14  0      32  8        32  8      1024  8 i   65536 16w 
015:  0   30   1  3  15  0      32  8        32  8      1024  8 i   65536 16w 
016:  0    1   0  0   0  1      32  8        32  8      1024  8 i   65536 16w 
017:  0    3   0  0   1  1      32  8        32  8      1024  8 i   65536 16w 
018:  0    5   0  0   2  1      32  8        32  8      1024  8 i   65536 16w 
019:  0    7   0  0   3  1      32  8        32  8      1024  8 i   65536 16w 
020:  0    9   0  1   4  1      32  8        32  8      1024  8 i   65536 16w 
021:  0   11   0  1   5  1      32  8        32  8      1024  8 i   65536 16w 
022:  0   13   0  1   6  1      32  8        32  8      1024  8 i   65536 16w 
023:  0   15   0  1   7  1      32  8        32  8      1024  8 i   65536 16w 
024:  0   17   1  2   8  1      32  8        32  8      1024  8 i   65536 16w 
025:  0   19   1  2   9  1      32  8        32  8      1024  8 i   65536 16w 
026:  0   21   1  2  10  1      32  8        32  8      1024  8 i   65536 16w 
027:  0   23   1  2  11  1      32  8        32  8      1024  8 i   65536 16w 
028:  0   25   1  3  12  1      32  8        32  8      1024  8 i   65536 16w 
029:  0   27   1  3  13  1      32  8        32  8      1024  8 i   65536 16w 
030:  0   29   1  3  14  1      32  8        32  8      1024  8 i   65536 16w 
031:  0   31   1  3  15  1      32  8        32  8      1024  8 i   65536 16w

cyring commented 1 week ago

@tofurky Thank you Result is what I was expecting among CCD numbering Please let me know if sensors (temps, voltage) are not aligned with CCD clusters

tofurky commented 1 week ago

@tofurky Thank you Result is what I was expecting among CCD numbering Please let me know if sensors (temps, voltage) are not aligned with CCD clusters

In some brief testing when loading specific cores, it seemed correct.

cyring commented 1 week ago

@tofurky Thank you Result is what I was expecting among CCD numbering Please let me know if sensors (temps, voltage) are not aligned with CCD clusters

In some brief testing when loading specific cores, it seemed correct.

Thank you for your answer

cyring / CoreFreq

AMD Ryzen 5 7600 #512